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Temporary Asic Design Engineer Jobs (NOW HIRING)

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Write microarchitecture and/or design specifications - Design, implement, and debug complex logic ...

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Write microarchitecture and/or design specifications - Design, implement, and debug complex logic ...

We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from ...

ASIC Design Engineer, STA

San Jose, CA · On-site

$152K - $219K/yr

Your Impact As an ASIC Design Engineer on the STA team, you will play a pivotal role in extraction and static timing analysis (STA) flow development, convergence strategies, and correlation between ...

We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from ...

Apple's Silicon Engineering team is looking for a highly skilled and motivated ASIC Design Engineer to join our dynamic group. In this role, you will develop custom SoCs that drive the performance ...

Apple's Silicon Engineering team is looking for a highly skilled and motivated ASIC Design Engineer to join our dynamic group. In this role, you will develop custom SoCs that drive the performance ...

Apple's Silicon Engineering team is looking for a highly skilled and motivated ASIC Design Engineer to join our dynamic group. In this role, you will develop custom SoCs that drive the performance ...

We are searching for a dedicated engineer to join our exciting team of problem solvers. Description The ideal candidate will have experience in ASIC design with: - Architecture research and/or ...

ASIC Design Engineer, STA

San Jose, CA · On-site

$152K - $219K/yr

Your Impact As an ASIC Design Engineer on the STA team, you will play a pivotal role in extraction and static timing analysis (STA) flow development, convergence strategies, and correlation between ...

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Temporary Asic Design Engineer information

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$94K

$150.2K

$202K

How much do temporary asic design engineer jobs pay per year?

As of Jul 18, 2026, the average yearly pay for temporary asic design engineer in the United States is $150,195.00, according to ZipRecruiter salary data. Most workers in this role earn between $131,500.00 and $180,000.00 per year, depending on experience, location, and employer.

What is the difference between Temporary Asic Design Engineer vs Temporary FPGA Design Engineer?

AspectTemporary Asic Design EngineerTemporary FPGA Design Engineer
Required SkillsASIC architecture, digital design, verification, HDL (Verilog/VHDL)FPGA development, HDL (Verilog/VHDL), prototyping
Work EnvironmentSemiconductor companies, chip design labsPrototyping labs, FPGA manufacturing facilities
Industry UsageIntegrated circuit manufacturing, consumer electronicsPrototyping, testing, and development projects

Temporary Asic Design Engineers focus on designing and verifying ASIC chips, often working in semiconductor companies. Temporary FPGA Design Engineers work on FPGA prototyping and testing, typically in research or development labs. Both roles require HDL skills but differ in their focus on chip fabrication versus flexible prototyping.

More about Temporary Asic Design Engineer jobs
What cities are hiring for Temporary Asic Design Engineer jobs? Cities with the most Temporary Asic Design Engineer job openings:
What are the most commonly searched types of Asic Design Engineer jobs? The most popular types of Asic Design Engineer jobs are:
What states have the most Temporary Asic Design Engineer jobs? States with the most job openings for Temporary Asic Design Engineer jobs include:
Infographic showing various Temporary Asic Design Engineer job openings in the United States as of July 2026, with employment types broken down into 95% Full Time, 1% Part Time, 2% Contract, and 2% Summer. Highlights an 89% Physical, 6% Hybrid, and 5% Remote job distribution, with an average salary of $150,195 per year, or $72.2 per hour.
ASIC Design Engineer (eInfochips)

ASIC Design Engineer (eInfochips)

Arrow Electronics

Mountain View, CA • On-site

Full-time

Posted 23 days ago


Arrow Electronics rating

7.7

Company rating: 7.7 out of 10

Based on 19 frontline employees who took The Breakroom Quiz


Job description

Position:
ASIC Design Engineer (eInfochips)
Job Description:
Role: Asic Design Engineer
Location: Mountain View CA (Remote)
Note: Seeking candidate with Fusion Compiler and Scripting experince.
What candidate will Be Doing:
  • Proficient in Verilog/System Verilog coding constructs.
  • Knowledge of front-end tools (Verilog simulators, Connectivity tools, CDC checkers, low power static checkers, linting)
  • Experience with high speed PCIe designs and protocols.
  • Experience with Industry standard interface protocols such as AXI, APB, etc.
  • Experience with ARM Fabric IPs.
  • Experience with IPXACT.
  • Understanding of Computer Architecture fundamentals.
  • Ability to write scripts using Python, Tcl, Perl etc.
  • Experience in EDA tools such as VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus.
  • Proficiency with UPF (Low power intent)
  • Proficiency in clock crossing techniques.
  • Knowledge of Static Timing Analysis and understanding of timing signoff fundamentals.

What we are looking for:
  • Good in understanding RTL Design and Digital concepts
  • Strong experience with EDA tools: Fusion Compiler, CDC
  • Scripting: Pearl, Python, TCL
  • At-least 5+ years of experience in Verilog Design
  • AMBA AXI bus along-with ARM or C based processor
  • Ensure customer satisfaction.
  • Reporting to customers on daily or weekly progress effectively

Work Arrangement Fully Onsite: Must be able to travel to an Arrow Client office location as requested by Arrow Client leadership.
Location: Mountain View CA (Remote)
About eInfochips:
eInfochips, an Arrow company (Fortune#154), is a leading global provider of product engineering and semiconductor design services. A rich history of over two decades, with over 500+ products developed and 40M deployments in 140 countries, eInfochips continues to fuel technological innovations in multiple verticals. eInfochips has strategic technology partnerships with Qualcomm, NVIDIA, NXP, Analog Devices, Texas Instruments, Amazon, Microsoft and Google to name a few. Along with Arrow's $38B in revenues, 22,000 employees, and 345 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 150,000+ global clients. eInfochips acts as a catalyst to Arrow's Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients. Please visit www.einfochips.com for our portfolio of product engineering services across
various industries & verticals.
Arrow's Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients. Please visit www.einfochips.com for our portfolio of product engineering services across various industries C verticals.
EEO Statement:
Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status.
Location:
US-CA-Mountain View, California (Google)
Time Type:
Full time
Job Category:
Engineering Services
EEO Statement:
Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy)
All Arrow job postings are for existing job vacancies. We anticipate this requisition will be open for a minimum of five days, though it may be open for a longer period of time. We encourage your prompt application.

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