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Sram Memory Design Jobs in California (NOW HIRING)

TSMC

SRAM Design Engineer (7820)

San Jose, CA · On-site

Drive the hands-on circuit design of cutting-edge SRAM, DRAM, and Non-Volatile Memory (NVM) architectures, including compiler timing/power characterization, netlist/layout tiling, and IR/EM flow ...

TSMC

SRAM Design Engineer (7820)

San Jose, CA · Hybrid

Drive the hands-on circuit design of cutting-edge SRAM, DRAM, and Non-Volatile Memory (NVM) architectures, including compiler timing/power characterization, netlist/layout tiling, and IR/EM flow ...

Apple Inc.

SRAM Circuit Design Engineer

San Diego, CA · On-site

$142.30 - $263.30/hr

As an SRAM Circuit Designer for the Digital Custom Group, you will perform the following: * Design ... Knowledge of Cache design/architecture, memory hierarchy is a huge plus. * Working knowledge of RTL ...

New

Intel

Memory Circuit Design Engineer

Santa Clara, CA · On-site

Design, characterization, and verification of custom memory circuits such as SRAM, Register Files or ROM. * Design trade-offs between power, performance, and area (PPA). * Custom digital circuit ...

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How much do sram memory design jobs pay per hour?

As of Aug 20, 2026, the average hourly pay for sram memory design in California is $19.12, according to ZipRecruiter salary data. Most workers in this role earn between $14.23 and $21.35 per hour, depending on experience, location, and employer.

What is SRAM memory design?

SRAM memory design refers to the process of creating Static Random Access Memory (SRAM) circuits used in electronic devices for fast, temporary data storage. Designers focus on optimizing speed, power consumption, and area while ensuring data stability and reliability. The process involves schematic design, layout, verification, and testing of SRAM cells and arrays to meet specific performance requirements. SRAM is commonly used in cache memory and other high-speed applications because it retains data as long as power is supplied, without needing to be refreshed like DRAM.

What are the key skills and qualifications needed to thrive as an SRAM memory design engineer?

To thrive as an SRAM Memory Design Engineer, you need a strong background in electrical engineering, semiconductor physics, and circuit design, often supported by a relevant degree. Familiarity with EDA tools such as Cadence, Synopsys, and simulation software, along with knowledge of industry standards, is typically required. Analytical thinking, attention to detail, and effective teamwork are crucial soft skills in this role. These competencies are essential for designing reliable, high-performance memory circuits that meet stringent requirements for speed, power, and manufacturability.

What are some common challenges faced by engineers in SRAM memory design and how can they be addressed?

Engineers in SRAM Memory Design often encounter challenges such as optimizing for low power consumption while maintaining high performance and ensuring data integrity under various process, voltage, and temperature variations. Addressing these challenges requires close collaboration with process technology teams, rigorous simulation and verification, and frequent design reviews. Additionally, balancing area efficiency with speed can be complex, so ongoing learning and teamwork are essential for success in this role.

What is the difference between Sram Memory Design vs DRAM Memory Design?

AspectSram Memory DesignDRAM Memory Design
FocusDesigning static RAM cells, optimizing speed and powerDesigning dynamic RAM cells, focusing on density and refresh management
Work EnvironmentSemiconductor companies, hardware design labsMemory chip manufacturers, integrated circuit design teams
CredentialsElectrical engineering, specialized in digital and memory designElectrical engineering, with emphasis on memory architectures

Sram Memory Design and DRAM Memory Design both involve memory chip development but differ in cell technology and application focus. Sram is faster and used for cache memory, while DRAM offers higher density for main memory. Understanding these differences helps in choosing the right design approach for specific hardware needs.

What are popular job titles related to Sram Memory Design jobs in California?

For Sram Memory Design jobs in California, the most frequently searched job titles are:

What job categories do people searching Sram Memory Design jobs in California look for?

The top searched job categories for Sram Memory Design jobs in California are:

What cities in California are hiring for Sram Memory Design jobs?

Cities in California with the most Sram Memory Design job openings:

Sram Memory Design jobs near you
Infographic showing various Sram Memory Design job openings in California as of August 2026, with employment types broken down into 91% Full Time, 6% Part Time, and 3% Contract. Highlights an 82% Physical, 5% Hybrid, and 13% Remote job distribution, with an average salary of $39,777 per year, or $19.1 per hour.

Senior Staff Engineer/Principal Memory Design Engineer (San Jose)

MediaTek

San Jose, CA • On-site

Full-time

Medical, Life, Retirement, PTO

Re-posted 22 days ago

Job description

Senior Staff Engineer/Principal Memory Design EngineerSenior Staff Engineer/Principal Memory Design Engineer

3 weeks ago Be among the first 25 applicants

Get AI-powered advice on this job and more exclusive features.

MediaTek’s advanced Memory Design team in San Jose is looking for a senior memory design engineer to define and architect memory circuits for high performance compute ASICs targeting Cloud AI, Data Center Networking, Automotive and other Enterprise ASIC applications as well as edge AI Machine Learning (ML) Accelerator SoCs

Responsibilities

  • Primary job responsibilities include close collaboration with tier-1 ASIC customers in North America to co-design embedded memory architectures and circuits in advanced nodes
  • Collaborate closely with product and architecture teams to define, design, and develop high performance customized semiconductor memories including SRAM, TCAM, CPU caches and Compute-In-Memory (CIM) macros with varied PPA requirements spanning across Cloud AI, Networking, Automotive and edge AI applications
  • Design dual rail custom memories from start to finish to meet customer PPA spec
  • Innovate, design, and incorporate special circuits and features to achieve best-in-class PPA for custom and compiler memories
  • Mentor, guide, and direct other designers, while being hands-on in digital circuit design, especially targeting memories
  • Highly organized and independent design engineer who can multi-task and closely collaborate with worldwide design and CAD teams

Qualifications

  • 12+ years of hands-on experience in design of embedded memories (SRAM, TCAM) for high performance processors or ASICs in advanced nodes (3nm/5nm)
  • Strong track record of offering innovative solutions (papers, patents), good understanding of technology roadmap and market for embedded memories
  • Strong understanding of Digital Circuit design techniques in FinFET technologies
  • Exposure to complete design cycle of SRAM memory and compiler development
  • Supervise layout engineers and review layout for optimality
  • Have the ability to come up with comprehensive design verification plans, silicon bring-up plans for high-performance embedded memories
  • Experience with LEC tools (ESPCV)
  • Ability to review and coordinate layout activities
  • Silicon debug and bring up experience is required
  • Working knowledge of scripting in Perl/Python
  • Willingness to collaborate closely with cross functional teams across the globe

Salary range: $180,000 - $260,000

Employee may be eligible for performance bonus, short and long term incentive programs. Actual total compensation will be dependent upon the individual's skills, experience and qualifications. In addition, MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, Company paid holidays, Paid time off (PTO), Parental leave, 401K and more.

MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.

Seniority level
  • Seniority levelMid-Senior level
Employment type
  • Employment typeFull-time
Job function
  • IndustriesSemiconductor Manufacturing

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