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Sram Memory Design Jobs (NOW HIRING)

Resource Point LLC

Memory Design Engineer

Troy, MI · On-site

Good understanding of SRAM architecture, Critical Path Modelling, Full Cut Analysis and Monte Carlo Simulations. * Exposure to full embedded memory design flow: Architecture, circuit design, physical ...

TSMC

SRAM Design Engineer (7820)

San Jose, CA · On-site

Drive the hands-on circuit design of cutting-edge SRAM, DRAM, and Non-Volatile Memory (NVM) architectures, including compiler timing/power characterization, netlist/layout tiling, and IR/EM flow ...

TSMC

SRAM Design Engineer (7820)

San Jose, CA · Hybrid

Drive the hands-on circuit design of cutting-edge SRAM, DRAM, and Non-Volatile Memory (NVM) architectures, including compiler timing/power characterization, netlist/layout tiling, and IR/EM flow ...

ARM

Memory Design Engineer

Austin, TX · Hybrid

$130K - $176K/yr

Transistor level full-custom design and collaboration with the physical design team for layout ... An understanding of basic memory principles, especially for SRAM. * A good understanding of ...

ARM

Memory Design Engineer

Austin, TX · On-site

$130K - $176K/yr

Transistor level full-custom design and collaboration with the physical design team for layout ... An understanding of basic memory principles, especially for SRAM. * A good understanding of ...

Nvidia

Senior SRAM Engineer

Santa Clara, CA

Strong understanding of SRAM and memory design techniques and macro/block development Ways to stand out from the crowd: * Self-motivation, attention to detail, clear data analysis and presentation ...

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How much do sram memory design jobs pay per hour?

As of Aug 29, 2026, the average hourly pay for sram memory design in the United States is $19.38, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $21.63 per hour, depending on experience, location, and employer.

What is SRAM memory design?

SRAM memory design refers to the process of creating Static Random Access Memory (SRAM) circuits used in electronic devices for fast, temporary data storage. Designers focus on optimizing speed, power consumption, and area while ensuring data stability and reliability. The process involves schematic design, layout, verification, and testing of SRAM cells and arrays to meet specific performance requirements. SRAM is commonly used in cache memory and other high-speed applications because it retains data as long as power is supplied, without needing to be refreshed like DRAM.

What are the key skills and qualifications needed to thrive as an SRAM memory design engineer?

To thrive as an SRAM Memory Design Engineer, you need a strong background in electrical engineering, semiconductor physics, and circuit design, often supported by a relevant degree. Familiarity with EDA tools such as Cadence, Synopsys, and simulation software, along with knowledge of industry standards, is typically required. Analytical thinking, attention to detail, and effective teamwork are crucial soft skills in this role. These competencies are essential for designing reliable, high-performance memory circuits that meet stringent requirements for speed, power, and manufacturability.

What are some common challenges faced by engineers in SRAM memory design and how can they be addressed?

Engineers in SRAM Memory Design often encounter challenges such as optimizing for low power consumption while maintaining high performance and ensuring data integrity under various process, voltage, and temperature variations. Addressing these challenges requires close collaboration with process technology teams, rigorous simulation and verification, and frequent design reviews. Additionally, balancing area efficiency with speed can be complex, so ongoing learning and teamwork are essential for success in this role.

What is the difference between Sram Memory Design vs DRAM Memory Design?

AspectSram Memory DesignDRAM Memory Design
FocusDesigning static RAM cells, optimizing speed and powerDesigning dynamic RAM cells, focusing on density and refresh management
Work EnvironmentSemiconductor companies, hardware design labsMemory chip manufacturers, integrated circuit design teams
CredentialsElectrical engineering, specialized in digital and memory designElectrical engineering, with emphasis on memory architectures

Sram Memory Design and DRAM Memory Design both involve memory chip development but differ in cell technology and application focus. Sram is faster and used for cache memory, while DRAM offers higher density for main memory. Understanding these differences helps in choosing the right design approach for specific hardware needs.

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Sram Memory Design jobs near you
Infographic showing various Sram Memory Design job openings in the United States as of August 2026, with employment types broken down into 90% Full Time, 7% Part Time, and 3% Contract. Highlights an 81% Physical, 5% Hybrid, and 14% Remote job distribution, with an average salary of $40,304 per year, or $19.4 per hour.

SRAM/ROM Circuit Design Engineer

Austin, TX

NXP Semiconductors
See more jobs at NXP Semiconductorsexternal

Full-time

Posted 17 days ago

Job description

NXP's Austin Memories team is seeking an experienced memory circuit design engineer for our SRAM and ROM internal memory compiler designs.
Our team is part of the Design Enablement/Foundation IP organization within the Chief Technology Office at NXP. We provide differentiating SRAM/ROM memory compiler solutions to NXP SoC design teams across multiple business lines- your work will have real impact for our design teams and, through them, our end products and end customers.

Job Summary:

  • Implement design of CMOS memory circuits to meet memory compiler performance, power, and area requirements, including periphery circuits to support functional safety and scan functionality.

  • Generate, execute, and evaluate simulation characterization measurements and simulation test benches, and compare vs. performance targets/benchmarks.

  • Engage with layout teams on implementation of compiler leaf cells based on designs to improve area and performance.

  • Work closely with CAD teams on implementation of new designs into our characterization, verification, and regression flows.

  • Align with modeling/verification team to ensure consistency of designs with frontend models (behavioral/ATPG/emulation).

  • Collaborate effectively across global memory teams to help ensure common methodologies and best practices.

  • Leverage internally supported LLM/GenAI tools and EDA vendor GenAI solutions to implement efficiencies in design methodologies.

Job Qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or related discipline. (Master's degree is preferred).

  • 8+ years of industry experience (6+ with Master's degree) in SRAM memory circuit design, including some design experience with advanced CMOS foundry technologies at 5nm and beyond.

  • Strong familiarity with Cadence Virtuoso and other industry-standard EDA tools.

  • Familiarity with automotive design rules and memory design requirements is a plus.

  • Good knowledge of scripting languages such as Perl, tcl, or Python is a must.

  • Creative mindset, with strong analytical and problem-solving skills.

Job location:

  • The position will be based at the NXP offices in Austin, Texas. Team members are expected to work in office at least 3 days/week.

More information about NXP in the United States...

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.

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