Staff Engineer, RTL Design Overview The Memory Solutions Lab (MSL) is part of Samsung's Memory Business Unit, the industry's technology and volume leader in DRAM, NAND Flash, SRAM memory. MSL ...
Quick apply
Staff Engineer, RTL Design Overview The Memory Solutions Lab (MSL) is part of Samsung's Memory Business Unit, the industry's technology and volume leader in DRAM, NAND Flash, SRAM memory. MSL ...
Quick apply
Staff Engineer, RTL Design Overview The Memory Solutions Lab (MSL) is part of Samsung's Memory Business Unit, the industry's technology and volume leader in DRAM, NAND Flash, SRAM memory. MSL ...
$171K - $296K/yr
... memory test solutions (from characterization to HVM). * Define and deploy end-to-end test architecture from design insertion through silicon validation, covering all aspects of SRAM / NVM ...
$171K - $296K/yr
... memory test solutions (from characterization to HVM). * Define and deploy end-to-end test architecture from design insertion through silicon validation, covering all aspects of SRAM / NVM ...
$171K - $296K/yr
... memory test solutions (from characterization to HVM). * Define and deploy end-to-end test architecture from design insertion through silicon validation, covering all aspects of SRAM / NVM ...
$171K - $296K/yr
... memory test solutions (from characterization to HVM). * Define and deploy end-to-end test architecture from design insertion through silicon validation, covering all aspects of SRAM / NVM ...
San Jose, CA · On-site
Staff Engineer, RTL Design Overview The Memory Solutions Lab (MSL) is part of Samsung's Memory Business Unit, the industry's technology and volume leader in DRAM, NAND Flash, SRAM memory. MSL ...
San Jose, CA · On-site
Staff Engineer, RTL Design Overview The Memory Solutions Lab (MSL) is part of Samsung's Memory Business Unit, the industry's technology and volume leader in DRAM, NAND Flash, SRAM memory. MSL ...
Burlington, MA · On-site
$148K/yr
... and SRAM/memory interface considerations. * Strong understanding of silicon-level design ... constraints, including clock/reset architecture, CDC/RDC risk mitigation, power-aware design, and ...
Burlington, MA · On-site
$148K/yr
... and SRAM/memory interface considerations. * Strong understanding of silicon-level design ... constraints, including clock/reset architecture, CDC/RDC risk mitigation, power-aware design, and ...
Hillsboro, OR · On-site
$122K - $232K/yr
Design, characterization, and verification of custom memory circuits such as SRAM, Register Files or ROM * Design trade-offs between power, performance, and area (PPA) * Design technology co ...
Hillsboro, OR · On-site
$122K - $232K/yr
Design, characterization, and verification of custom memory circuits such as SRAM, Register Files or ROM * Design trade-offs between power, performance, and area (PPA) * Design technology co ...
... Access Memory (SRAM) memory compilers. This team hires some of the biggest problem solvers in ... What You Can Expect As a Principal Design Engineer, you will lead micro-architecture and RTL ...
... Access Memory (SRAM) memory compilers. This team hires some of the biggest problem solvers in ... What You Can Expect As a Principal Design Engineer, you will lead micro-architecture and RTL ...
$122K - $232K/yr
Design, characterization, and verification ofcustom memory circuits such as SRAM, Register Files or ROM * Design trade-offs between power, performance, and area (PPA) * Custom digital circuit design ...
$122K - $232K/yr
Design, characterization, and verification ofcustom memory circuits such as SRAM, Register Files or ROM * Design trade-offs between power, performance, and area (PPA) * Custom digital circuit design ...
... Access Memory (SRAM) memory compilers. This team hires some of the biggest problem solvers in ... What You Can Expect As a Principal Design Engineer, you will lead micro-architecture and RTL ...
... Access Memory (SRAM) memory compilers. This team hires some of the biggest problem solvers in ... What You Can Expect As a Principal Design Engineer, you will lead micro-architecture and RTL ...
Hillsboro, OR · On-site
$122K - $232K/yr
Design, characterization, and verification of custom memory circuits such as SRAM, Register Files or ROM * Design trade-offs between power, performance, and area (PPA) * Custom digital circuit design ...
Hillsboro, OR · On-site
$122K - $232K/yr
Design, characterization, and verification of custom memory circuits such as SRAM, Register Files or ROM * Design trade-offs between power, performance, and area (PPA) * Custom digital circuit design ...
Santa Clara, CA · On-site
$122K - $232K/yr
Design, characterization, and verification of custom memory circuits such as SRAM, Register Files or ROM * Design trade-offs between power, performance, and area (PPA) * Design technology co ...
Santa Clara, CA · On-site
$122K - $232K/yr
Design, characterization, and verification of custom memory circuits such as SRAM, Register Files or ROM * Design trade-offs between power, performance, and area (PPA) * Design technology co ...
Sunnyvale, CA · On-site
$226K - $338K/yr
Designing, developing, and evaluating physical IP-Memory compilers (SRAM/RF/ROM/TCAM etc.). * Applying expertise in circuit design, memory architecture optimization for best in-class PPA and industry ...
Sunnyvale, CA · On-site
$226K - $338K/yr
Designing, developing, and evaluating physical IP-Memory compilers (SRAM/RF/ROM/TCAM etc.). * Applying expertise in circuit design, memory architecture optimization for best in-class PPA and industry ...
... memory compiler technologies to facilitate in creating memory arrays in large SoC designs- Debug ... of SRAM and register files.- Collaborate with design and CAD team to optimize design flows and ...
... memory compiler technologies to facilitate in creating memory arrays in large SoC designs- Debug ... of SRAM and register files.- Collaborate with design and CAD team to optimize design flows and ...
Burlington, MA · On-site
$148K/yr
... and SRAM/memory interface considerations. * Strong understanding of silicon-level design ... constraints, including clock/reset architecture, CDC/RDC risk mitigation, power-aware design, and ...
Burlington, MA · On-site
$148K/yr
... and SRAM/memory interface considerations. * Strong understanding of silicon-level design ... constraints, including clock/reset architecture, CDC/RDC risk mitigation, power-aware design, and ...
... and SRAM/memory interface considerations. * Strong understanding of silicon-level design ... constraints, including clock/reset architecture, CDC/RDC risk mitigation, power-aware design, and ...
Quick apply
... and SRAM/memory interface considerations. * Strong understanding of silicon-level design ... constraints, including clock/reset architecture, CDC/RDC risk mitigation, power-aware design, and ...
Austin, TX · On-site
Are you interested in joining Qualcomm's High-performance CPU Team as a SRAM Mask Layout Designer ... the circuit design engineers. * Work independently and execute memory layout with little ...
Austin, TX · On-site
Are you interested in joining Qualcomm's High-performance CPU Team as a SRAM Mask Layout Designer ... the circuit design engineers. * Work independently and execute memory layout with little ...
Austin, TX · On-site
$172K - $305K/yr
... memory compiler technologies to facilitate in creating memory arrays in large SoC designs - Debug ... of SRAM and register files. - Collaborate with design and CAD team to optimize design flows and ...
Austin, TX · On-site
$172K - $305K/yr
... memory compiler technologies to facilitate in creating memory arrays in large SoC designs - Debug ... of SRAM and register files. - Collaborate with design and CAD team to optimize design flows and ...
Austin, TX · On-site
$172K - $305K/yr
... memory compiler technologies to facilitate in creating memory arrays in large SoC designs - Debug ... of SRAM and register files. - Collaborate with design and CAD team to optimize design flows and ...
Austin, TX · On-site
$172K - $305K/yr
... memory compiler technologies to facilitate in creating memory arrays in large SoC designs - Debug ... of SRAM and register files. - Collaborate with design and CAD team to optimize design flows and ...
Burlington, MA · On-site +1
$148K/yr
Experience architecting sustained high-throughput digital datapaths, including buffering, arbitration, backpressure, bandwidth budgeting, and SRAM/memory hierarchy design. * Prior work at advanced ...
Burlington, MA · On-site +1
$148K/yr
Experience architecting sustained high-throughput digital datapaths, including buffering, arbitration, backpressure, bandwidth budgeting, and SRAM/memory hierarchy design. * Prior work at advanced ...
Experience architecting sustained high-throughput digital datapaths, including buffering, arbitration, backpressure, bandwidth budgeting, and SRAM/memory hierarchy design. * Prior work at advanced ...
Quick apply
Experience architecting sustained high-throughput digital datapaths, including buffering, arbitration, backpressure, bandwidth budgeting, and SRAM/memory hierarchy design. * Prior work at advanced ...
$9.13 - $11.65
9% of jobs
$11.65 - $14.16
8% of jobs
$14.81 is the 25th percentile. Wages below this are outliers.
$14.16 - $16.67
28% of jobs
The median wage is $17.34 / hr.
$16.67 - $19.19
16% of jobs
$20.91 is the 75th percentile. Wages above this are outliers.
$19.19 - $21.70
20% of jobs
$21.70 - $24.21
9% of jobs
$24.21 - $26.73
4% of jobs
$26.73 - $29.24
1% of jobs
$29.24 - $31.75
1% of jobs
$31.75 - $34.27
1% of jobs
$34.27 - $36.78
2% of jobs
$9
$19
$36
| Aspect | Sram Memory Design | DRAM Memory Design |
|---|---|---|
| Focus | Designing static RAM cells, optimizing speed and power | Designing dynamic RAM cells, focusing on density and refresh management |
| Work Environment | Semiconductor companies, hardware design labs | Memory chip manufacturers, integrated circuit design teams |
| Credentials | Electrical engineering, specialized in digital and memory design | Electrical engineering, with emphasis on memory architectures |
Sram Memory Design and DRAM Memory Design both involve memory chip development but differ in cell technology and application focus. Sram is faster and used for cache memory, while DRAM offers higher density for main memory. Understanding these differences helps in choosing the right design approach for specific hardware needs.

Full-time
Medical, Dental, Vision, Life, Retirement, PTO
Posted 16 days ago
7.0
Based on 48 frontline employees who took The Breakroom Quiz
104th of 139 rated electronics manufacturers
Please Note:
To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.
Advancing the World's Technology Together
Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future.
We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.
Staff Engineer, RTL Design
Overview
The Memory Solutions Lab (MSL) is part of Samsung's Memory Business Unit, the industry's technology and volume leader in DRAM, NAND Flash, SRAM memory. MSL's vision is to solve key problems and optimize architecture solutions for Cloud & Data center environments. We are an integral part of Samsung's strong R&D focus & lab innovation engine. We work closely with development teams to bring feature innovation to product roadmaps.
https://semiconductor.samsung.com/about-us/locations/us-rnd-labs/memory-labs/#memory-solutions-lab
What You'll Do
The Candidate will be a key technical member of MSL, Datacenter Device Solutions (DCDS) Group. He or she will join a team of experts in researching and developing innovative data center/ cloud networking, storage, and compute technologies and system solutions. The ideal candidate preferred to have prior experience developing leading edge solutions for at least one of the areas: memory hierarchy, storage, networking, or embedded computing.
Location: Daily onsite presence at our San Jose, CA office in alignment with our Flexible Work polic
Job ID: 42940
What You Bring
#LI-SF1
What We Offer
The pay range below is for all roles at this level across all US locations and functions. Pay within this range varies by work location and may also depend on job-related knowledge, skills, and experience. We also offer incentive opportunities that reward employees based on individual and company performance.
This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours.
Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.
Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.
Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.
Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.
Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.
Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.
Equal Opportunity Employment Policy
Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status.
When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations.
Our Commitment to Innovation and Fairness
At Samsung Semiconductor, we use Artificial Intelligence (AI) tools in the recruitment process to enhance efficiency. However, AI is used as a support tool, not a final decision-maker. All hiring decisions are made by our human recruiting team and hiring managers to ensure every candidate is evaluated fairly and holistically.
Recruiting Agency Policy
We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings.
Applicant AI Use Policy
At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process.
Trade Secret Notice
By submitting an application, you agree not to disclose to Samsung—or encourage Samsung to use—any confidential or proprietary information (including trade secrets) belonging to a current or former employer or other entity.
Applicant Privacy Policy
https://semiconductor.samsung.com/about-us/careers/us/privacy/
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