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Silicon Package Design Engineer Jobs (NOW HIRING)

Silicon Packaging Design Engineer

Hillsboro, OR · On-site

$148K/yr

The Role and Impact As a Silicon Packaging Design Engineer, you will play a critical role in the ... Drive the physical layout and routing of package designs, ensuring alignment with silicon, package ...

Silicon Packaging Design Engineer

Phoenix, AZ · On-site

$135K/yr

The Role and Impact As a Silicon Packaging Design Engineer, you will play a critical role in the ... Drive the physical layout and routing of package designs, ensuring alignment with silicon, package ...

Silicon Packaging Design Engineer

Hillsboro, OR · On-site

$148K/yr

Intel seeks a motivated and innovative Silicon Packaging Design Engineer to join our team, driving ... package performance, and delivering high-impact solutions that meet performance, cost, and ...

Silicon Packaging Design Engineer

Phoenix, AZ · On-site

$135K/yr

Intel seeks a motivated and innovative Silicon Packaging Design Engineer to join our team, driving ... package performance, and delivering high-impact solutions that meet performance, cost, and ...

Description As a Package design engineer, you will lead advanced package architecture, drive next ... wide range of silicon technologies You are expected to leverage AI tools to enhance design ...

Description As a Package design engineer, you will lead advanced package architecture, drive next ... wide range of silicon technologies You are expected to leverage AI tools to enhance design ...

Description As a Package design engineer, you will lead advanced package architecture, drive next ... wide range of silicon technologies You are expected to leverage AI tools to enhance design ...

Description As a Package design engineer, you will lead advanced package architecture, drive next ... wide range of silicon technologies You are expected to leverage AI tools to enhance design ...

Description As a Package design engineer, you will lead advanced package architecture, drive next ... wide range of silicon technologies You are expected to leverage AI tools to enhance design ...

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Silicon Package Design Engineer information

See salary details

$90K

$136.5K

How much do silicon package design engineer jobs pay per year?

As of Jul 3, 2026, the average yearly pay for silicon package design engineer in the United States is $135,040.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What is the difference between Silicon Package Design Engineer vs PCB Design Engineer?

AspectSilicon Package Design EngineerPCB Design Engineer
CredentialsBachelor's or Master's in Electrical Engineering, VLSI, or related fieldsBachelor's or Master's in Electrical Engineering, Electronics, or related fields
Work EnvironmentSemiconductor fabrication labs, design houses, R&D centersElectronics manufacturing, design firms, product development teams
Industry UsageSemiconductor industry, integrated circuit designConsumer electronics, industrial equipment, communication devices
Primary FocusDesigning silicon chip packages, ensuring electrical and thermal performanceDesigning printed circuit boards for electronic products

The Silicon Package Design Engineer focuses on creating and optimizing the packaging of silicon chips, ensuring electrical connectivity and thermal management. In contrast, the PCB Design Engineer specializes in designing printed circuit boards that connect various electronic components. While both roles require electrical engineering knowledge, their work environments and end products differ significantly.

What types of cross-functional teams do Silicon Package Design Engineers typically collaborate with, and how does this affect daily workflow?

Silicon Package Design Engineers often work closely with electrical engineers, mechanical engineers, manufacturing teams, and product managers to ensure package designs meet performance, reliability, and manufacturability standards. This collaborative environment means that daily tasks often involve design reviews, resolving integration challenges, and coordinating updates based on feedback from various disciplines. Effective communication and teamwork are essential, as design changes in one area can significantly impact other aspects of the product. This cross-functional dynamic offers valuable insight into the entire product development lifecycle and fosters broad technical growth.

What does a Silicon Package Design Engineer do?

A Silicon Package Design Engineer is responsible for designing the physical packaging that houses silicon chips, ensuring optimal electrical performance, thermal management, and mechanical integrity. They collaborate with cross-functional teams to develop package layouts, select materials, and address challenges related to signal integrity, power distribution, and manufacturability. Their work is crucial for protecting the silicon die and enabling reliable integration into electronic devices. This role often involves using specialized design software and working closely with fabrication and testing teams to deliver high-quality, cost-effective packaging solutions.

What is the salary of silicon Design Engineer?

The salary of a Silicon Package Design Engineer typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Entry-level positions may start lower, while experienced engineers with specialized skills in IC packaging and CAD tools can earn higher salaries.

How much does a silicon packaging Design Engineer make at Intel?

A silicon packaging design engineer at Intel typically earns between $80,000 and $130,000 annually, depending on experience, education, and location. Salaries may also include bonuses and stock options, with roles often requiring knowledge of CAD tools and industry standards.

What engineer makes $500,000 a year?

Silicon Package Design Engineers typically do not earn $500,000 annually; such high salaries are more common among executive roles or senior engineers with extensive experience, specialized skills, and leadership responsibilities. Compensation at this level often includes bonuses, stock options, or profit sharing, especially in high-tech companies or startups.

What engineers make $300,000 a year?

Senior Silicon Package Design Engineers with extensive experience, advanced skills in IC packaging, and proficiency in tools like CAD and simulation software can earn $300,000 or more annually. High compensation is often associated with roles in leading tech companies, specialized expertise, and sometimes managerial responsibilities.

What are the key skills and qualifications needed to thrive as a Silicon Package Design Engineer, and why are they important?

To thrive as a Silicon Package Design Engineer, you need a solid background in electrical or materials engineering, semiconductor packaging principles, and experience with design for manufacturability. Proficiency in industry-standard EDA tools such as Cadence, Mentor Graphics, or Ansys, along with familiarity with simulation and layout software, is typically required. Strong problem-solving skills, attention to detail, and effective communication are critical for collaborating with multidisciplinary teams and resolving design challenges. These skills and qualifications are essential for delivering reliable, high-performance semiconductor packages that meet stringent industry standards.
More about Silicon Package Design Engineer jobs
What job categories do people searching Silicon Package Design Engineer jobs look for? The top searched job categories for Silicon Package Design Engineer jobs are:
Infographic showing various Silicon Package Design Engineer job openings in the United States as of June 2026, with employment types broken down into 94% Full Time, and 6% Part Time. Highlights an 88% Physical, 5% Hybrid, and 7% Remote job distribution, with an average salary of $135,040 per year, or $64.9 per hour.
Silicon Packaging Design Engineer

Silicon Packaging Design Engineer

Intel

Hillsboro, OR • On-site

$148K/yr

Full-time

Medical, Retirement, PTO

Posted 2 days ago


Intel rating

8.7

Company rating: 8.7 out of 10

Based on 145 frontline employees who took The Breakroom Quiz

11th of 141 rated electronics manufacturers


Job description

Job Details:Job Description: 

As an integral part of Intel's new Integrated Device Manufacturer 2.0 (IDM2.0) strategy, we are establishing Foundry Services (FS), a fully vertical, stand-alone foundry business, reporting directly to the CEO. Foundry Services will be a world-class foundry business and major provider of US and European based capacity to serve customers globally.

Foundry Services will be differentiated from other foundries with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe, and a world-class IP portfolio that customers can choose from, including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP's, along with Arm and RISC-V ecosystem IPs. Foundry Services will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry standard design packages.

The Role and Impact

As a Silicon Packaging Design Engineer, you will play a critical role in the development of advanced substrate designs that drive Intel's innovation and technological leadership. This position offers a unique opportunity to contribute to cutting-edge technologies by managing the end-to-end development process of substrate designs, from concept to tapeout. You will collaborate with silicon and hardware teams to optimize design performance, cost efficiency, and manufacturability, ensuring Intel remains at the forefront of high-performance applications. Your contributions will directly impact Intel's ability to deliver world-class solutions that address global challenges in computing.

Key Responsibilities

  • Drive the physical layout and routing of package designs, ensuring alignment with silicon, package, and board performance requirements.
  • Conduct substrate fit and routing studies to establish design, performance, and cost tradeoffs.
  • Define and implement substrate design rules, conducting internal and external reviews to maintain quality standards.
  • Analyze data, resolve Design Rule Checks (DRCs), and optimize designs for manufacturability and performance.
  • Collaborate with cross-functional teams to optimize pinout and silicon-package-board interactions.
  • Complete documentation and collateral into the product lifecycle management system of record.
Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. This position is not eligible for Intel immigration sponsorship

Minimum Qualifications:

  • Bachelor's or Master's degree in Electrical, Mechanical Engineering or related field with 1 year of experience.
  • Experience mentioned above should be in the following areas:
    • Package design tools such as Siemens Xpedition, Cadence Allegro Package Design, AutoCAD, or SolidWorks.
    • Physical layout aspects of substrate design, including custom layouts, floor plans, or schematic layout conversions.
    • Microelectronic package or PCB physical layout design and the associated manufacturing processes.

Preferred Qualifications

  • Experience in microelectronic package substrate design, package I/O routing, or technology development.
  • Familiarity with microelectronic package electrical modeling and simulation tools such as PowerDC, HyperLynx, Q3D, and HFSS.
  • Analytical and problem-solving skills, including debugging and providing innovative solutions.
  • Experience with scripting using Python, VB, C, or similar languages.

Join Intel and contribute to shaping the future of technology. Be a part of a dynamic team committed to delivering innovative solutions that address the needs of a rapidly evolving world. Apply today to take the next step in your career.

Job Type:College GradShift:Shift 1 (United States of America)Primary Location: US, Arizona, PhoenixAdditional Locations:US, Oregon, HillsboroBusiness group:Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $105,650.00-172,860.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968