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Silicon Package Design Engineer Jobs (NOW HIRING)

Intel

Silicon Packaging Design Engineer

Hillsboro, OR

$148K/yr

Job Details: We are seeking an experienced Silicon Packaging Design Engineer with a strong ... Partner closely with package design, test engineering, and validation teams to define board ...

Intel

Silicon Packaging Design Engineer

Phoenix, AZ · On-site

$135K/yr

Job Details: We are seeking an experienced Silicon Packaging Design Engineer with a strong ... Partner closely with package design, test engineering, and validation teams to define board ...

Intel

Silicon Packaging Design Engineer

Phoenix, AZ · On-site

$135K/yr

Intel seeks a motivated and innovative Silicon Packaging Design Engineer to join our team, driving ... package performance, and delivering high-impact solutions that meet performance, cost, and ...

Intel

Silicon Packaging Design Engineer

Hillsboro, OR

$148K/yr

Intel seeks a motivated and innovative Silicon Packaging Design Engineer to join our team, driving ... package performance, and delivering high-impact solutions that meet performance, cost, and ...

Apple

IC Package Design Engineer

Austin, TX

$175K - $308K/yr

Description As a Package design engineer, you will lead advanced package architecture, drive next ... wide range of silicon technologies You are expected to leverage AI tools to enhance design ...

Apple

IC Package Design Engineer

Austin, TX

$175K - $308K/yr

Description As a Package design engineer, you will lead advanced package architecture, drive next ... wide range of silicon technologies You are expected to leverage AI tools to enhance design ...

Apple

IC Package Design Engineer

Los Angeles, CA

$122K - $214K/yr

Description As a Package design engineer, you will lead advanced package architecture, drive next ... wide range of silicon technologies You are expected to leverage AI tools to enhance design ...

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Silicon Package Design Engineer information

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$90K

$136.5K

How much do silicon package design engineer jobs pay per year?

As of Aug 12, 2026, the average yearly pay for silicon package design engineer in the United States is $135,040.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What is the difference between Silicon Package Design Engineer vs PCB Design Engineer?

AspectSilicon Package Design EngineerPCB Design Engineer
CredentialsBachelor's or Master's in Electrical Engineering, VLSI, or related fieldsBachelor's or Master's in Electrical Engineering, Electronics, or related fields
Work EnvironmentSemiconductor fabrication labs, design houses, R&D centersElectronics manufacturing, design firms, product development teams
Industry UsageSemiconductor industry, integrated circuit designConsumer electronics, industrial equipment, communication devices
Primary FocusDesigning silicon chip packages, ensuring electrical and thermal performanceDesigning printed circuit boards for electronic products

The Silicon Package Design Engineer focuses on creating and optimizing the packaging of silicon chips, ensuring electrical connectivity and thermal management. In contrast, the PCB Design Engineer specializes in designing printed circuit boards that connect various electronic components. While both roles require electrical engineering knowledge, their work environments and end products differ significantly.

What types of cross-functional teams do silicon package design engineers typically collaborate with, and how does this affect daily workflow?

Silicon Package Design Engineers often work closely with electrical engineers, mechanical engineers, manufacturing teams, and product managers to ensure package designs meet performance, reliability, and manufacturability standards. This collaborative environment means that daily tasks often involve design reviews, resolving integration challenges, and coordinating updates based on feedback from various disciplines. Effective communication and teamwork are essential, as design changes in one area can significantly impact other aspects of the product. This cross-functional dynamic offers valuable insight into the entire product development lifecycle and fosters broad technical growth.

What does a silicon package design engineer do?

A Silicon Package Design Engineer is responsible for designing the physical packaging that houses silicon chips, ensuring optimal electrical performance, thermal management, and mechanical integrity. They collaborate with cross-functional teams to develop package layouts, select materials, and address challenges related to signal integrity, power distribution, and manufacturability. Their work is crucial for protecting the silicon die and enabling reliable integration into electronic devices. This role often involves using specialized design software and working closely with fabrication and testing teams to deliver high-quality, cost-effective packaging solutions.

What skills and qualifications are needed to thrive as a silicon package design engineer?

To thrive as a Silicon Package Design Engineer, you need a solid background in electrical or materials engineering, semiconductor packaging principles, and experience with design for manufacturability. Proficiency in industry-standard EDA tools such as Cadence, Mentor Graphics, or Ansys, along with familiarity with simulation and layout software, is typically required. Strong problem-solving skills, attention to detail, and effective communication are critical for collaborating with multidisciplinary teams and resolving design challenges. These skills and qualifications are essential for delivering reliable, high-performance semiconductor packages that meet stringent industry standards.
More about Silicon Package Design Engineer jobs
What job categories do people searching Silicon Package Design Engineer jobs look for? The top searched job categories for Silicon Package Design Engineer jobs are:
Silicon Package Design Engineer jobs near you
Infographic showing various Silicon Package Design Engineer job openings in the United States as of August 2026, with employment types broken down into 1% As Needed, 74% Full Time, 12% Part Time, and 13% Contract. Highlights an 94% Physical, 2% Hybrid, and 4% Remote job distribution, with an average salary of $135,040 per year, or $64.9 per hour.

Silicon Packaging Design Engineer

Intel Corporation

Phoenix, AZ • On-site

$135K/yr

Full-time

Medical, Retirement, PTO

Re-posted 17 days ago

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

19th of 157 rated electronics manufacturers

Job description

Job Details:
Job Description:
We are seeking an experienced Silicon Packaging Design Engineer with a strong background in board design and package-board integration to drive the end-to-end development of test boards supporting advanced silicon package validation and characterization. The successful candidate will be responsible for board design execution from concept through tapeout, ensuring high-quality, manufacturable designs that meet electrical, mechanical, performance, and cost objectives.
This role requires close collaboration with package design, test vehicle design, validation, and laboratory teams to optimize board requirements, package-board performance, and system-level integration. The ideal candidate will bring deep technical expertise in PCB design, signal integrity considerations, manufacturing requirements, and design rule compliance, along with a proven track record of delivering complex designs in high-volume semiconductor environments.
Key Responsibilities
  • Drive end-to-end development of test board designs from concept through tapeout.
  • Perform board planning, floor planning, routing studies, and physical layout implementation.
  • Conduct board fit and routing studies to evaluate design, performance, manufacturability, and cost tradeoffs.
  • Partner closely with package design, test engineering, and validation teams to define board requirements and optimize package-board interactions.
  • Develop and validate board connectivity, ensuring design integrity and compliance with project specifications.
  • Perform design rule checks (DRCs) and manufacturing design rule validation to ensure successful fabrication and assembly.
  • Lead internal and external design reviews and drive resolution of design issues and DRC violations.
  • Collaborate with board fabrication and assembly vendors to obtain design approval and support manufacturing readiness.
  • Define and maintain board design guidelines, standards, and best practices.
  • Analyze design data and technical results to identify opportunities for optimization and continuous improvement.
  • Create and maintain design documentation and release collateral within Product Lifecycle Management (PLM) systems.
  • Support root cause analysis and troubleshooting activities related to board design, package-board integration, and test hardware performance.

What You'll Bring
  • Strong technical leadership and ownership mindset.
  • Complex projects independently while collaborating across global teams.
  • Excellent analytical and troubleshooting skills.
  • Customer-focused and results-driven approach.
  • Passion for innovation and continuous improvement in silicon packaging and board design.

Qualifications:
Minimum qualifications are required to be initially considered for this position.
Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. This position is not eligible for Intel immigration sponsorship
Minimum Qualifications
  • Master's degree in Electrical Engineering or Mechanical Engineering.
  • +10 years of experience with PCB layout utilizing Cadence Allegro and Cadence Constraint Manager.
  • +5 years of experience in:
    • Hardware development including: Schematic Entry, Signal Integrity, and Power Delivery practices and theories, constraint entry, library creation, DFM, DFX.
    • Managing highly complex PCB designs both individually as well as part of a team while working across multiple sites.
    • Expertise in board design and development, interconnect methodologies, and manufacturability principles.
    • Expertise in various board technologies and manufacturing process and fundamentals.
    • Demonstrated experience and proficiency with board design rules and design rule check resolution.

Preferred Qualifications
  • Experience with additional PCB design tools such as Siemens Xpedition.
  • Minimum of 8 years of experience with a broad range of PCB form factors, HDI/Type4 PCB technology.
  • Previous experience with communicating with board manufacturing vendors to review and obtain design approval meeting vendors manufacturing capabilities.
  • Experience interacting with board vendors regarding their capability and design rules roadmap and align internal design teams on design rules roadmap.
  • Previous experience managing external CAD contract workers to meet project demands.
  • Manage multiple projects, schedules, and multi-disciplined teams in a dynamic, fast-paced environment working across organization boundaries and geographies.

Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Arizona, Phoenix
Additional Locations:
US, Oregon, Hillsboro
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $164,470.00-232,190.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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