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Silicon Package Design Engineer Jobs (NOW HIRING)

Broadcom

Package Design Engineer

Austin, TX

$141K - $226K/yr

Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part ...

K2 Space

OR · On-site

$180K - $260K/yr

Partner with silicon, RF, and systems teams to co-optimize die floorplans and package interfaces ... Engineering, or a related field. * 5+ years of experience in ASIC package design, with deep ...

Broadcom

Package Design Engineer

San Jose, CA · On-site

$141K - $226K/yr

Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part ...

K2 Space

Principal ASIC Package Design Engineer

$200K - $280K/yr

Partner with silicon, RF, and systems teams to co-optimize die floorplans and package interfaces ... Engineering, or a related field. * 10+ years of experience in ASIC package design, with deep ...

Broadcom, Inc.

Package Design Engineer

San Jose, CA · On-site

$141K - $226K/yr

Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part ...

Broadcom

Package Design Engineer

Fort Collins, CO

$141K - $226K/yr

Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part ...

Galent

IC Packaging Design Engineer

Chandler, AZ · On-site

$138K/yr

The ideal candidates will possess strong expertise in package and substrate design, with hands-on ... Collaborate with cross-functional teams including silicon, system, SI/PI, manufacturing, and ...

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Silicon Package Design Engineer information

See salary details

$90K

$136.5K

How much do silicon package design engineer jobs pay per year?

As of Jul 3, 2026, the average yearly pay for silicon package design engineer in the United States is $135,040.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What is the difference between Silicon Package Design Engineer vs PCB Design Engineer?

AspectSilicon Package Design EngineerPCB Design Engineer
CredentialsBachelor's or Master's in Electrical Engineering, VLSI, or related fieldsBachelor's or Master's in Electrical Engineering, Electronics, or related fields
Work EnvironmentSemiconductor fabrication labs, design houses, R&D centersElectronics manufacturing, design firms, product development teams
Industry UsageSemiconductor industry, integrated circuit designConsumer electronics, industrial equipment, communication devices
Primary FocusDesigning silicon chip packages, ensuring electrical and thermal performanceDesigning printed circuit boards for electronic products

The Silicon Package Design Engineer focuses on creating and optimizing the packaging of silicon chips, ensuring electrical connectivity and thermal management. In contrast, the PCB Design Engineer specializes in designing printed circuit boards that connect various electronic components. While both roles require electrical engineering knowledge, their work environments and end products differ significantly.

What types of cross-functional teams do Silicon Package Design Engineers typically collaborate with, and how does this affect daily workflow?

Silicon Package Design Engineers often work closely with electrical engineers, mechanical engineers, manufacturing teams, and product managers to ensure package designs meet performance, reliability, and manufacturability standards. This collaborative environment means that daily tasks often involve design reviews, resolving integration challenges, and coordinating updates based on feedback from various disciplines. Effective communication and teamwork are essential, as design changes in one area can significantly impact other aspects of the product. This cross-functional dynamic offers valuable insight into the entire product development lifecycle and fosters broad technical growth.

What does a Silicon Package Design Engineer do?

A Silicon Package Design Engineer is responsible for designing the physical packaging that houses silicon chips, ensuring optimal electrical performance, thermal management, and mechanical integrity. They collaborate with cross-functional teams to develop package layouts, select materials, and address challenges related to signal integrity, power distribution, and manufacturability. Their work is crucial for protecting the silicon die and enabling reliable integration into electronic devices. This role often involves using specialized design software and working closely with fabrication and testing teams to deliver high-quality, cost-effective packaging solutions.

What is the salary of silicon Design Engineer?

The salary of a Silicon Package Design Engineer typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Entry-level positions may start lower, while experienced engineers with specialized skills in IC packaging and CAD tools can earn higher salaries.

How much does a silicon packaging Design Engineer make at Intel?

A silicon packaging design engineer at Intel typically earns between $80,000 and $130,000 annually, depending on experience, education, and location. Salaries may also include bonuses and stock options, with roles often requiring knowledge of CAD tools and industry standards.

What engineer makes $500,000 a year?

Silicon Package Design Engineers typically do not earn $500,000 annually; such high salaries are more common among executive roles or senior engineers with extensive experience, specialized skills, and leadership responsibilities. Compensation at this level often includes bonuses, stock options, or profit sharing, especially in high-tech companies or startups.

What engineers make $300,000 a year?

Senior Silicon Package Design Engineers with extensive experience, advanced skills in IC packaging, and proficiency in tools like CAD and simulation software can earn $300,000 or more annually. High compensation is often associated with roles in leading tech companies, specialized expertise, and sometimes managerial responsibilities.

What are the key skills and qualifications needed to thrive as a Silicon Package Design Engineer, and why are they important?

To thrive as a Silicon Package Design Engineer, you need a solid background in electrical or materials engineering, semiconductor packaging principles, and experience with design for manufacturability. Proficiency in industry-standard EDA tools such as Cadence, Mentor Graphics, or Ansys, along with familiarity with simulation and layout software, is typically required. Strong problem-solving skills, attention to detail, and effective communication are critical for collaborating with multidisciplinary teams and resolving design challenges. These skills and qualifications are essential for delivering reliable, high-performance semiconductor packages that meet stringent industry standards.
More about Silicon Package Design Engineer jobs
What job categories do people searching Silicon Package Design Engineer jobs look for? The top searched job categories for Silicon Package Design Engineer jobs are:
Silicon Package Design Engineer jobs near you
Infographic showing various Silicon Package Design Engineer job openings in the United States as of June 2026, with employment types broken down into 94% Full Time, and 6% Part Time. Highlights an 88% Physical, 5% Hybrid, and 7% Remote job distribution, with an average salary of $135,040 per year, or $64.9 per hour.
Package Design Engineer

Package Design Engineer

Broadcom

Austin, TX

$141K - $226K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 24 days ago

Broadcom rating

8.7

Company rating: 8.7 out of 10

Based on 23 frontline employees who took The Breakroom Quiz

11th of 141 rated electronics manufacturers

Job description

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Job Description:

Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part of a worldwide R&D team developing high-performance package designs for ASICs for artificial intelligence (AI), networking, high-performance computing (HPC), and 5G base stations. These designs include SerDes at 224G and higher, 5G RF/Microwave ADC/DAC, HBM, DDR5 and more. You'll have the opportunity to collaborate with the team to create the package structures needed to enable new design, and contribute to efficiency improvements for our design team.

RESPONSIBILITIES:

  • Overall design responsibility for ASIC package designs, including aspects of signal integrity, power integrity, manufacturability, reliability, and thermal, in partnership with our experienced team of package engineering experts.
  • Package Design of critical structures for SerDes, ADC/DAC, DDR, etc.
  • Schedule, prioritize, & track your work across 2+ projects simultaneously
  • General flip-chip BGA package design & engineering
  • Project management and customer interface for your design projects
  • Contribute to efficiency improvements for the design team, through process development/improvement, automation, documentation, etc.
  • Physical design (layout) is a foundational responsibility in this role


EDUCATION/EXPERIENCE & REQUIREMENTS:

  • BSEE or similar field and 12+ years' experience in flip-chip-BGA package design, including high-speed SerDes or MSEE or similar field and 10+ years' work experience
  • Knowledge of package-level signal integrity and power integrity, to apply to package designs
  • Cadence APD (allegro package designer) experience is preferred. Equivalent tool is OK.
  • Cooperate with our world-wide team (multiple time zones), including co-design with internal team members and external (Vendor) designers
  • Self-management and organization skills
  • Preferred candidates will also have1 or more years experience with Cadence SKILL for Allegro, or similar design-automation coding experience and interest

OTHER REQUIREMENTS

  • This job requires working on-site at the Broadcom office, 5 days a week. This is not a remote-work position

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $141,300 - $226,000.

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

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