$185 - $325/hr
Cupertino, California, United States Hardware Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will ...
$185 - $325/hr
Cupertino, California, United States Hardware Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will ...
$185 - $325/hr
Cupertino, California, United States Hardware Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will ...
San Jose, CA · On-site
$236K/yr
You will help define circuits and architecture for Serdes IPs, clock generation as well as traditional analog circuits. You'll supervise designers to deliver the complete design and to support ...
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San Jose, CA · On-site
$236K/yr
You will help define circuits and architecture for Serdes IPs, clock generation as well as traditional analog circuits. You'll supervise designers to deliver the complete design and to support ...
San Diego, CA · On-site
$175 - $309/hr
Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will contribute to the design, integration and ...
San Diego, CA · On-site
$175 - $309/hr
Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will contribute to the design, integration and ...
Irvine, CA · On-site
$150K - $250K/yr
ASIC Design Engineer - DSP / Analog / SerDes Celero Communications is an exciting and fast-growing semiconductor startup developing innovative technologies that power next-generation AI and data ...
Irvine, CA · On-site
$150K - $250K/yr
ASIC Design Engineer - DSP / Analog / SerDes Celero Communications is an exciting and fast-growing semiconductor startup developing innovative technologies that power next-generation AI and data ...
San Jose, CA · On-site
$236K/yr
You will help define circuits and architecture for Serdes IPs, clock generation as well as traditional analog circuits. You'll supervise designers to deliver the complete design and to support ...
San Jose, CA · On-site
$236K/yr
You will help define circuits and architecture for Serdes IPs, clock generation as well as traditional analog circuits. You'll supervise designers to deliver the complete design and to support ...
San Francisco, CA · On-site
$262.50 - $394/hr
AMS SerDes Robustness Analysis Validation Architect San Francisco Bay Area, California, United States Hardware Are you inherently curious, hands‑on, and analytical? We are seeking a seasoned SerDes ...
San Francisco, CA · On-site
$262.50 - $394/hr
AMS SerDes Robustness Analysis Validation Architect San Francisco Bay Area, California, United States Hardware Are you inherently curious, hands‑on, and analytical? We are seeking a seasoned SerDes ...
Description Ownership of SerDes system bring-up, validation and debug. This will involve a SerDes bring up in system environment, verifying basic operations, analyzing robustness and margins in ...
Description Ownership of SerDes system bring-up, validation and debug. This will involve a SerDes bring up in system environment, verifying basic operations, analyzing robustness and margins in ...
San Francisco, CA · On-site
$286K/yr
This position requires deep expertise in leading-edge SerDes technologies (224G+), modern interconnect protocols, and system-level co-design. Description As the SIPI Architect, you will define and ...
San Francisco, CA · On-site
$286K/yr
This position requires deep expertise in leading-edge SerDes technologies (224G+), modern interconnect protocols, and system-level co-design. Description As the SIPI Architect, you will define and ...
San Jose, CA · On-site
$178K - $331K/yr
SerDes IPSystemsEngineering Director Description: This is a unique opportunityto join the rapidly growingDie-to-Die Interface IP team in the Silicon Solutions R&D Group at Cadence Design Systems. We ...
San Jose, CA · On-site
$178K - $331K/yr
SerDes IPSystemsEngineering Director Description: This is a unique opportunityto join the rapidly growingDie-to-Die Interface IP team in the Silicon Solutions R&D Group at Cadence Design Systems. We ...
The electrical characterization team is a post silicon validation sub-group focused on the debug and characterization of SERDES interfaces for various applications on the products. Characterization ...
The electrical characterization team is a post silicon validation sub-group focused on the debug and characterization of SERDES interfaces for various applications on the products. Characterization ...
$175K - $308K/yr
Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will contribute to the design, integration and ...
$175K - $308K/yr
Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will contribute to the design, integration and ...
$175K - $308K/yr
Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will contribute to the design, integration and ...
$175K - $308K/yr
Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will contribute to the design, integration and ...
$122K - $214K/yr
Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will contribute to the design, integration and ...
$122K - $214K/yr
Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will contribute to the design, integration and ...
$175K - $308K/yr
Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will contribute to the design, integration and ...
$175K - $308K/yr
Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will contribute to the design, integration and ...
San Jose, CA · On-site
$150K - $250K/yr
ASIC Design Engineer - DSP / Analog / SerDes Celero Communications is an exciting and fast-growing semiconductor startup developing innovative technologies that power next-generation AI and data ...
San Jose, CA · On-site
$150K - $250K/yr
ASIC Design Engineer - DSP / Analog / SerDes Celero Communications is an exciting and fast-growing semiconductor startup developing innovative technologies that power next-generation AI and data ...
Cupertino, CA · On-site
$185 - $325/hr
Cupertino, California, United States Hardware Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will ...
Cupertino, CA · On-site
$185 - $325/hr
Cupertino, California, United States Hardware Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will ...
Austin, TX · On-site
$184K - $324K/yr
Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will contribute to the design, integration and ...
Austin, TX · On-site
$184K - $324K/yr
Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will contribute to the design, integration and ...
Austin, TX · On-site
$184K - $324K/yr
Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will contribute to the design, integration and ...
Austin, TX · On-site
$184K - $324K/yr
Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will contribute to the design, integration and ...
San Francisco, CA · On-site
$286K/yr
This position requires deep expertise in leading-edge SerDes technologies (224G+), modern interconnect protocols, and system-level co-design. Description As the SIPI Architect, you will define and ...
San Francisco, CA · On-site
$286K/yr
This position requires deep expertise in leading-edge SerDes technologies (224G+), modern interconnect protocols, and system-level co-design. Description As the SIPI Architect, you will define and ...
San Jose, CA · On-site
$150K - $250K/yr
ASIC Design Engineer - DSP / Analog / SerDes Celero Communications is an exciting and fast-growing semiconductor startup developing innovative technologies that power next-generation AI and data ...
San Jose, CA · On-site
$150K - $250K/yr
ASIC Design Engineer - DSP / Analog / SerDes Celero Communications is an exciting and fast-growing semiconductor startup developing innovative technologies that power next-generation AI and data ...
$96K is the 25th percentile. Wages below this are outliers.
$80.5K - $99.6K
31% of jobs
$99.6K - $118.7K
5% of jobs
The median wage is $132.5K / yr.
$118.7K - $137.8K
19% of jobs
$152.5K is the 75th percentile. Wages above this are outliers.
$137.8K - $156.9K
26% of jobs
$156.9K - $176K
13% of jobs
$176K - $195K
4% of jobs
$195K - $214.1K
0% of jobs
$214.1K - $233.2K
0% of jobs
$233.2K - $252.3K
0% of jobs
$252.3K - $271.4K
1% of jobs
$271.4K - $290.5K
1% of jobs
$80.5K
$141.4K
$290.5K
| Aspect | Serdes | Network Engineer |
|---|---|---|
| Required Credentials | Typically certifications in electronics, FPGA, or hardware design | Networking certifications like CCNA, CCNP, or CompTIA Network+ |
| Work Environment | Hardware labs, manufacturing facilities, R&D centers | Office settings, data centers, client sites |
| Industry Usage | Telecommunications, data communications, hardware manufacturing | IT, telecommunications, enterprise networks |
Serdes (Serializer/Deserializer) specialists focus on hardware design and signal integrity in communication systems, while Network Engineers manage network infrastructure and connectivity. Both roles require technical expertise but differ in their focus areas and work environments. Understanding these differences helps in choosing the right career path or job search focus.
Cities with the most Serdes job openings:
The most popular types of Serdes jobs are:
States with the most job openings for Serdes jobs include:
The top searched job categories for Serdes jobs are:

$185 - $325/hr
Other
Medical, Dental, Retirement
Posted 4 days ago
8.1
Based on 680 frontline employees who took The Breakroom Quiz
6th of 30 rated technology retailers
Cupertino, California, United States Hardware
Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will contribute to the design, integration and validation of high-performance analog and mixed-signal circuits for SerDes PHY applications. This encompasses the design and optimization of critical building blocks such as receivers, transmitters, bias generators, high-speed clock generation and distribution networks targeting best-in-class power, performance, and area metrics. A key part of your design responsibilities will include the development of analog DFT circuits and techniques essential for comprehensive PHY validation. You will develop test plans, review and analyze data to guarantee a robust IP design. You will drive and work closely with production test (e.g. ATE, system validation) teams and debug complex design and system bring-up issues.At Apple, we strive every day to create products that enrich people’s lives — a mission that brings exciting challenges in SOC/PHY design! We’re looking for individuals with strong fundamentals and a proven track record to tackle complex technical problems. You are driven by curiosity, eager to learn new skills, and motivated to maximize the impact of your work. You see the big picture while diving deeply into details to innovate and solve problems. You thrive in collaborative, diverse teams, maintaining a positive spirit even when challenges arise. Above all, you care about making a difference in society and demonstrate leadership through meaningful contributions.We have an opportunity for a forward-thinking and especially hardworking system validation engineer with strong background in high-speed serial links. As a member of our dynamic team, you will have the rare and rewarding opportunity to work on upcoming products that will surprise and delight millions of Apple’s customers every day.And all of this while enjoying a great culture where you own your career.
DescriptionIn this role, the key responsibilities are the following:Ownership of SerDes system bring-up, validation and debug. This will involve a SerDes bring up in system environment, verifying basic operations, analyzing robustness and margins in system.Work with design teams to understand the architecture and define DFT needs to help enhance testability and first-time silicon success.Be involved in mixed-signal verification tasks to better understand the SerDes operation and interaction with higher level control logic.
Minimum QualificationsAt Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $184,700 and $324,800, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant
At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong. Learn about accessibility in Apple’s workplace Learn about reasonable accommodations for job applicants
Apple accepts applications to this posting on an ongoing basis.
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Computer and electronic product manufacturing
10,000+ Employees
Cupertino, CA, US
1976