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Serdes Jobs (NOW HIRING)

Celero Communications, Inc.

SerDes Lead Designer

Irvine, CA · On-site

$150K - $250K/yr

About the job We are looking for a SerDes Lead Designer, who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology to power next generation AI. Preferred Location ...

Apple

SerDes Micro Architect

San Diego, CA · On-site

The SERDES IPs will be used in Apple silicon offering breakthrough power and performance for iPhone, iPad, Mac, and Apple Watch. You will define the Micro Architecture of analog mixed-signal IPs with ...

Apple

SerDes Micro Architect

Cupertino, CA · On-site

The SERDES IPs will be used in Apple silicon offering breakthrough power and performance for iPhone, iPad, Mac, and Apple Watch. You will define the Micro Architecture of analog mixed-signal IPs with ...

Apple

SerDes Micro Architect

Beaverton, OR · On-site

The SERDES IPs will be used in Apple silicon offering breakthrough power and performance for iPhone, iPad, Mac, and Apple Watch. Description You will define the Micro Architecture of analog mixed ...

Apple

SerDes Micro Architect

Beaverton, OR · On-site

The SERDES IPs will be used in Apple silicon offering breakthrough power and performance for iPhone, iPad, Mac, and Apple Watch. You will define the Micro Architecture of analog mixed-signal IPs with ...

Apple

SerDes System Validation Engineer

Cupertino, CA · On-site

We are looking for a SerDes System Validation Engineer to lead system validation of mixed-signal SerDes IP. In this highly visible role, you will actively work within Analog-Mixed/Signal design team ...

Apple

SerDes Micro Architect

San Diego, CA · On-site

$171.60K - $302.20K/yr

The SERDES IPs will be used in Apple silicon offering breakthrough power and performance for iPhone, iPad, Mac, and Apple Watch. Description You will define the Micro Architecture of analog mixed ...

Apple

SerDes System Validation Engineer

Cupertino, CA · On-site

Role Number: 200631237-0836 Summary We are looking for a SerDes System Validation Engineer to lead system validation of mixed-signal SerDes IP. In this highly visible role, you will actively work ...

Apple

SerDes System Validation Engineer

Austin, TX

Description Ownership of SerDes system bring-up, validation and debug. This will involve a SerDes bring up in system environment, verifying basic operations, analyzing robustness and margins in ...

Apple

SerDes System Validation Engineer

Cupertino, CA · On-site

We are looking for a SerDes System Validation Engineer to lead system validation of mixed-signal SerDes IP. In this highly visible role, you will actively work within Analog-Mixed/Signal design team ...

Apple

SerDes System Validation Engineer

Cupertino, CA

$126.80K - $220.90K/yr

We are looking for a SerDes System Validation Engineer to lead system validation of mixed-signal SerDes IP. In this highly visible role, you will actively work within Analog-Mixed/Signal design team ...

Apple

SerDes Micro Architect

Cupertino, CA · On-site

$181.10K - $318.40K/yr

The SERDES IPs will be used in Apple silicon offering breakthrough power and performance for iPhone, iPad, Mac, and Apple Watch. Description You will define the Micro Architecture of analog mixed ...

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Serdes information

See salary details

$80.5K

$141.4K

$290.5K

How much do serdes jobs pay per year?

As of May 28, 2026, the average yearly pay for serdes in the United States is $141,351.00, according to ZipRecruiter salary data. Most workers in this role earn between $95,000.00 and $158,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a SerDes Engineer, and why are they important?

To thrive as a SerDes Engineer, you need strong expertise in high-speed digital and analog circuit design, signal integrity, and a degree in electrical or electronics engineering. Familiarity with EDA tools like Cadence or Synopsys, experience in simulation software, and knowledge of relevant standards (e.g., PCIe, USB, Ethernet) are typically required. Excellent problem-solving abilities, attention to detail, and effective teamwork make someone stand out in this role. These skills are crucial for ensuring robust, high-performance serial communication interfaces in advanced electronic systems.

What are some common challenges faced by SerDes engineers during high-speed interface design projects?

SerDes engineers often encounter challenges related to signal integrity, such as minimizing jitter and crosstalk when working with high-speed data transmission. Achieving reliable performance requires careful PCB layout, selection of appropriate materials, and thorough simulation and validation. Additionally, SerDes engineers must frequently collaborate with hardware, firmware, and verification teams to ensure seamless integration and compliance with industry standards like PCIe or Ethernet. Staying updated with rapidly evolving protocols and troubleshooting interoperability issues are also common aspects of the role.

What are SerDes engineers?

SerDes engineers are professionals who design, develop, and test Serializer/Deserializer (SerDes) circuits and systems. SerDes technology is used to convert data between serial and parallel interfaces, enabling high-speed data transmission in electronics such as computer motherboards, network devices, and integrated circuits. These engineers work on optimizing signal integrity, reducing power consumption, and ensuring reliable data transfer over high-speed links. Their expertise is critical in industries like telecommunications, data centers, and consumer electronics.

What is the difference between Serdes vs Network Engineer?

AspectSerdesNetwork Engineer
Required CredentialsTypically certifications in electronics, FPGA, or hardware designNetworking certifications like CCNA, CCNP, or CompTIA Network+
Work EnvironmentHardware labs, manufacturing facilities, R&D centersOffice settings, data centers, client sites
Industry UsageTelecommunications, data communications, hardware manufacturingIT, telecommunications, enterprise networks

Serdes (Serializer/Deserializer) specialists focus on hardware design and signal integrity in communication systems, while Network Engineers manage network infrastructure and connectivity. Both roles require technical expertise but differ in their focus areas and work environments. Understanding these differences helps in choosing the right career path or job search focus.

More about Serdes jobs
What cities are hiring for Serdes jobs? Cities with the most Serdes job openings:
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Serdes jobs near you
Infographic showing various Serdes job openings in the United States as of May 2026, with employment types broken down into 94% Full Time, and 6% Contract. Highlights an 88% In-person, 6% Hybrid, and 6% Remote job distribution, with an average salary of $141,351 per year, or $68 per hour.

SerDes Lead Designer

Celero Communications, Inc.

Irvine, CA • On-site

$150K - $250K/yr

Full-time

Posted 21 days ago

Job description

About the job
We are looking for a SerDes Lead Designer, who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology to power next generation AI.
Preferred Location - On-Site at our Irvine, CA HQ
Alternate Location - San Jose, California; Vancouver, British Columbia; Ottawa, Ontario
Candidate will have the opportunity to architect and design SerDes for next generation transceivers.
What You Will Do:
  • Define architecture, specifications, and circuit topologies for next-generation SerDes
  • Overview development of system-level modelling, with behavioral models (e.g., MATLAB, SystemVerilog, Verilog-A) to analyze link budgets, equalization strategies and jitter budgeting
  • Design high-performance analog/mixed-signal circuits in advanced node technologies
  • Develop and overview the design of critical blocks including RX/TX equalization (CTLE, DFE), High-speed PLLs, Phase interpolators, DLLs, TDCs
  • Implement digitally assisted analog circuits, background calibration, and adaptive loops to improve Power, Performance, Area
  • Oversee physical layout to minimize parasitics, device stress, electromigration and process variation impacts
  • Overview of the analysis of Signal Integrity and Power Integrity to achieve system-defined targets
  • Lead lab validation, debugging and characterization of SerDes IPs within our state-of-the-art lab
  • Correlate silicon measurements with simulated data, and lead performance optimization in the system environment

What You Will Bring:
  • Master's degree and/or PhD in Electrical Engineering or related fields with 10+ years of relevant experience in SerDes design
  • Proven record of taking high-speed SerDes design to tape-out and volume production
  • Experience in lab bring-up, characterization, and debugging designs that reach out production
  • Must have extensive experience with advanced node technologies (16nm/12nm, 7nm, 5nm, 3nm, 2nm processes)
  • Prior experience in cross-functional interaction to deliver IP and ensuring seamless integration in SOCs
  • Strong communication and documentation skills

Salary Range
$150,000 - $250,000 Annually
The final offer will be determined based on job-related skills, experience, qualifications, and location.

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