The ideal candidate will bring hands-on experience in semiconductor packaging, materials science, and electronics manufacturing processes, with a passion for technical innovation and attention to ...
The ideal candidate will bring hands-on experience in semiconductor packaging, materials science, and electronics manufacturing processes, with a passion for technical innovation and attention to ...
Senior IC Packaging Designer
Atlanta, GA · On-site
$98K - $104K/yr
Are you passionate about advancing semiconductor technologies and enabling next-generation wireless ... Falcomm is seeking an IC Packaging Designer to support the development and implementation of ...
Quick apply
Senior IC Packaging Designer
Atlanta, GA · On-site
$98K - $104K/yr
Are you passionate about advancing semiconductor technologies and enabling next-generation wireless ... Falcomm is seeking an IC Packaging Designer to support the development and implementation of ...
Senior IC Packaging Designer
$98K - $104K/yr
Are you passionate about advancing semiconductor technologies and enabling next-generation wireless ... Falcomm is seeking an IC Packaging Designer to support the development and implementation of ...
Senior IC Packaging Designer
$98K - $104K/yr
Are you passionate about advancing semiconductor technologies and enabling next-generation wireless ... Falcomm is seeking an IC Packaging Designer to support the development and implementation of ...
As a cornerstone of our Semiconductor Power Product Group, our packaging technology is where cutting-edge silicon meets real-world application. As the industry pivots toward AI/ML hardware, high ...
Quick apply
As a cornerstone of our Semiconductor Power Product Group, our packaging technology is where cutting-edge silicon meets real-world application. As the industry pivots toward AI/ML hardware, high ...
As a cornerstone of our Semiconductor Power Product Group, our packaging technology is where cutting-edge silicon meets real-world application. As the industry pivots toward AI/ML hardware, high ...
As a cornerstone of our Semiconductor Power Product Group, our packaging technology is where cutting-edge silicon meets real-world application. As the industry pivots toward AI/ML hardware, high ...
As a cornerstone of our Semiconductor Power Product Group, our packaging technology is where cutting-edge silicon meets real-world application. As the industry pivots toward AI/ML hardware, high ...
As a cornerstone of our Semiconductor Power Product Group, our packaging technology is where cutting-edge silicon meets real-world application. As the industry pivots toward AI/ML hardware, high ...
As a member of our Packaging team, you'll have the chance to interact with many product groups and ... TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded ...
As a member of our Packaging team, you'll have the chance to interact with many product groups and ... TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded ...
Designing and developing semiconductor packages * Driving the full package development lifecycle - package definition, stack-up, substrate layout, bond diagrams, drawings, predictive modeling ...
Designing and developing semiconductor packages * Driving the full package development lifecycle - package definition, stack-up, substrate layout, bond diagrams, drawings, predictive modeling ...
Packaging Engineer ll
Newburyport, MA · On-site
As a licensed semiconductor manufacturer, Rochester has manufactured over 20,000 device types. With ... Packaging Engineer General Summary The Packaging Engineer II is responsible for executing ...
Packaging Engineer ll
Newburyport, MA · On-site
As a licensed semiconductor manufacturer, Rochester has manufactured over 20,000 device types. With ... Packaging Engineer General Summary The Packaging Engineer II is responsible for executing ...
Build and layout of semiconductor packages including QFN, SiP, WL-CSP, RDL, Flip Chip, FO-WLP and Interposers * Ensure early success in package development with modeling and simulation for thermal ...
Build and layout of semiconductor packages including QFN, SiP, WL-CSP, RDL, Flip Chip, FO-WLP and Interposers * Ensure early success in package development with modeling and simulation for thermal ...
Build and layout of semiconductor packages including QFN, SiP, WL-CSP, RDL, Flip Chip, FO-WLP and Interposers * Ensure early success in package development with modeling and simulation for thermal ...
Build and layout of semiconductor packages including QFN, SiP, WL-CSP, RDL, Flip Chip, FO-WLP and Interposers * Ensure early success in package development with modeling and simulation for thermal ...
As a licensed semiconductor manufacturer, Rochester has manufactured over 20,000 device types. With ... Packaging Engineer General Summary The Packaging Engineer II is responsible for executing ...
As a licensed semiconductor manufacturer, Rochester has manufactured over 20,000 device types. With ... Packaging Engineer General Summary The Packaging Engineer II is responsible for executing ...
Silicon Photonics Packaging Technical Leader- (Hybrid)
Carlsbad, CA · On-site
$148K - $212K/yr
Serve as the primary technical interface for the Client Optics Group with top-tier Outsourced Semiconductor Assembly & Test (OSAT) driving advanced package assembly, test, and qualification for ...
Silicon Photonics Packaging Technical Leader- (Hybrid)
Carlsbad, CA · On-site
$148K - $212K/yr
Serve as the primary technical interface for the Client Optics Group with top-tier Outsourced Semiconductor Assembly & Test (OSAT) driving advanced package assembly, test, and qualification for ...
Senior Package Modeling Engineer
Santa Clara, CA · On-site
$122K - $168K/yr
Conduct Finite Element Analysis (FEA) to assess stress, warpage, and thermo-mechanical behavior throughout advanced semiconductor packaging platforms. * Contribute to packaging technology direction ...
Senior Package Modeling Engineer
Santa Clara, CA · On-site
$122K - $168K/yr
Conduct Finite Element Analysis (FEA) to assess stress, warpage, and thermo-mechanical behavior throughout advanced semiconductor packaging platforms. * Contribute to packaging technology direction ...
Your technical credibility in semiconductor packaging will enable you to influence cross-functional teams, facilitate collaborative problem-solving sessions, and ensure corrective actions address ...
Your technical credibility in semiconductor packaging will enable you to influence cross-functional teams, facilitate collaborative problem-solving sessions, and ensure corrective actions address ...
Your technical credibility in semiconductor packaging will enable you to influence cross-functional teams, facilitate collaborative problem-solving sessions, and ensure corrective actions address ...
Your technical credibility in semiconductor packaging will enable you to influence cross-functional teams, facilitate collaborative problem-solving sessions, and ensure corrective actions address ...
Senior Package Modeling Engineer
Santa Clara, CA · Hybrid
$122K - $168K/yr
Conduct Finite Element Analysis (FEA) to assess stress, warpage, and thermo-mechanical behavior throughout advanced semiconductor packaging platforms. * Contribute to packaging technology direction ...
Senior Package Modeling Engineer
Santa Clara, CA · Hybrid
$122K - $168K/yr
Conduct Finite Element Analysis (FEA) to assess stress, warpage, and thermo-mechanical behavior throughout advanced semiconductor packaging platforms. * Contribute to packaging technology direction ...
Packaging Assembly Engineer
Austin, TX · On-site
S. or PhD in Materials Science, Mechanical Engineering, Chemical Engineering, Electrical Engineering or an equivalent field is desired. 5+ years of extensive experience in Semiconductor Packaging ...
Packaging Assembly Engineer
Austin, TX · On-site
S. or PhD in Materials Science, Mechanical Engineering, Chemical Engineering, Electrical Engineering or an equivalent field is desired. 5+ years of extensive experience in Semiconductor Packaging ...
You will be the Semiconductor Hermetic Packaging Process Engineer for the Semiconductor Packaging Team. Our team is responsible for advancing hermetic packaging solutions for infrared sensor modules.
You will be the Semiconductor Hermetic Packaging Process Engineer for the Semiconductor Packaging Team. Our team is responsible for advancing hermetic packaging solutions for infrared sensor modules.
NIST PREP Postdoc Associate in Reliability Testing and Failure Analysis for Advanced Semiconductor P
Gaithersburg, MD · On-site
$82K - $87K/yr
Reliability Testing and Failure Analysis for Advanced Semiconductor Packaging The work will entail: The Infrastructure Materials Group at the National Institute of Standards and Technology seeks a ...
NIST PREP Postdoc Associate in Reliability Testing and Failure Analysis for Advanced Semiconductor P
Gaithersburg, MD · On-site
$82K - $87K/yr
Reliability Testing and Failure Analysis for Advanced Semiconductor Packaging The work will entail: The Infrastructure Materials Group at the National Institute of Standards and Technology seeks a ...
Semiconductor Packaging information
See salary details
$12.50 - $13.83
2% of jobs
$13.83 - $15.17
9% of jobs
$16.23 is the 25th percentile. Wages below this are outliers.
$15.17 - $16.50
17% of jobs
The median wage is $17.55 / hr.
$16.50 - $17.83
27% of jobs
$17.83 - $19.17
15% of jobs
$19.57 is the 75th percentile. Wages above this are outliers.
$19.17 - $20.50
15% of jobs
$20.50 - $21.83
6% of jobs
$21.83 - $23.16
4% of jobs
$23.16 - $24.50
3% of jobs
$24.50 - $25.83
1% of jobs
$25.83 - $27.16
0% of jobs
$12
$18
$27
How much do semiconductor packaging jobs pay per hour?
What is the difference between Semiconductor Packaging vs Semiconductor Test Engineer?
| Aspect | Semiconductor Packaging | Semiconductor Test Engineer |
|---|---|---|
| Primary Focus | Designing and assembling packaging solutions for chips | Testing and validating semiconductor devices for performance |
| Required Skills | Materials, mechanical design, manufacturing processes | Electrical testing, data analysis, test equipment operation |
| Work Environment | Manufacturing floors, R&D labs | Testing labs, production lines |
| Common Certifications | None specific, often engineering degrees |
Semiconductor Packaging and Semiconductor Test Engineer roles both operate within the semiconductor industry but focus on different stages of product development. Packaging involves creating protective and functional enclosures for chips, while testing ensures the chips meet performance standards. Both roles require technical knowledge and often collaborate during product development.
What is semiconductor packaging?
What is packaging in the semiconductor industry?
What are the key skills and qualifications needed to thrive in Semiconductor Packaging, and why are they important?
How much do semiconductor workers make?
What are some semiconductor packaging companies?
What are some of the common challenges faced in a Semiconductor Packaging role, and how can new hires effectively address them?
What does a semiconductor packaging engineer do?
SpaceX rating
8.7
Based on 144 frontline employees who took The Breakroom Quiz
14th of 60 rated aerospace companies
Job description
IC PACKAGE ENGINEER (STARLINK/AKOUSTIS)
Akoustis is now operating as a wholly owned subsidiary of SpaceX, providing industry leading RF filters using patented XBAW technology to help drive the mission of making human life multi-planetary and connecting the world through Starlink. We design, build, launch, and operate the world's largest constellation of satellites, enabling us to operate a global internet network unbounded by traditional ground infrastructure limitations. The root of SpaceX's success so far lies in our mission to keep all engineering and production in-house, which enables a tight feedback loop, nimble decision-making, and speedy deliverables. With millions of daily users worldwide already online, Starlink is truly a game-changer and levels the playing field for those who were previously unconnected.
We are looking for a highly skilled and motivated IC Package Engineer to lead the development, qualification, and implementation of advanced integrated circuit (IC) packaging solutions. In this role, you'll play a critical part in enabling high-reliability, high-performance electronics for cutting-edge applications. You will work cross-functionally with design, manufacturing, reliability, supply chain, and failure analysis teams to deliver optimized semiconductor packaging that meets stringent thermal, mechanical, and electrical requirements. The ideal candidate will bring hands-on experience in semiconductor packaging, materials science, and electronics manufacturing processes, with a passion for technical innovation and attention to detail.
RESPONSIBILITIES:
- Design, develop, and qualify IC packaging technologies including flip-chip, wire bonding, wafer-level packaging (WLP), QFN, CSP, and LGA
- Evaluate and select packaging materials (substrates, mold compounds, underfills, adhesives) based on thermal, mechanical, and electrical properties
- Drive thermal management strategies within packages, including simulation and implementation of heat dissipation techniques
- Define and execute reliability test plans (e.g., thermal cycling, uHAST, HTOL) for qualification of package designs
- Utilize EDA/CAD tools (e.g., AutoCAD) for mechanical layout, with experience in ANSYS or other simulation tools as a plus
- Apply DFM methodologies to ensure manufacturability, reliability, and testability from concept through production
- Provide technical guidance for IC assembly and packaging processes, including SMT, die attach, reflow, wire bonding, underfill, and encapsulation
- Conduct and support failure analysis investigations using tools like X-ray, SEM, FIB, and cross-sectioning to drive root cause and corrective actions
- Perform root cause analysis and data-driven troubleshooting using tools such as FMEA, SPC, and Six Sigma methodologies
- Collaborate with PCB and substrate design teams to ensure co-design compatibility and package-board integration
- Own project timelines, risks, and deliverables related to packaging initiatives and report progress to key stakeholders
BASIC QUALIFICATIONS:
- Bachelor's degree in mechanical Engineering, packaging Engineering, materials science, electrical Engineering, or or other engineering discipline
- 1+ year of experience designing, qualifying, or implementing IC packaging solutions (internships and academic projects are applicable)
PREFERRED QUALIFICATIONS:
- 2+ years of hands-on experience with semiconductor packaging technologies, including:
- Flip-chip, wire bond, WLP, LGA, CSP, QFN
- Organic/inorganic substrates and PCB manufacturing
- Deep understanding of packaging materials and their thermal, mechanical, and electrical properties
- Familiarity with thermal management techniques for power-dense or mission-critical electronics
- Experience with reliability testing, including JEDEC and IPC standards (e.g., thermal cycling, uHAST, HTS, vibration)
- Knowledge of assembly processes: SMT, die attach, reflow soldering, encapsulation, underfill, etc.
- Strong analytical skills with expertise in:
- Root Cause Analysis
- Statistical Process Control (SPC)
- Six Sigma / Lean tools
- Failure Mode and Effects Analysis (FMEA)
- Experience with EDA/CAD tools such as AutoCAD (required); ANSYS or COMSOL (a plus)
- Proven ability to lead cross-functional efforts across design, reliability, manufacturing, and supply chain
- Strong project management, organizational, and communication skills
ADDITIONAL REQUIREMENTS:
- Must be willing to work extended hours and weekends as needed to meet critical milestones
- Ability to travel up to 20% domestically and internationally for supplier and manufacturing support
- Ability to perform light physical tasks (lifting up to 25 lbs, handling packaging samples)
ITAR REQUIREMENTS:
- To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.
SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceX's Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com.
About SpaceX
Sourced by ZipRecruiter
Industry
Accounting services
Company size
1,001 - 5,000 Employees
Headquarters location
Hawthorne, CA, US
Year founded
2002