Assemble optoelectronic components of FPAs into final device packaging including die attach, wire bonding, solder, inspect and test * Perform hands-on work on mechanical and electrical systems and ...
Assemble optoelectronic components of FPAs into final device packaging including die attach, wire bonding, solder, inspect and test * Perform hands-on work on mechanical and electrical systems and ...
Assemble optoelectronic components of FPAs into final device packaging including die attach, wire bonding, solder, inspect and test * Perform hands-on work on mechanical and electrical systems and ...
Assemble optoelectronic components of FPAs into final device packaging including die attach, wire bonding, solder, inspect and test * Perform hands-on work on mechanical and electrical systems and ...
Semiconductor Operations - Advanced SiP Packaging
Cupertino, CA · On-site
$85K - $116K/yr
Minimum Qualifications Strong SiP, semiconductor packaging, module assembly, or advanced packaging experience, including knowledge of assembly processes, materials, substrates, and package-level ...
Semiconductor Operations - Advanced SiP Packaging
Cupertino, CA · On-site
$85K - $116K/yr
Minimum Qualifications Strong SiP, semiconductor packaging, module assembly, or advanced packaging experience, including knowledge of assembly processes, materials, substrates, and package-level ...
Senior Packaging R&D Director, 3DIC & SI/PI
Sunnyvale, CA · On-site
$150 - $200/hr
Synopsys, Inc. in Sunnyvale, California, is seeking an experienced engineer to lead R&D strategy for semiconductor packaging solutions, focusing on advanced packaging challenges. You will work ...
Senior Packaging R&D Director, 3DIC & SI/PI
Sunnyvale, CA · On-site
$150 - $200/hr
Synopsys, Inc. in Sunnyvale, California, is seeking an experienced engineer to lead R&D strategy for semiconductor packaging solutions, focusing on advanced packaging challenges. You will work ...
IC Packaging Engineer - WLP
San Francisco, CA · On-site
... semiconductor packaging, materials, thermal, mechanical, or electrical modeling Deep experience in ... the Semiconductor Packaging field, with a proven track record taking packages from concept to HVM ...
IC Packaging Engineer - WLP
San Francisco, CA · On-site
... semiconductor packaging, materials, thermal, mechanical, or electrical modeling Deep experience in ... the Semiconductor Packaging field, with a proven track record taking packages from concept to HVM ...
Semiconductor Operations - Advanced SiP Packaging
$175K - $263K/yr
Medical
Dental
Retirement
Minimum Qualifications Strong SiP, semiconductor packaging, module assembly, or advanced packaging experience, including knowledge of assembly processes, materials, substrates, and package-level ...
Semiconductor Operations - Advanced SiP Packaging
$175K - $263K/yr
Medical
Dental
Retirement
Minimum Qualifications Strong SiP, semiconductor packaging, module assembly, or advanced packaging experience, including knowledge of assembly processes, materials, substrates, and package-level ...
Semiconductor Operations - Advanced SiP Packaging
$175K - $263K/yr
Medical
Dental
Retirement
Minimum Qualifications Strong SiP, semiconductor packaging, module assembly, or advanced packaging experience, including knowledge of assembly processes, materials, substrates, and package-level ...
Semiconductor Operations - Advanced SiP Packaging
$175K - $263K/yr
Medical
Dental
Retirement
Minimum Qualifications Strong SiP, semiconductor packaging, module assembly, or advanced packaging experience, including knowledge of assembly processes, materials, substrates, and package-level ...
Staff Engineer, Packaging Mechanical Simulation
San Jose, CA · On-site
Medical
Dental
Vision
Life
Retirement
PTO
Samsung Semiconductor is hiring for a Packaging Engineer, Mechanical Simulation role to lead the development and design evaluation of next-generation semiconductor packages and memory devices through ...
Staff Engineer, Packaging Mechanical Simulation
San Jose, CA · On-site
Medical
Dental
Vision
Life
Retirement
PTO
Samsung Semiconductor is hiring for a Packaging Engineer, Mechanical Simulation role to lead the development and design evaluation of next-generation semiconductor packages and memory devices through ...
This role is highly specialized in semiconductor packaging design, requiring strong EDA tool proficiency and knowledge of advanced packaging technologies. Key Responsibilities & Skills: * Tools ...
Quick apply
This role is highly specialized in semiconductor packaging design, requiring strong EDA tool proficiency and knowledge of advanced packaging technologies. Key Responsibilities & Skills: * Tools ...
Samsung Semiconductor is hiring for a Packaging Engineer, Mechanical Simulation role to lead the development and design evaluation of next‑generation semiconductor packages and memory devices ...
Quick apply
Samsung Semiconductor is hiring for a Packaging Engineer, Mechanical Simulation role to lead the development and design evaluation of next‑generation semiconductor packages and memory devices ...
IC Packaging Engineer - WLP
$184K - $324K/yr
Medical
Dental
Retirement
... semiconductor packaging, materials, thermal, mechanical, or electrical modeling Deep experience in the Semiconductor Packaging field, with a proven track record taking packages from concept to HVM ...
IC Packaging Engineer - WLP
$184K - $324K/yr
Medical
Dental
Retirement
... semiconductor packaging, materials, thermal, mechanical, or electrical modeling Deep experience in the Semiconductor Packaging field, with a proven track record taking packages from concept to HVM ...
IC Packaging Engineer - WLP
San Francisco, CA · On-site
Minimum Qualifications Minimum requirement of a bachelors degree Preferred Qualifications MS or PhD in a relevant discipline, with a thesis or coursework in semiconductor packaging, materials ...
IC Packaging Engineer - WLP
San Francisco, CA · On-site
Minimum Qualifications Minimum requirement of a bachelors degree Preferred Qualifications MS or PhD in a relevant discipline, with a thesis or coursework in semiconductor packaging, materials ...
As a cornerstone of our Semiconductor Power Product Group, our packaging technology is where cutting-edge silicon meets real-world application. As the industry pivots toward AI/ML hardware, high ...
Quick apply
As a cornerstone of our Semiconductor Power Product Group, our packaging technology is where cutting-edge silicon meets real-world application. As the industry pivots toward AI/ML hardware, high ...
Principal Package Design Engineer
San Jose, CA · On-site
$195K - $240K/yr
As a cornerstone of our Semiconductor Power Product Group, our packaging technology is where cutting-edge silicon meets real-world application. As the industry pivots toward AI/ML hardware, high ...
Principal Package Design Engineer
San Jose, CA · On-site
$195K - $240K/yr
As a cornerstone of our Semiconductor Power Product Group, our packaging technology is where cutting-edge silicon meets real-world application. As the industry pivots toward AI/ML hardware, high ...
Senior Package Reliability Engineer
$166K - $240K/yr
Master's degree in Mechanical Engineering, Materials Science, Packaging Engineering, or a related technical field with 8+ years of experience in semiconductor package thermal and thermomechanical ...
Senior Package Reliability Engineer
$166K - $240K/yr
Master's degree in Mechanical Engineering, Materials Science, Packaging Engineering, or a related technical field with 8+ years of experience in semiconductor package thermal and thermomechanical ...
Senior Package Reliability Engineer
San Jose, CA · On-site
$166K - $240K/yr
Master's degree in Mechanical Engineering, Materials Science, Packaging Engineering, or a related technical field with 8+ years of experience in semiconductor package thermal and thermomechanical ...
Senior Package Reliability Engineer
San Jose, CA · On-site
$166K - $240K/yr
Master's degree in Mechanical Engineering, Materials Science, Packaging Engineering, or a related technical field with 8+ years of experience in semiconductor package thermal and thermomechanical ...
Principal Package Design Engineer
$195K - $240K/yr
As a cornerstone of our Semiconductor Power Product Group, our packaging technology is where cutting-edge silicon meets real-world application. As the industry pivots toward AI/ML hardware, high ...
Principal Package Design Engineer
$195K - $240K/yr
As a cornerstone of our Semiconductor Power Product Group, our packaging technology is where cutting-edge silicon meets real-world application. As the industry pivots toward AI/ML hardware, high ...
We are looking for someone with experience in Semiconductor Packaging Design, Process & Technology Development. Good understanding of cross-functional packaging areas: Si floor plan, package layout ...
We are looking for someone with experience in Semiconductor Packaging Design, Process & Technology Development. Good understanding of cross-functional packaging areas: Si floor plan, package layout ...
FEA Packaging Engineer
Palo Alto, CA · On-site
Cspeed IO is developing next-generation optical semiconductor solutions for the AI infrastructure ... The analysis supports package architecture decisions and qualification. Temperature governs optical ...
FEA Packaging Engineer
Palo Alto, CA · On-site
Cspeed IO is developing next-generation optical semiconductor solutions for the AI infrastructure ... The analysis supports package architecture decisions and qualification. Temperature governs optical ...
Sr Staff Semiconductor Process Engineer
Goleta, CA · On-site
$112K - $145K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Experience in semiconductor packaging or FPA manufacturing in a cleanroom environment with demonstrated expertise in either flip-chip hybridization techniques or related processes, such as epoxy die ...
Sr Staff Semiconductor Process Engineer
Goleta, CA · On-site
$112K - $145K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Experience in semiconductor packaging or FPA manufacturing in a cleanroom environment with demonstrated expertise in either flip-chip hybridization techniques or related processes, such as epoxy die ...
Semiconductor Packaging information
See California salary details
$12.34 - $13.65
2% of jobs
$13.65 - $14.97
9% of jobs
$16.02 is the 25th percentile. Wages below this are outliers.
$14.97 - $16.28
17% of jobs
The median wage is $17.32 / hr.
$16.28 - $17.60
27% of jobs
$17.60 - $18.91
15% of jobs
$19.31 is the 75th percentile. Wages above this are outliers.
$18.91 - $20.23
15% of jobs
$20.23 - $21.55
6% of jobs
$21.55 - $22.86
4% of jobs
$22.86 - $24.18
3% of jobs
$24.18 - $25.49
1% of jobs
$25.49 - $26.81
0% of jobs
$12
$18
$26
How much do semiconductor packaging jobs pay per hour?
What is the difference between Semiconductor Packaging vs Semiconductor Test Engineer?
| Aspect | Semiconductor Packaging | Semiconductor Test Engineer |
|---|---|---|
| Primary Focus | Designing and assembling packaging solutions for chips | Testing and validating semiconductor devices for performance |
| Required Skills | Materials, mechanical design, manufacturing processes | Electrical testing, data analysis, test equipment operation |
| Work Environment | Manufacturing floors, R&D labs | Testing labs, production lines |
| Common Certifications | None specific, often engineering degrees |
Semiconductor Packaging and Semiconductor Test Engineer roles both operate within the semiconductor industry but focus on different stages of product development. Packaging involves creating protective and functional enclosures for chips, while testing ensures the chips meet performance standards. Both roles require technical knowledge and often collaborate during product development.
What is semiconductor packaging?
What are the key skills and qualifications needed to thrive in semiconductor packaging, and why are they important?
What are some of the common challenges faced in a semiconductor packaging role, and how can new hires effectively address them?
What are the most commonly searched types of Semiconductor Packaging jobs in California?
The most popular types of Semiconductor Packaging jobs in California are:
What are popular job titles related to Semiconductor Packaging jobs in California?
For Semiconductor Packaging jobs in California, the most frequently searched job titles are:
What job categories do people searching Semiconductor Packaging jobs in California look for?
The top searched job categories for Semiconductor Packaging jobs in California are:
What cities in California are hiring for Semiconductor Packaging jobs?
Cities in California with the most Semiconductor Packaging job openings:
Full-time
Posted 4 days ago
Job description
The successful applicant willbe responsible formechanical engineering, including mechanical design, assembly process development and implementation and packagingof infrared focal plane arrays,for visible and infrared sensors
Key Responsibilities:
- Work in mechanical and electrical subsystems and integrate them into a larger system
- Perform process related activities, such as process development and yield improvement activities.
- Assemble optoelectronic components of FPAs into final device packaging including die attach, wire bonding, solder, inspect and test
- Perform hands-on work on mechanical and electrical systems and components
- Use hand tools to perform integration and assembly tasks in a laboratory environment
- Set up andoperatetest equipment to verify, evaluate, and troubleshoot systems and components
- Perform electrical characterization of components and integrated assemblies
- Designfixturing, assembly aids, and support equipment
- Read,understandandutilizeengineering documentationincluding: drawings, assembly/process instructions, block diagrams, schematic diagrams, and bills of material
- Provide data analysis and status reporting to technical staff and leadership
- Support maintenance of lab instrumentation
Desired Qualifications:
- Experience in a laboratory or manufacturing environment involving assembly, integration, test and troubleshooting of visible and IR cameras and FPAs
- Experience with optoelectronic packaging technology and integration techniques
- Understanding and application of basic electrical and mechanical engineering concepts
- Ability to function safely in a laboratory environment performing assembly, integration, test, and troubleshooting tasks
- Ability to follow formal and informal assembly and integration processes
- Proficiencywith Microsoft Office tools (Word, Excel, and PowerPoint) and ability to create charts and communicate clearly
- Experience with AutoCAD design,SolidWorksor other design software
- Possess problem solving skills, good mechanical aptitude, strong organizational skills, and the ability to work effectively with others and individually
- Understanding of mechanical and electrical assembly techniques
- Exceptional time management and organizational skills
- Strong oral and written communication skills with a strong attention to detail, and excellent documentation capability
- Candidate should be enthusiastic and highly self-motivated
- Ability to adapt to a flexible and changing schedule
Success Metrics:
- Mechanical designs released on timeand without errors
- Fixture/tooling designs completed on schedule
- Assembly process development milestones completed
- Packaging process documentation completed
- Documentation quality
- Demonstrate good lab safety,cleanroomand ESD rule compliance