Proven fundamentals in material/chemistry/mechanical engineering field(s). In-depth knowledge of substrate technology, manufacturing process, design rules, and roadmap. Hands-on experience in ...
Proven fundamentals in material/chemistry/mechanical engineering field(s). In-depth knowledge of substrate technology, manufacturing process, design rules, and roadmap. Hands-on experience in ...
Packaging Substrate Engineer
$184K - $324K/yr
Proven fundamentals in material/chemistry/mechanical engineering field(s). In-depth knowledge of substrate technology, manufacturing process, design rules, and roadmap. Hands-on experience in ...
Packaging Substrate Engineer
$184K - $324K/yr
Proven fundamentals in material/chemistry/mechanical engineering field(s). In-depth knowledge of substrate technology, manufacturing process, design rules, and roadmap. Hands-on experience in ...
Packaging Substrate Engineer
$184K - $324K/yr
Proven fundamentals in material/chemistry/mechanical engineering field(s). In-depth knowledge of substrate technology, manufacturing process, design rules, and roadmap. Hands-on experience in ...
Packaging Substrate Engineer
$184K - $324K/yr
Proven fundamentals in material/chemistry/mechanical engineering field(s). In-depth knowledge of substrate technology, manufacturing process, design rules, and roadmap. Hands-on experience in ...
Packaging Substrate Engineer
San Francisco, CA · On-site
$129.30 - $225.30/hr
Work with substrate manufacturing industry, foundry, and OSAT to bring package substrate solution from concept to HVM. Drive industry with sophisticated package solutions, new architecture, material ...
Packaging Substrate Engineer
San Francisco, CA · On-site
$129.30 - $225.30/hr
Work with substrate manufacturing industry, foundry, and OSAT to bring package substrate solution from concept to HVM. Drive industry with sophisticated package solutions, new architecture, material ...
Packaging Substrate Engineer (San Francisco)
San Francisco, CA · On-site
$181K - $318K/yr
Proven fundamentals in material/chemistry/mechanical engineering field(s). * In‑depth knowledge of substrate technology, manufacturing process, design rules, and roadmap. * Hands‑on experience in ...
Packaging Substrate Engineer (San Francisco)
San Francisco, CA · On-site
$181K - $318K/yr
Proven fundamentals in material/chemistry/mechanical engineering field(s). * In‑depth knowledge of substrate technology, manufacturing process, design rules, and roadmap. * Hands‑on experience in ...
Lead Packaging Substrate Engineer -- Roadmap & Innovation (San Francisco)
San Francisco, CA · On-site
$119K - $157K/yr
A leading technology company in San Francisco is seeking a senior professional to lead SoC package substrate technology development. The ideal candidate will have over 10 years of relevant experience ...
Lead Packaging Substrate Engineer -- Roadmap & Innovation (San Francisco)
San Francisco, CA · On-site
$119K - $157K/yr
A leading technology company in San Francisco is seeking a senior professional to lead SoC package substrate technology development. The ideal candidate will have over 10 years of relevant experience ...
Context As chip sizes increase and packaging technologies become more complex, substrate engineering is emerging as a critical domain. This role supports TSMC's leadership in 3DIC and advanced ...
Context As chip sizes increase and packaging technologies become more complex, substrate engineering is emerging as a critical domain. This role supports TSMC's leadership in 3DIC and advanced ...
Context As chip sizes increase and packaging technologies become more complex, substrate engineering is emerging as a critical domain. This role supports TSMC's leadership in 3DIC and advanced ...
Context As chip sizes increase and packaging technologies become more complex, substrate engineering is emerging as a critical domain. This role supports TSMC's leadership in 3DIC and advanced ...
Substrate IC Package Layout Design Engineer
San Jose, CA · On-site
$200 - $280/hr
Job Summary As a Substrate IC Package Layout Design Engineer you will be responsible for the end-to-end design of complex IC substrate packages, supporting high-power consumption and high-speed ...
Substrate IC Package Layout Design Engineer
San Jose, CA · On-site
$200 - $280/hr
Job Summary As a Substrate IC Package Layout Design Engineer you will be responsible for the end-to-end design of complex IC substrate packages, supporting high-power consumption and high-speed ...
Substrate/Package Layout Engineer
San Jose, CA · On-site
$141.30 - $226/hr
Substrate/Package Layout Engineer page is loaded## Substrate/Package Layout Engineerlocations: USA-California-San Jose-1320 Ridder Park Drivetime type: Full timeposted on: Posted Todayjob requisition ...
Substrate/Package Layout Engineer
San Jose, CA · On-site
$141.30 - $226/hr
Substrate/Package Layout Engineer page is loaded## Substrate/Package Layout Engineerlocations: USA-California-San Jose-1320 Ridder Park Drivetime type: Full timeposted on: Posted Todayjob requisition ...
Electromechanical Engineer
San Francisco, CA · On-site
$150K - $275K/yr
Electromechanical Engineer Substrate is addressing one of the most important technological problems facing the United States. At the intersection of advanced manufacturing and cutting-edge physics ...
Electromechanical Engineer
San Francisco, CA · On-site
$150K - $275K/yr
Electromechanical Engineer Substrate is addressing one of the most important technological problems facing the United States. At the intersection of advanced manufacturing and cutting-edge physics ...
Process Engineer
San Francisco, CA · On-site
$150K - $250K/yr
Process Engineer Substrate is addressing one of the most important technological problems facing the United States. At the intersection of advanced manufacturing and cutting-edge physics, we are ...
Process Engineer
San Francisco, CA · On-site
$150K - $250K/yr
Process Engineer Substrate is addressing one of the most important technological problems facing the United States. At the intersection of advanced manufacturing and cutting-edge physics, we are ...
Substrate IC Package Layout Design Engineer
San Jose, CA · On-site
$2.0K/mo
Job Summary As a Substrate IC Package Layout Design Engineer you will be responsible for the end-to-end design of complex IC substrate packages, supporting high-power consumption and high-speed ...
Substrate IC Package Layout Design Engineer
San Jose, CA · On-site
$2.0K/mo
Job Summary As a Substrate IC Package Layout Design Engineer you will be responsible for the end-to-end design of complex IC substrate packages, supporting high-power consumption and high-speed ...
Substrate/Package Layout Engineer
San Jose, CA · On-site
$141K - $226K/yr
Broadcom OSD is looking for an IC Substrate and Package/Interposer Layout Engineer. In the role, you will have primary responsibility for the layout, routing, and functionality of packages and ...
Substrate/Package Layout Engineer
San Jose, CA · On-site
$141K - $226K/yr
Broadcom OSD is looking for an IC Substrate and Package/Interposer Layout Engineer. In the role, you will have primary responsibility for the layout, routing, and functionality of packages and ...
Process Engineer
San Francisco, CA · On-site
$150 - $250/hr
Process Engineer Substrate is addressing one of the most important technological problems facing the United States. At the intersection of advanced manufacturing and cutting-edge physics, we are ...
Process Engineer
San Francisco, CA · On-site
$150 - $250/hr
Process Engineer Substrate is addressing one of the most important technological problems facing the United States. At the intersection of advanced manufacturing and cutting-edge physics, we are ...
Substrate IC Package Layout Design Engineer
San Jose, CA · On-site
$2.0K/mo
Job Summary As a Substrate IC Package Layout Design Engineer you will be responsible for the end-to-end design of complex IC substrate packages, supporting high-power consumption and high-speed ...
Quick apply
Substrate IC Package Layout Design Engineer
San Jose, CA · On-site
$2.0K/mo
Job Summary As a Substrate IC Package Layout Design Engineer you will be responsible for the end-to-end design of complex IC substrate packages, supporting high-power consumption and high-speed ...
$141.30 - $226/hr
Broadcom OSD is looking for an IC Substrate and Package/Interposer Layout Engineer. In the role, you will have primary responsibility for the layout, routing, and functionality of packages and ...
$141.30 - $226/hr
Broadcom OSD is looking for an IC Substrate and Package/Interposer Layout Engineer. In the role, you will have primary responsibility for the layout, routing, and functionality of packages and ...
Electromechanical Engineer (San Francisco)
San Francisco, CA · On-site
$150K - $400K/yr
Electromechanical Engineer Substrate is addressing one of the most important technological problems facing the United States. At the intersection of advanced manufacturing and cutting‑edge physics ...
Electromechanical Engineer (San Francisco)
San Francisco, CA · On-site
$150K - $400K/yr
Electromechanical Engineer Substrate is addressing one of the most important technological problems facing the United States. At the intersection of advanced manufacturing and cutting‑edge physics ...
Substrate/Package Layout Engineer
San Jose, CA · On-site
$141K - $226K/yr
Broadcom OSD is looking for an IC Substrate and Package/Interposer Layout Engineer. In the role, you will have primary responsibility for the layout, routing, and functionality of packages and ...
Substrate/Package Layout Engineer
San Jose, CA · On-site
$141K - $226K/yr
Broadcom OSD is looking for an IC Substrate and Package/Interposer Layout Engineer. In the role, you will have primary responsibility for the layout, routing, and functionality of packages and ...
Senior Process Engineer
San Francisco, CA · On-site
$200K - $300K/yr
Senior Process Engineer Substrate is addressing one of the most important technological problems facing the United States. At the intersection of advanced manufacturing and cutting-edge physics, we ...
Senior Process Engineer
San Francisco, CA · On-site
$200K - $300K/yr
Senior Process Engineer Substrate is addressing one of the most important technological problems facing the United States. At the intersection of advanced manufacturing and cutting-edge physics, we ...
Substrate Engineer information
What is a substrate engineer?
What are the key skills and qualifications needed to thrive as a substrate engineer?
What are some common challenges substrate engineers face when working on high-density interconnect (HDI) designs?
What is the difference between Substrate Engineer vs Semiconductor Process Engineer?
| Aspect | Substrate Engineer | Semiconductor Process Engineer |
|---|---|---|
| Credentials | Bachelor's or Master's in Materials Science, Electrical Engineering, or related fields | Bachelor's or Master's in Electrical Engineering, Chemical Engineering, or related fields |
| Work Environment | Research labs, fabrication facilities, semiconductor manufacturing plants | Cleanrooms, fabrication facilities, process development labs |
| Industry Usage | Semiconductor manufacturing, electronics, integrated circuits | Semiconductor fabrication, chip production, process optimization |
| Common Search/Comparison | Yes | Yes |
Substrate Engineers focus on developing and optimizing the materials and layers used in semiconductor devices, while Semiconductor Process Engineers work on the overall manufacturing processes to produce chips efficiently. Both roles require similar educational backgrounds and often collaborate within the semiconductor industry, but their specific responsibilities differ in scope and focus.
What are popular job titles related to Substrate Engineer jobs in California?
For Substrate Engineer jobs in California, the most frequently searched job titles are:
What job categories do people searching Substrate Engineer jobs in California look for?
The top searched job categories for Substrate Engineer jobs in California are:
What cities in California are hiring for Substrate Engineer jobs?
Cities in California with the most Substrate Engineer job openings:

Apple rating
8.1
Based on 683 frontline employees who took The Breakroom Quiz
6th of 30 rated technology retailers
Job description
Description
• Lead SoC package substrate technology development, pathfinding, and roadmap definition.
• Work with substrate manufacturing industry, foundry, and OSAT to bring package substrate solution from concept to HVM.
• Drive industry with sophisticated package solutions, new architecture, material and process development, and spec definitions.
• 5% International travel.
Minimum Qualifications
BS and 10+ years of relevant industry experience.
Preferred Qualifications
MS or Ph.D. and 8+ years of relevant industry experience.
Proven fundamentals in material/chemistry/mechanical engineering field(s).
In-depth knowledge of substrate technology, manufacturing process, design rules, and roadmap.
Hands-on experience in substrate manufacturing and technology development: Cu plating, lithography, dielectric material, via formation, solder resist, surface finish etc.
Familiarity with package assembly and integration process preferred.
Experience in Cadence Allegro platform tools and design review for manufacturing (DFM).
Exceptional technology development & project management skills.
Strong communication & collaborative skills.
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976