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Substrate Engineer Jobs in California (NOW HIRING)

Substrate

Standard Cell Design Lead

San Francisco, CA · On-site

$150K - $275K/yr

Standard Cell Design Lead Substrate is addressing one of the most important technological problems ... We are a team of world-class scientists, engineers, and technical experts building technology for ...

Substrate

Research Scientist, AI

San Francisco, CA · On-site

$150K - $275K/yr

Research Scientist, AI Substrate is addressing one of the most important technological problems ... We are a team of world-class scientists, engineers, and technical experts building technology for ...

Eridu AI

Advanced Packaging Engineer

Saratoga, CA · On-site

$230K - $275K/yr

Own substrate BOM development and engineering builds. * Define coplanarity plans and acceptance criteria. * Coordinate substrate and board electrical and mechanical design and signoff. * Lead ...

Etched

IC Package Engineer

Cupertino, CA · On-site

$2K/mo

IC Package Engineer We are seeking an experienced IC Package Design Engineer to drive and own all ... Own the end-to-end package design process, including substrate layout and IC package design, while ...

Etched

IC Package Engineer

Cupertino, CA

$2K/mo

IC Package Engineer We are seeking an experienced IC Package Design Engineer to drive and own all ... Own the end-to-end package design process, including substrate layout and IC package design, while ...

Etched

IC Package Engineer

Cupertino, CA

$2K/mo

IC Package Engineer We are seeking an experienced IC Package Design Engineer to drive and own all ... Own the end-to-end package design process, including substrate layout and IC package design, while ...

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Substrate Engineer information

What are some common challenges Substrate Engineers face when working on high-density interconnect (HDI) designs?

Substrate Engineers often encounter challenges related to managing signal integrity, thermal performance, and miniaturization when working with HDI designs. Balancing the need for dense routing with electrical performance can be complex, especially as device sizes shrink and layer counts increase. Collaboration with PCB designers, materials scientists, and manufacturing teams is crucial to address these issues and ensure the substrate meets both design and production requirements. Keeping up with evolving technologies and industry standards is also essential for success in this role.

What is a Substrate Engineer?

A Substrate Engineer is a professional who specializes in designing, developing, and optimizing the underlying frameworks, often referred to as substrates, for electronic devices or software platforms. In the context of electronics, they work with materials and technologies that form the physical base for circuits and chips, ensuring performance, reliability, and manufacturability. In software, especially blockchain, a Substrate Engineer focuses on building and customizing blockchains using the Substrate framework, handling core logic, consensus, and runtime modules. Their role is crucial for creating robust and scalable systems tailored to specific application requirements.

What is the difference between Substrate Engineer vs Semiconductor Process Engineer?

AspectSubstrate EngineerSemiconductor Process Engineer
CredentialsBachelor's or Master's in Materials Science, Electrical Engineering, or related fieldsBachelor's or Master's in Electrical Engineering, Chemical Engineering, or related fields
Work EnvironmentResearch labs, fabrication facilities, semiconductor manufacturing plantsCleanrooms, fabrication facilities, process development labs
Industry UsageSemiconductor manufacturing, electronics, integrated circuitsSemiconductor fabrication, chip production, process optimization
Common Search/ComparisonYesYes

Substrate Engineers focus on developing and optimizing the materials and layers used in semiconductor devices, while Semiconductor Process Engineers work on the overall manufacturing processes to produce chips efficiently. Both roles require similar educational backgrounds and often collaborate within the semiconductor industry, but their specific responsibilities differ in scope and focus.

What are the key skills and qualifications needed to thrive as a Substrate Engineer, and why are they important?

To thrive as a Substrate Engineer, you need a strong background in materials science, semiconductor fabrication, and electrical engineering, often supported by a relevant engineering degree. Familiarity with industry-standard design tools like Cadence or Mentor Graphics, as well as experience with substrate modeling, PCB design, and analysis software, is typically required. Excellent problem-solving skills, attention to detail, and effective communication are crucial soft skills for collaborating across multidisciplinary teams. These qualifications are essential for ensuring high-quality, reliable substrate designs that meet performance, manufacturability, and cost requirements in advanced electronics manufacturing.
What are popular job titles related to Substrate Engineer jobs in California? For Substrate Engineer jobs in California, the most frequently searched job titles are:
What job categories do people searching Substrate Engineer jobs in California look for? The top searched job categories for Substrate Engineer jobs in California are:
What cities in California are hiring for Substrate Engineer jobs? Cities in California with the most Substrate Engineer job openings:
Substrate Engineer jobs near you
Infographic showing various Substrate Engineer job openings in California as of June 2026, with employment types broken down into 100% Full Time. Highlights an 100% In-person job distribution.
Standard Cell Design Lead

Standard Cell Design Lead

Substrate

San Francisco, CA • On-site

$150K - $275K/yr

Full-time

Posted 18 days ago

Job description

Standard Cell Design Lead
Substrate is addressing one of the most important technological problems facing the United States. At the intersection of advanced manufacturing and cutting-edge physics, we are developing technologies that will reshape the semiconductor industry and strengthen America's technological leadership. We are a team of world-class scientists, engineers, and technical experts building technology for the United States.
Summary
As a Standard Cell Design Lead, you will develop and optimize standard cell libraries while leading cell characterization and library validation efforts. This role requires deep expertise in digital cell design, layout, and timing characterization combined with strong understanding of library requirements for digital design flows. You will work across multiple locations including external fabrication facilities. This is a full-time, onsite position.
Responsibilities
  • Lead standard cell library development including logic gates, flip-flops, and complex cells
  • Optimize cell layouts for power, performance and area across Vth's and drive strengths
  • Characterize cell library including timing, power, and noise analysis for library models
  • Develop Liberty (.lib) timing files and LEF physical abstractions for EDA tool integration
  • Collaborate with PDK and process teams to ensure cell performance meets targets
  • Implement DFM techniques and validate cells against DRC/LVS rules
  • Support all DFT fault models including cell aware, physical aware, stuck-at and transition
  • Optimize cell architectural requirements including multi-Vt and multi-channel options
  • Lead library validation and qualification across distributed design and fabrication teams

Required Qualifications
  • 10+ years experience in standard cell design, library development and characterization
  • Deep understanding of standard cell architecture, layout, and optimization strategies
  • Strong background in cell characterization and Liberty timing model generation
  • Experience with layout tools (Cadence Virtuoso, Synopsys Custom Compiler, or similar)
  • Proficiency with characterization tools and SPICE simulation for timing/power analysis
  • Proven ability to balance area, performance, and power trade-offs in cell design

Preferred Qualifications
  • Advanced degree in Electrical Engineering or related field
  • Experience with advanced node standard cells or FinFET/GAA library development
  • Background in low-power design techniques and multi-threshold voltage libraries
  • Familiarity with EDA flows and library integration requirements
  • Experience in research-driven or startup semiconductor environments

Salary Range
$150,000-$275,000 USD
Substrate is an equal opportunity employer. It provides equal employment opportunity to all applicants without regard to race, color, religion, national origin, disability, medical condition, marital status, sex, gender, age, military or veteran status, or any other characteristic protected by applicable federal, state, or local laws.
Substrate will provide reasonable accommodations to applicants with disabilities. If you need an accommodation during the hiring process, please let your recruiter know.
Applicants must be legally authorized to work in the United States. This position is not eligible for visa sponsorship.

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