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Substrate Engineer Jobs in California (NOW HIRING)

Collaborate with substrate layout, ASIC design, and manufacturing engineers. * Create mechanical drawings for substrate fabrication and packaged part assembly. Work with vendors for components ...

Senior IC Packaging Engineer

San Jose, CA · On-site

$122K - $168K/yr

Define substrate stack-ups, materials, bump/RDL architectures, and DFM guidelines for advanced ... BSEE or MSEE (PhD a plus) in Electrical Engineering, or related field. * Minimum of 10+ years of ...

Senior IC Packaging Engineer

San Jose, CA · On-site

$122K - $168K/yr

Define substrate stack-ups, materials, bump/RDL architectures, and DFM guidelines for advanced ... BSEE or MSEE (PhD a plus) in Electrical Engineering, or related field. * Minimum of 10+ years of ...

Showing results 41-60

Substrate Engineer information

What are some common challenges substrate engineers face when working on high-density interconnect (HDI) designs?

Substrate Engineers often encounter challenges related to managing signal integrity, thermal performance, and miniaturization when working with HDI designs. Balancing the need for dense routing with electrical performance can be complex, especially as device sizes shrink and layer counts increase. Collaboration with PCB designers, materials scientists, and manufacturing teams is crucial to address these issues and ensure the substrate meets both design and production requirements. Keeping up with evolving technologies and industry standards is also essential for success in this role.

What is a substrate engineer?

A Substrate Engineer is a professional who specializes in designing, developing, and optimizing the underlying frameworks, often referred to as substrates, for electronic devices or software platforms. In the context of electronics, they work with materials and technologies that form the physical base for circuits and chips, ensuring performance, reliability, and manufacturability. In software, especially blockchain, a Substrate Engineer focuses on building and customizing blockchains using the Substrate framework, handling core logic, consensus, and runtime modules. Their role is crucial for creating robust and scalable systems tailored to specific application requirements.

What is the difference between Substrate Engineer vs Semiconductor Process Engineer?

AspectSubstrate EngineerSemiconductor Process Engineer
CredentialsBachelor's or Master's in Materials Science, Electrical Engineering, or related fieldsBachelor's or Master's in Electrical Engineering, Chemical Engineering, or related fields
Work EnvironmentResearch labs, fabrication facilities, semiconductor manufacturing plantsCleanrooms, fabrication facilities, process development labs
Industry UsageSemiconductor manufacturing, electronics, integrated circuitsSemiconductor fabrication, chip production, process optimization
Common Search/ComparisonYesYes

Substrate Engineers focus on developing and optimizing the materials and layers used in semiconductor devices, while Semiconductor Process Engineers work on the overall manufacturing processes to produce chips efficiently. Both roles require similar educational backgrounds and often collaborate within the semiconductor industry, but their specific responsibilities differ in scope and focus.

What are the key skills and qualifications needed to thrive as a substrate engineer?

To thrive as a Substrate Engineer, you need a strong background in materials science, semiconductor fabrication, and electrical engineering, often supported by a relevant engineering degree. Familiarity with industry-standard design tools like Cadence or Mentor Graphics, as well as experience with substrate modeling, PCB design, and analysis software, is typically required. Excellent problem-solving skills, attention to detail, and effective communication are crucial soft skills for collaborating across multidisciplinary teams. These qualifications are essential for ensuring high-quality, reliable substrate designs that meet performance, manufacturability, and cost requirements in advanced electronics manufacturing.
What job categories do people searching Substrate Engineer jobs in California look for? The top searched job categories for Substrate Engineer jobs in California are:
What cities in California are hiring for Substrate Engineer jobs? Cities in California with the most Substrate Engineer job openings:
Infographic showing various Substrate Engineer job openings in California as of August 2026, with employment types broken down into 81% Full Time, 13% Part Time, 2% Temporary, and 4% Contract. Highlights an 87% Physical, 4% Hybrid, and 9% Remote job distribution.

Electromechanical Packaging Engineer

Claros

Torrance, CA • On-site, Remote

$150K - $200K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Re-posted 10 days ago


Job description

Claros is a power management solutions company that is innovating at the intersection of power and compute to make AI more sustainable and widely available. By driving down the cost and complexity of power delivery and leveraging innovative hardware and software, the company seeks to decrease energy consumption, optimize power delivery, increase compute performance, and maximize the efficiency of AI operations.
About The Team
We are open-minded, fast paced, problem solvers that value open dialogue and candor. Our passion is to challenge the status-quo and we embrace transformational thinking. Our response is never "no, but...." instead "yes, if....". We are mindful of our personal and organizational blinders and try to build an environment where our team members are At Their Best.
What You Will Do
The Electromechanical Packaging Engineer will be working with a Lead Engineer and be responsible for:
  • Support chip scale packaging design and HDI organic substrate layout for integrated voltage regulator product line.
  • Collaborate with substrate layout, ASIC design, and manufacturing engineers.
  • Create mechanical drawings for substrate fabrication and packaged part assembly. Work with vendors for components, assembly, and test.

What You Bring
  • Minimum BS in Mechanical or Electrical engineering, MS or higher-level degree preferred.
  • 5+ years' experience with microelectronics packaging, and/or PCB design
  • Knowledge of foundry processes and chip scale assembly processes
  • Understanding of how electrical design requirements impact substrate layout and interconnect selection
  • Proficient with 3D mechanical CAD software (Creo, NX, Catia, etc.), generating mechanical drawings, and GD&T
  • Ability to read and create electrical schematics
  • Familiarity with tape out processes for wafers and substrate
  • Basic understanding of Form, Fit, Function elements in design for manufacturability (DFM).
  • willingness to learn new concepts and techniques and concepts
  • Familiarity with PCB design tools (Altium, Cadence, Mentor, etc.) is a plus
  • Basic understanding of component level thermal analysis is a plus
  • Willingness to be in the office in Torrance, CA a minimum of 3 days per week

What We Offer
  • Career track opportunity with potential for rapid advancement with strong performance as the firm grows
  • 100% employer paid, comprehensive health care including medical, dental, and vision for you and your family.
  • Paid maternity and paternity for 14 weeks at employees' normal pay.
  • Unlimited PTO, with management approval.
  • Opportunities for professional development and continued learning.
  • Optional 401K, FSA, and equity incentives available.

Salary Range: $150,000 - $200,000. This represents the typical salary range for this position based on experience, skills, and other factors.
Our Red Cell Partners Benefits:
  • Career track opportunity with potential for rapid advancement with strong performance as the firm grows
  • 100% employer paid, comprehensive health care including medical, dental, and vision for you and your family.
  • Paid maternity and paternity for 14 weeks at employees' normal pay.
  • Unlimited PTO, with management approval.
  • Opportunities for professional development and continued learning.
  • Optional 401K, FSA, and equity incentives available.

Applicant Data Disclosure
By submitting an application, you acknowledge that Red Cell Partners, LLC ("Red Cell") uses third-party service providers to facilitate its recruitment and hiring processes. These providers include applicant tracking systems, candidate verification platforms, and fraud detection tools (collectively, "Hiring Platforms"). Your application materials, including your résumé, cover letter, work samples, responses to application questions, and any other information you submit, may be transmitted to and processed by these Hiring Platforms for the following purposes:
  • Managing and administering your application throughout the hiring process;
  • Verifying the accuracy and authenticity of application materials, including by cross-referencing information you provide against publicly available sources and proprietary databases;
  • Identifying indicators of potentially fraudulent, fabricated, or materially misleading application content, including but not limited to discrepancies between submitted materials and publicly available professional profiles, geographic anomalies, and fabricated work histories.

Applications that are flagged through this process as containing indicators of fraud or material misrepresentation may be declined from further consideration. If you have questions about the status of your application or the evaluation process, please contact talent@redcellpartners.com.
Red Cell requires its Hiring Platform providers to process your information solely for the purposes described above and in accordance with applicable law. Your information will be retained only for as long as necessary to fulfill these purposes and any applicable legal obligations, after which it will be deleted in accordance with Red Cell's data retention policies.
For more information about how your data is used, please refer to our Privacy Policy and Applicant Privacy Notice.