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Semiconductor Packaging Jobs in Oregon (NOW HIRING)

Intel

Package Architecture Analyst

Hillsboro, OR · On-site

$190K - $269K/yr

Together, the group contributes to Intel's leadership in advanced semiconductor packaging technologies, enabling the creation of world-class products. Key Responsibilities * Translate product ...

Onto Innovation

Senior Software Engineer

Hillsboro, OR · On-site

$86K - $129K/yr

... advanced semiconductor packaging. Our breadth of offerings across the entire semiconductor value chain helps our customers solve their most difficult yield, device performance, quality, and ...

Onto Innovation

Software Engineer 3

Hillsboro, OR · On-site

$86K - $129K/yr

... advanced semiconductor packaging. Our breadth of offerings across the entire semiconductor value chain helps our customers solve their most difficult yield, device performance, quality, and ...

Onto

Senior Systems Engineer

Hillsboro, OR · On-site

$115K - $172K/yr

... advanced semiconductor packaging. Our breadth of offerings across the entire semiconductor value chain helps our customers solve their most difficult yield, device performance, quality, and ...

Onto

Senior Systems Engineer

Hillsboro, OR · On-site

$115K - $172K/yr

... advanced semiconductor packaging. Our breadth of offerings across the entire semiconductor value chain helps our customers solve their most difficult yield, device performance, quality, and ...

Onto

Field Service Engineer 3 (Non-Exempt)

Hillsboro, OR · On-site

$83K - $125K/yr

... advanced semiconductor packaging. Our breadth of offerings across the entire semiconductor value chain helps our customers solve their most difficult yield, device performance, quality, and ...

Onto

Field Service Engineer 3 (Non-Exempt)

Hillsboro, OR · On-site

$83K - $125K/yr

... advanced semiconductor packaging. Our breadth of offerings across the entire semiconductor value chain helps our customers solve their most difficult yield, device performance, quality, and ...

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Semiconductor Packaging information

See Oregon salary details

$13

$19

$28

How much do semiconductor packaging jobs pay per hour?

As of Sep 15, 2026, the average hourly pay for semiconductor packaging in Oregon is $19.93, according to ZipRecruiter salary data. Most workers in this role earn between $17.26 and $21.11 per hour, depending on experience, location, and employer.

What is semiconductor packaging?

Semiconductor packaging is the process of enclosing and protecting integrated circuits or chips so they can be safely handled, connected to circuit boards, and function reliably in electronic devices. The packaging provides physical protection, electrical connections, heat dissipation, and shields the chip from environmental factors such as moisture and contaminants. Advanced packaging techniques are crucial for improving device performance, reducing size, and enabling new applications like smartphones, computers, and automotive electronics.

What are the key skills and qualifications needed to thrive in semiconductor packaging, and why are they important?

To thrive in Semiconductor Packaging, you need a solid understanding of materials science, microelectronics, and process engineering, typically supported by a degree in engineering or a related field. Familiarity with CAD software, wire bonding machines, and industry standards such as IPC and JEDEC is essential. Strong problem-solving abilities, attention to detail, and teamwork are critical soft skills in this role. These skills ensure the reliable assembly and protection of semiconductor devices, directly impacting product performance and yield.

What are some of the common challenges faced in a semiconductor packaging role, and how can new hires effectively address them?

Professionals in semiconductor packaging often encounter challenges such as staying updated with rapidly evolving technologies, managing precision in the assembly process, and ensuring product reliability under tight deadlines. New hires can effectively address these by actively seeking mentorship from experienced colleagues, participating in ongoing training programs, and closely following standard operating procedures. Collaborating with cross-functional teams, such as design and quality assurance, also helps in gaining comprehensive insights and troubleshooting issues more efficiently.

What is the difference between Semiconductor Packaging vs Semiconductor Test Engineer?

AspectSemiconductor PackagingSemiconductor Test Engineer
Primary FocusDesigning and assembling packaging solutions for chipsTesting and validating semiconductor devices for performance
Required SkillsMaterials, mechanical design, manufacturing processesElectrical testing, data analysis, test equipment operation
Work EnvironmentManufacturing floors, R&D labsTesting labs, production lines
Common CertificationsNone specific, often engineering degrees

Semiconductor Packaging and Semiconductor Test Engineer roles both operate within the semiconductor industry but focus on different stages of product development. Packaging involves creating protective and functional enclosures for chips, while testing ensures the chips meet performance standards. Both roles require technical knowledge and often collaborate during product development.

Is it hard to get a job in semiconductor packaging?

Securing a job in semiconductor packaging can be competitive, but candidates with relevant technical skills, such as knowledge of cleanroom environments, soldering, and inspection tools, have good opportunities. Entry-level positions may require some training or certifications, but experience with industry-standard processes can improve job prospects.

What are popular job titles related to Semiconductor Packaging jobs in Oregon?

For Semiconductor Packaging jobs in Oregon, the most frequently searched job titles are:

What job categories do people searching Semiconductor Packaging jobs in Oregon look for?

The top searched job categories for Semiconductor Packaging jobs in Oregon are:

What cities in Oregon are hiring for Semiconductor Packaging jobs?

Cities in Oregon with the most Semiconductor Packaging job openings:

Semiconductor Packaging jobs near you
Infographic showing various Semiconductor Packaging job openings in Oregon as of August 2026, with employment types broken down into 79% Full Time, 16% Part Time, 2% Contract, and 3% Nights. Highlights an 96% Physical, 1% Hybrid, and 3% Remote job distribution, with an average salary of $41,444 per year, or $19.9 per hour.

Semiconductor Packaging Research Engineer

Hillsboro, OR

Intel
Manufacturing • 10K+ employees
Learn more about Intelexternal

Full-time

Medical, Retirement, PTO

Posted 5 days ago

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

Job description

Job Details:Job Description: 

Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone. Want to learn more? Visit our YouTube Channel or the link below.

Life at Intel

Position Summary: The Semiconductor Packaging Research Engineer drives technology research for advanced packaging and heterogeneous integration. The role is suited for candidates with expertise in either packaging process integration or modeling/simulation, with a focus on evaluating new architectures, materials, interconnects, reliability risks, and manufacturability trade-offs for future products.

Key Responsibilities

  • Research advanced packaging concepts such as chiplets, heterogeneous integration, 2.5D/3DIC, hybrid bonding, interposer, and die-to-die interconnects.

  • Drive either process integration learning or modeling/simulation to assess feasibility, reliability, manufacturability, and technology readiness.

  • For process integration: define integration flows, research vehicles, DOE, defect/yield learning, qualification evidence, and risk mitigation paths.

  • For modeling: develop and validate thermal, thermo-mechanical, electrical, reliability, or multi-physics models using experimental and failure analysis data.

  • Translate product needs into research hypotheses, technical plans, and recommendations; document outputs through reports, design guidance, IP, publications, and development-transfer inputs.

  • Collaborate across research, design, process, materials, reliability, manufacturing, supplier, university, and ecosystem teams.

For information on Intel's immigration sponsorship guidelines, please see

Intel U.S. Immigration Sponsorship Information

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Required Qualifications

  • Master's or Ph.D. in Mechanical Engineering, Electrical Engineering, Materials Science, Applied Physics, Computational Mechanics, Microelectronics, Semiconductor Manufacturing, or related field.

  • 1+ years' experience in semiconductor packaging research, advanced packaging integration, process integration, modeling/simulation, reliability, materials, or heterogeneous integration.

  • 1+ years' experience inoneor more of the following areas: process integration, research vehicle execution, DOE, defect/yield learning, reliability, model development& validation, or multi-physics simulation.

  • 1+ years' experiencewithadvanced packaging technologies such as flip chip, chiplets, 2.5D/3DIC, fan-out, hybrid bonding, interposers, HBM integration, advanced substrates, or die-to-die interconnects.

Preferred Qualifications

  • Ph.D. or deep technical specialization in packaging process integration, computational mechanics, thermal sciences, electrical modeling, materials reliability, or microelectronics researchand 4+ years of relevant experience.

  • Experience with prototype builds, technology readiness assessment, research-to-development transfer, package-system co-optimization, or chip-package-board co-design.

  • Modeling tool experience such as ANSYS, Abaqus, COMSOL, HFSS, Cadence, MATLAB, Python, JMP, or equivalent platforms.

  • Record of patents, publications, conference presentations, technical reports, methodology development, or competitive technology assessments.

  • Ability to turn ambiguous research problems into clear assumptions, experiments, learning milestones, qualification metrics, and actionable recommendations.

Key Competencies

  • Advanced packaging research and pathfinding

  • Process integration or modeling/simulation expertise

  • Heterogeneous integration, chiplet, and advanced substrate knowledge

  • DOE, prototype learning, reliability assessment, or model validation

  • Technology readiness evaluation and cross-functional communication

Success Measures

  • Research outputs identify credible integration options, technology limiters, and trade-offs for future platforms.

  • Process integration or modeling results are supported by clear assumptions, evidence, validation data, and documented limitations.

  • Prototype, DOE, or simulation learning improves feasibility, reliability, integration robustness, and manufacturability understanding.

  • Key risks are identified early with practical mitigation paths and development-transfer recommendations.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Benefits at Intel

Our total rewards package goes above and beyond just a paycheck. Whether you're looking to build your career, improve your health, or protect your wealth, we offer generous benefits to help you achieve your goals. Go to Intel Benefits | Intel Careers for details of benefits available to you. Intel reserves the right to modify, change or discontinue benefit plans at any time in its sole discretion.

Job Type:College GradShift:Shift 1 (United States of America)Primary Location: US, Arizona, PhoenixAdditional Locations:US, Oregon, HillsboroPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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