We are looking for you to join our team as a Principal Digital Verification Engineer or Sr. Principal Digital Verification Engineer based out of San Diego, CA. At the Northrop Grumman San Diego ...
We are looking for you to join our team as a Principal Digital Verification Engineer or Sr. Principal Digital Verification Engineer based out of San Diego, CA. At the Northrop Grumman San Diego ...
Principal Design Verification Engineer
Santa Clara, CA · On-site
$159K/yr
Principal Design Verification Engineer - UAL & PCIe Subsystems Location: Santa Clara, CA Work Arrangement: Onsite Employment Type: Full-Time (Permanent) About the Organization Our client is a ...
Quick apply
Principal Design Verification Engineer
Santa Clara, CA · On-site
$159K/yr
Principal Design Verification Engineer - UAL & PCIe Subsystems Location: Santa Clara, CA Work Arrangement: Onsite Employment Type: Full-Time (Permanent) About the Organization Our client is a ...
(Principal/Lead) SoC Design Verification Engineer (Sunnyvale)
Sunnyvale, CA · On-site
$160K - $195K/yr
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(Principal/Lead) SoC Design Verification Engineer (Sunnyvale)
Sunnyvale, CA · On-site
$160K - $195K/yr
(Principal/Lead) SoC Design Verification Engineer Job Openings (Principal/Lead) SoC Design Verification Engineer About the job (Principal/Lead) SoC Design Verification Engineer As a SoC Design ...
Principal/ Sr. Principal Digital Verification Engineer
San Diego, CA · On-site
$125.30 - $234.60/hr
We are looking for you to join our team as a Principal Digital Verification Engineer or Sr. Principal Digital Verification Engineer based out of San Diego, CA. At the Northrop Grumman San Diego ...
Principal/ Sr. Principal Digital Verification Engineer
San Diego, CA · On-site
$125.30 - $234.60/hr
We are looking for you to join our team as a Principal Digital Verification Engineer or Sr. Principal Digital Verification Engineer based out of San Diego, CA. At the Northrop Grumman San Diego ...
Principal Physical Verification Engineer
San Jose, CA · On-site
$150 - $250/hr
Principal Physical Verification Engineer * San Jose, CA Principal Full-Chip Physical Verification Engineer Key Responsibilities Team & Project Leadership * Lead full chip Physical Verification effort
Principal Physical Verification Engineer
San Jose, CA · On-site
$150 - $250/hr
Principal Physical Verification Engineer * San Jose, CA Principal Full-Chip Physical Verification Engineer Key Responsibilities Team & Project Leadership * Lead full chip Physical Verification effort
Principal Design Verification Engineer
Sunnyvale, CA · On-site
$250 - $280/hr
As a Principal Design Verification Engineer , you will own the verification strategy and execution for complex IPs or full‑chip SoC. You will lead a team of verification engineers, define ...
Principal Design Verification Engineer
Sunnyvale, CA · On-site
$250 - $280/hr
As a Principal Design Verification Engineer , you will own the verification strategy and execution for complex IPs or full‑chip SoC. You will lead a team of verification engineers, define ...
Principal Design Verification Engineer
San Jose, CA · On-site
$159K - $194K/yr
About the role SambaNova is looking for a Principal Design Verification Engineer to own verification for our next-generation RDU, the reconfigurable dataflow silicon behind our machine learning and ...
Principal Design Verification Engineer
San Jose, CA · On-site
$159K - $194K/yr
About the role SambaNova is looking for a Principal Design Verification Engineer to own verification for our next-generation RDU, the reconfigurable dataflow silicon behind our machine learning and ...
Design Verification Engineer
Santa Clara, CA · On-site
$159K - $194K/yr
Design Verification Engineer, Principal Santa Clara, CA - Onsite Full Time As a leading member of the Network Switching team you will develop the architecture for a functional verification ...
Quick apply
Design Verification Engineer
Santa Clara, CA · On-site
$159K - $194K/yr
Design Verification Engineer, Principal Santa Clara, CA - Onsite Full Time As a leading member of the Network Switching team you will develop the architecture for a functional verification ...
Principal Design Verification Engineer
Sunnyvale, CA · On-site
$250K - $280K/yr
As a Principal Design Verification Engineer , you will own the verification strategy and execution for complex IPs or full-chip SoC. You will lead a team of verification engineers, define ...
Principal Design Verification Engineer
Sunnyvale, CA · On-site
$250K - $280K/yr
As a Principal Design Verification Engineer , you will own the verification strategy and execution for complex IPs or full-chip SoC. You will lead a team of verification engineers, define ...
Design Verification Engineer
Santa Clara, CA · On-site
$180 - $260/hr
Design Verification Engineer, Principal Santa Clara, CA - Onsite Full Time As a leading member of the Network Switching team you will develop the architecture for a functional verification ...
Design Verification Engineer
Santa Clara, CA · On-site
$180 - $260/hr
Design Verification Engineer, Principal Santa Clara, CA - Onsite Full Time As a leading member of the Network Switching team you will develop the architecture for a functional verification ...
Principal Design Verification Engineer
Sunnyvale, CA · On-site
$250 - $280/hr
As a Principal Design Verification Engineer , you will own the verification strategy and execution for complex IPs or full‑chip SoC. You will lead a team of verification engineers, define ...
Principal Design Verification Engineer
Sunnyvale, CA · On-site
$250 - $280/hr
As a Principal Design Verification Engineer , you will own the verification strategy and execution for complex IPs or full‑chip SoC. You will lead a team of verification engineers, define ...
We are looking for a Principal Design Verification Engineer to join the team. #SCHIE Responsibilities In this role you will: * Creation of complex verification environments and tests, with UVM ...
We are looking for a Principal Design Verification Engineer to join the team. #SCHIE Responsibilities In this role you will: * Creation of complex verification environments and tests, with UVM ...
Principal ASIC Verification Engineer This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
Principal ASIC Verification Engineer This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
Design Verification Engineer
Santa Clara, CA · On-site
$158K - $317K/yr
Role: Design Verification Engineer, Principal Location: Onsite - Santa Clara, CA, US As part of the Design Verification Team at Marvell, you will verify all of the circuitry that goes inside our ...
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Design Verification Engineer
Santa Clara, CA · On-site
$158K - $317K/yr
Role: Design Verification Engineer, Principal Location: Onsite - Santa Clara, CA, US As part of the Design Verification Team at Marvell, you will verify all of the circuitry that goes inside our ...
Principal ASIC Verification Engineer This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
Principal ASIC Verification Engineer This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
Principal Design Verification Engineer (Silicon Engineering)
Palo Alto, CA · On-site
$210K - $355K/yr
PRINCIPAL DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband ...
Principal Design Verification Engineer (Silicon Engineering)
Palo Alto, CA · On-site
$210K - $355K/yr
PRINCIPAL DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband ...
Principal Design Verification Engineer
San Jose, CA · On-site
$180K - $255K/yr
About the role SambaNova is looking for a Principal Design Verification Engineer to own verification for our next-generation RDU, the reconfigurable dataflow silicon behind our machine learning and ...
Principal Design Verification Engineer
San Jose, CA · On-site
$180K - $255K/yr
About the role SambaNova is looking for a Principal Design Verification Engineer to own verification for our next-generation RDU, the reconfigurable dataflow silicon behind our machine learning and ...
Principal ASIC Verification Engineer This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
Principal ASIC Verification Engineer This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
Principal ASIC Verification Engineer
Sunnyvale, CA · On-site
$174 - $353/hr
Principal ASIC Verification Engineer This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office. Who We Are Hewlett Packard Enterprise ...
Principal ASIC Verification Engineer
Sunnyvale, CA · On-site
$174 - $353/hr
Principal ASIC Verification Engineer This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office. Who We Are Hewlett Packard Enterprise ...
Principal ASIC Verification Engineer This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
Principal ASIC Verification Engineer This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
Principal Verification Engineer information
See California salary details
$73K - $85.5K
3% of jobs
$85.5K - $97.9K
9% of jobs
$97.9K - $110.3K
9% of jobs
$116.5K is the 25th percentile. Wages below this are outliers.
$110.3K - $122.7K
10% of jobs
$122.7K - $135.2K
10% of jobs
The median wage is $144.7K / yr.
$135.2K - $147.6K
14% of jobs
$147.6K - $160K
13% of jobs
$167.6K is the 75th percentile. Wages above this are outliers.
$160K - $172.4K
15% of jobs
$172.4K - $184.9K
11% of jobs
$184.9K - $197.3K
5% of jobs
$197.3K - $209.7K
3% of jobs
$73K
$145.3K
$209.7K
How much do principal verification engineer jobs pay per year?
What is a principal verification engineer?
What are the key skills and qualifications needed to thrive as a principal verification engineer?
What are some common challenges faced by a principal verification engineer, and how can they be addressed?
What is the difference between Principal Verification Engineer vs Verification Engineer?
| Aspect | Principal Verification Engineer | Verification Engineer |
|---|---|---|
| Credentials | Typically requires a Bachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields; extensive experience in verification methodologies | Usually holds a Bachelor's or Master's in a relevant engineering discipline; less extensive experience needed |
| Work Environment | Leads verification teams, designs verification strategies, and oversees complex projects | Performs verification tasks, runs tests, and documents results under supervision |
| Industry Usage | Commonly found in semiconductor, electronics, and hardware industries | Widely used across similar industries for testing and validation roles |
The Principal Verification Engineer typically has more experience, leadership responsibilities, and oversees verification processes, while Verification Engineers focus on executing tests and validating designs. Both roles are essential in ensuring product quality but differ in scope and seniority.
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Principal/ Sr. Principal Digital Verification Engineer
San Diego, CA • On-site
Full-time
Medical, Life, PTO
Re-posted 25 days ago
Northrop Grumman rating
8.3
Based on 368 frontline employees who took The Breakroom Quiz
66th of 545 rated manufacturers
Job description
CLEARANCE REQUIRED FOR START: Yes
CLEARANCE TYPE: Secret
TRAVEL: Yes, 10% of the TimeDescription
At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.
We are looking for you to join our team as a Principal Digital Verification Engineer or Sr. Principal Digital Verification Engineer based out of San Diego, CA. At the Northrop Grumman San Diego campus our Advanced Digital Design organization creates the next generation of communications and signal processing systems and will take ideas from concept to working systems aboard the world's most advanced platforms right here in always-sunny San Diego. We design in our campus of labs and on-site advanced manufacturing just minutes from the beach and everything for which southern California is famous. It's work that matters and a career that can take you places. We seek degreed electrical or computer engineering engineers with hands-on experience in FPGA Verification with VHDL.
You will be responsible for digital designs associated with multi-function software-defined radios. Systems include state-of-art radios and test equipment for military applications.
This is a dual level requisition which can be filled as a Principal Digital Verification Engineer or Sr. Principal Digital Verification Engineer.
This position is contingent upon the ability to obtain a US Government secret clearance and future program awards.
Job Description:
- Define and maintain digital logic design verification frameworks and architectures for software-defined radio systems
- Develop a verification plan based on digital logic design requirements and design specifications
- Simulate and verify FPGA logic designs, requirements, and perform system validation
- Analyze and debug simulation failures, determine root causes of bugs, and work with designers to resolve issues
- Perform regression testing and generate verification metrics and reporting
- Operate in a team environment with 5-7 engineers
Basic Qualifications for a Principal:
- Bachelor's degree in Electrical Engineering or other STEM (Science, Technology, Engineering or Mathematics) discipline
- 5+ years of digital verification engineering experience using industry standard simulation tools (3+ years with an MS degree; 1+ years with PhD)
- Experience in VHDL design and verification methodologies for DoD communications systems
- FPGA deployable product process experience (requirements definition, conceptual design, detailed design, verification, and production release)
- Experience developing verification plans, functional tests, test benches, and bus functional models
- Experience with forecasting and estimating schedules for assigned tasks
- Demonstrated strong analytical skills and the ability to prioritize assignments according to program goals
- Experience using Siemens Questa Simulator
- Must be a US Citizen with the ability to obtain and maintain a Security Clearance
Basic Qualifications for a Sr. Principal:
- Bachelor's degree in Electrical Engineering or other STEM (Science, Technology, Engineering or Mathematics) discipline
- 8+ years of digital verification engineering experience using industry standard simulation tools (6+ years with an MS degree; 4+ years with PhD)
- Experience in VHDL design and verification methodologies for DoD communications systems
- FPGA deployable product process experience (requirements definition, conceptual design, detailed design, verification, and production release)
- Experience developing verification plans, functional tests, test benches, and bus functional models
- Experience with forecasting and estimating schedules for assigned tasks
- Demonstrated strong analytical skills and the ability to prioritize assignments according to program goals
- Experience using Siemens Questa Simulator
- Must be a US Citizen with the ability to obtain and maintain a Security Clearance
Preferred Qualifications:
- Active Security Clearance
- Experience with functional verification methodology using OSVVM for the full life cycle of products
- Experience with scripting languages for Verification automation in a Linux environment (Perl, TCL, Bash, and Makefile)
- Experience using Siemens formal applications such as Lint, Inspect, and CDC
- Ability to hold special access program clearances
Primary Level Salary Range: $125,300.00 - $187,900.00
Secondary Level Salary Range: $156,400.00 - $234,600.00
The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions.
Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.
The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.
Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.
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About Northrop Grumman
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At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible.
Industry
Space research administration
Company size
10,000+ Employees
Headquarters location
Falls Church, VA, US
Year founded
1939