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Ic Layout Jobs (NOW HIRING)

Impinj

Senior Staff Design Engineer, IC Layout

The Layout Design Engineering group is an integral part of the Silicon Engineering department, working closely with the analog RFID end-point IC development team and the Reader IC team ...

Texas Instruments

Analog IC Design Engineer

Dallas, TX · On-site

Direct IC layout to ensure performance, reliability, and manufacturability * Characterize silicon prototypes and develop test specifications in coordination with test and product engineering teams

Texas Instruments

Analog IC Design Engineer

Dallas, TX · On-site

Direct IC layout to ensure performance, reliability, and manufacturability * Characterize silicon prototypes and develop test specifications in coordination with test and product engineering teams

Saige Partners

ANalog Layout Engineer

San Jose, CA · On-site

$236K/yr

Senior High-Speed Mixed-Signal / Analog IC Layout Engineer (San Jose, CA)As an Analog Layout Engineer, you will be responsible for: Layout of Analog / High Speed transceiver circuit blocks such as ...

SRI International

Analog IC Design Engineer

Princeton, NJ · On-site

$81K - $108K/yr

Experience in analog IC layout to address DRC, LVS, matching, shielding, electromigration, IR drops, and power/ground bouncing issues * Design and tape-out experience of analog and mixed-signal CMOS ...

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How much do ic layout jobs pay per hour?

As of Aug 12, 2026, the average hourly pay for ic layout in the United States is $21.83, according to ZipRecruiter salary data. Most workers in this role earn between $15.62 and $22.12 per hour, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive in the IC layout position, and why are they important?

To thrive as an IC Layout professional, you need strong proficiency in analog and digital integrated circuit (IC) layout design, a solid understanding of semiconductor physics, and a degree in electrical engineering or a related field. Expertise with Electronic Design Automation (EDA) tools such as Cadence Virtuoso, Mentor Graphics, or Synopsys is typically required. Attention to detail, effective communication, and the ability to collaborate with circuit design engineers are valuable soft skills. These qualities ensure that layouts are precise, manufacturable, and meet stringent performance and reliability standards in the semiconductor industry.

What are some common challenges faced by IC layout engineers, and how do they typically overcome them?

IC Layout engineers often encounter challenges such as balancing area constraints with performance requirements, minimizing parasitic effects, and ensuring adherence to complex design rules. These challenges are addressed by leveraging advanced EDA tools, closely collaborating with circuit designers to understand specific needs, and frequently reviewing and updating the layout to align with fabrication requirements. Strong analytical thinking and attention to detail are essential for identifying and solving these issues. By keeping up with evolving technology and continually honing their skills, IC Layout engineers can efficiently deliver robust and high-quality designs.

What is an IC layout?

An IC Layout job involves designing the physical layout of integrated circuits (ICs) to ensure they meet electrical, manufacturing, and performance requirements. Layout engineers use specialized software to place and route transistors, resistors, and metal interconnects while following design rules and constraints. They work closely with circuit designers to optimize the layout for power, performance, and area. The role requires knowledge of semiconductor manufacturing processes and layout verification techniques such as DRC (Design Rule Checking) and LVS (Layout vs. Schematic).

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Ic Layout jobs near you
Infographic showing various Ic Layout job openings in the United States as of July 2026, with employment types broken down into 87% Full Time, 8% Part Time, 2% Contract, and 3% Nights. Highlights an 95% Physical, 1% Hybrid, and 4% Remote job distribution, with an average salary of $45,402 per year, or $21.8 per hour.

Analog/RF IC Layout Design Engineer.

Keysight Technologies, Inc.

Colorado Springs, CO • On-site

$117K - $195K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 18 days ago

Keysight Technologies rating

8.1

Company rating: 8.1 out of 10

Based on 20 frontline employees who took The Breakroom Quiz

49th of 157 rated electronics manufacturers

Job description

Overview
Keysight is at the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~16,800 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do.
Our award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers.
Responsibilities
Keysight Technologies has been and will continue to be the world's premier measurement company. Keysight Technologies has an opening for an Analog Layout Engineer in its ASIC/MMIC Design Center in Colorado Springs.
This specific position is to support a team of ASIC/MMIC designers by laying out full custom BiCMOS, CMOS, and bipolar (e.g., InP/GaAs) ICs for leading-edge test and
measurement products. Through close collaboration with IC designers and experts in IC technologies and IC design tools, you'll help create breakthrough components for new Keysight products. The position also requires tools and CAD knowledge to develop methodologies and automation to increase productivity and effectiveness.
Job Aspects include:
  • Creating transistor level layout views from schematics, spanning from cell-level up through top-level and full-chip assembly
  • Completing Design Rule Checking (DRC), Layout-vs-Schematic (LVS), Antenna Checks, and maintaining Layout XL compliance
  • Placing device primitives using best practices for thermal and device matching, like common centroid, dummy matching, RF symmetry, interdigitation, etc.
  • Soliciting IC designers for advice and feedback on critical circuit nodes, matching requirements, current density requirements, and other critical parameters for circuit
  • success
  • Knowledge of electro-migration (EMIR) and how to best prevent and correct its effects
  • Understanding of metal density requirements and proper ways to address this type of DRC error
  • Assisting the design team with IC floorplanning, creating grid cells and other custom layouts
  • Coordinating layout activities with other layout engineers and contractors

Complete chip level sign-off verifications
Qualifications
Must have qualifications:
  • BS/MS in Electrical Engineering, or applicable degree and/or relevant experience
  • 7+ years of experience with custom Analog IC Layout experience
  • 5+ years of experience with Cadence Virtuoso Layout XL tools including cell level design and top-level verification tasks including full-chip DRC, LVS and metal density/slot
  • rules
  • Familiarity with analog design in modern sub-micron BiCMOS (130 nm and smaller)
  • Knowledge of device matching, common centroid practices, parasitic effects, and other techniques for guaranteeing quality results
  • Ability to work on multiple cell designs in parallel in a dynamic environment
  • Experience with Version Control systems (e.g., SVN, Cliosoft/SOS)
  • Excellent teamwork, collaboration, and communication skills as you will work directly with IC design engineers and other layout designers

Additional skills that are nice to have:
  • Basic understanding of simple electrical circuits
  • Experience with Mentor Calibre DRC / LVS and similar EDA tools
  • Layout experience specifically for high-frequency (20+ GHz) bipolar signal path ICs
  • Linux fundamental knowledge
  • SKILL programming or other scripting experience
  • OCEAN experience

ITAR statement: This position requires access to certain goods, software, technology, or technical data subject to U.S. export control laws and regulations. Under these laws and regulations, U.S. persons (which includes U.S. citizens, U.S. nationals, lawful permanent residents, refugees, and asylees) working for Keysight can access export-controlled items without authorization from the U.S. government. For any individual who is not a U.S. person, Keysight may need authorization from the U.S. Department of State, U.S. Department of Commerce, or other appropriate federal agency before the individual can access export-controlled items. Employment in this position for non-U.S. persons is contingent on Keysight's ability to obtain any required government authorizations.
We are unable to support visa sponsorship for this position.
Careers Privacy Statement
Keysight Technologies Inc. is an equal opportunity employer. Qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, protected veteran status, disability or any other protected categories under all applicable laws.
Most offers will be between the minimum and the midpoint of the Salary Range listed below.
MIN $117,530.00 - MAX $195,880.00
Note: For other locations, pay ranges will vary by region
This role is eligible for Keysight Results Bonus Program
US Employees may be eligible for the following benefits:
  • Medical, dental and vision
  • Health Savings Account
  • Health Care and Dependent Care Flexible Spending Accounts
  • Life, Accident, Disability insurance
  • Business Travel Accident and Business Travel Health
  • 401(k) Plan
  • Flexible Time Off, Paid Holidays
  • Paid Family Leave
  • Discounts, Perks
  • Tuition Reimbursement
  • Adoption Assistance
  • ESPP (Employee Stock Purchase Plan)
  • Restricted Stock Units

#LI-MED1

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