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Ic Layout Jobs (NOW HIRING)

IC Layout engineer

Irvine, CA · On-site

$85.90 - $137.50/hr

Position Analog Layout Engineer, Analog Design and Circuit Technology, Irvine, California. Responsibilities * Work closely with the design team to develop high‑quality layouts for product ...

The Layout Design Engineering group is an integral part of the Silicon Engineering department, working closely with the analog RFID end-point IC development team and the Reader IC team ...

The Layout Design Engineering group is an integral part of the Silicon Engineering department, working closely with the analog RFID end-point IC development team and the Reader IC team ...

Direct IC layout to ensure performance, reliability, and manufacturability * Characterize silicon prototypes and develop test specifications in coordination with test and product engineering teams

Direct IC layout to ensure performance, reliability, and manufacturability * Characterize silicon prototypes and develop test specifications in coordination with test and product engineering teams

Analog IC Design Engineer

Princeton, NJ · On-site

$81K - $108K/yr

Experience in analog IC layout to address DRC, LVS, matching, shielding, electromigration, IR drops, and power/ground bouncing issues * Design and tape-out experience of analog and mixed-signal CMOS ...

Associates Degree in Electronic/IC layout CAD specialization or related program and 10+ years of IC layout experience * Ability to layout analog circuitry in a size/time constrained environment

You will be an integral part of the IC design team and lead the discipline of layout at the technical level, and will work with RFIC/mixed signal designers on full chip layout of custom analog and ...

You will be an integral part of the IC design team and lead the discipline of layout at the technical level, and will work with RFIC/mixed signal designers on full chip layout of custom analog and ...

Staff Layout Design Engineer

Raleigh, NC · On-site

$144K - $187K/yr

Associates Degree in Electronic/IC layout CAD specialization or related program and 10+ years of IC layout experience * Ability to layout analog circuitry in a size/time constrained environment

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Ic Layout information

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How much do ic layout jobs pay per hour?

As of Sep 2, 2026, the average hourly pay for ic layout in the United States is $21.83, according to ZipRecruiter salary data. Most workers in this role earn between $15.62 and $22.12 per hour, depending on experience, location, and employer.

What is an IC layout?

An IC Layout job involves designing the physical layout of integrated circuits (ICs) to ensure they meet electrical, manufacturing, and performance requirements. Layout engineers use specialized software to place and route transistors, resistors, and metal interconnects while following design rules and constraints. They work closely with circuit designers to optimize the layout for power, performance, and area. The role requires knowledge of semiconductor manufacturing processes and layout verification techniques such as DRC (Design Rule Checking) and LVS (Layout vs. Schematic).

What are the key skills and qualifications needed to thrive in the IC layout position, and why are they important?

To thrive as an IC Layout professional, you need strong proficiency in analog and digital integrated circuit (IC) layout design, a solid understanding of semiconductor physics, and a degree in electrical engineering or a related field. Expertise with Electronic Design Automation (EDA) tools such as Cadence Virtuoso, Mentor Graphics, or Synopsys is typically required. Attention to detail, effective communication, and the ability to collaborate with circuit design engineers are valuable soft skills. These qualities ensure that layouts are precise, manufacturable, and meet stringent performance and reliability standards in the semiconductor industry.

What are some common challenges faced by IC layout engineers, and how do they typically overcome them?

IC Layout engineers often encounter challenges such as balancing area constraints with performance requirements, minimizing parasitic effects, and ensuring adherence to complex design rules. These challenges are addressed by leveraging advanced EDA tools, closely collaborating with circuit designers to understand specific needs, and frequently reviewing and updating the layout to align with fabrication requirements. Strong analytical thinking and attention to detail are essential for identifying and solving these issues. By keeping up with evolving technology and continually honing their skills, IC Layout engineers can efficiently deliver robust and high-quality designs.

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Infographic showing various Ic Layout job openings in the United States as of August 2026, with employment types broken down into 1% Internship, 83% Full Time, 11% Part Time, 2% Contract, and 3% Nights. Highlights an 93% Physical, 2% Hybrid, and 5% Remote job distribution, with an average salary of $45,402 per year, or $21.8 per hour.

$85.90 - $137.50/hr

Other

Medical, Life, Retirement, PTO

Posted 14 days ago


Job description

MediaTek Incorporated is a global fabless semiconductor company that enables nearly 2 billion connected devices a year. We are a market leader in developing innovative systems‑on‑chip (SoC) for mobile devices, automotive, home entertainment, connectivity and IoT products. Our dedication to innovation has positioned us as a driving market force in several key technology areas, including highly power‑efficient mobile technologies, automotive solutions and a broad range of advanced multimedia products such as smartphones, tablets, digital televisions, 5G, Voice Assistant Devices (VAD) and wearables. MediaTek empowers and inspires people to expand their horizons and achieve their goals through smart technology, more easily and efficiently than ever before. We work with the brands you love to make great technology accessible to everyone, and it drives everything we do. Visit www.mediatek.com for more information.

Position

Analog Layout Engineer, Analog Design and Circuit Technology, Irvine, California.

Responsibilities
  • Work closely with the design team to develop high‑quality layouts for product, data‑converters, power management circuitry, and various other IP.
  • Perform layout in CMOS or FinFET technologies for high‑speed front ends, ADCs, DACs, PLLs and other mixed‑signal IP.
  • Design layout, verification, parasitic extraction using the Cadence design environment.
Main Requirements and Qualifications
  • Proficient in Virtuoso and Calibre tools.
  • Familiar with validating LVS/DRC/ERC/ANT/ESD/LPE.
  • Layout experience in high‑speed circuits, hybrid circuits, low‑dropout regulators, phase‑locked loops and ESD.
  • Knowledge of N7/N5/N3 processes.
Compensation and Benefits
  • Salary range: $85,900 – $137,500.
  • Employee may be eligible for performance bonus, short‑ and long‑term incentive programs. Total compensation will depend on skills, experience, and qualifications.
  • Benefits include comprehensive health insurance coverage, life and disability insurance, savings plan, company paid holidays, paid time off (PTO), parental leave, 401(k) and more.

MediaTek is an Equal Opportunity Employer committed to inclusion and diversity of all, regardless of age, ancestry, color, disability, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (including pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.

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