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Ic Layout Contract Jobs (NOW HIRING)

Teledyne

Sr. ASIC Layout Design Engineer

Goleta, CA · On-site

$113K - $151K/yr

... contracts. As part of our close-knit team, you will play a key role in producing analog and mixed ... Develop high-quality analog/mixed-signal IC layouts and create GDS databases of completed designs ...

Teledyne FLIR LLC

Sr. ASIC Layout Design Engineer

Goleta, CA · On-site

$113K - $151K/yr

... contracts. As part of our close-knit team, you will play a key role in producing analog and mixed ... Develop high-quality analog/mixed-signal IC layouts and create GDS databases of completed designs ...

Apple

iPhone Analog System EE

Cupertino, CA · On-site

... Contract Manufacturer teams, and IC vendor teams throughout different development stages ... and layout reviews, manufacturing and production test support, systems validation and ...

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Ic Layout Contract information

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How much do ic layout contract jobs pay per hour?

As of Aug 23, 2026, the average hourly pay for ic layout contract in the United States is $21.83, according to ZipRecruiter salary data. Most workers in this role earn between $15.62 and $22.12 per hour, depending on experience, location, and employer.

What is an IC Layout Contract?

An IC Layout Contract job involves designing and drafting the physical layout of integrated circuits (ICs) for semiconductor manufacturing. Contractors typically work on short-term or project-based assignments for companies that need custom IC designs. Responsibilities include placing transistors, routing interconnections, and ensuring compliance with design rules. These professionals use industry-standard software like Cadence Virtuoso or Synopsys Custom Compiler. Strong knowledge of semiconductor fabrication processes and design constraints is essential.

What are the key skills and qualifications needed to thrive in the IC Layout Contract position?

To thrive as an IC Layout Contract professional, you need strong expertise in analog and digital IC layout, a solid understanding of semiconductor fabrication processes, and relevant education in electrical or electronics engineering. Proficiency with industry-standard EDA tools such as Cadence Virtuoso, Mentor Graphics, or Synopsys, along with knowledge of DRC/LVS checks, is typically required. Attention to detail, effective communication, and the ability to work independently are important soft skills in this role. These skills are crucial for delivering high-quality, manufacturable layouts within project timelines, while collaborating with design and verification teams.

What are the common challenges faced by IC Layout Contract professionals, and how can they overcome them?

IC Layout Contract professionals often encounter challenges such as tight project deadlines, managing complex design rules, and ensuring accurate communication across multidisciplinary teams. Staying updated with the latest EDA tools and process technology helps address the technical complexities of advanced node designs. Regular collaboration with circuit designers and verification engineers is essential for catching potential errors early and meeting quality standards. Maintaining organized documentation and clear communication channels can streamline workflow and help mitigate common issues. By proactively managing these challenges, layout engineers can consistently deliver reliable and manufacturable designs.

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Ic Layout Contract jobs near you
Infographic showing various Ic Layout Contract job openings in the United States as of August 2026, with employment types broken down into 86% Full Time, and 14% Contract. Highlights an 86% In-person, and 14% Hybrid job distribution, with an average salary of $45,402 per year, or $21.8 per hour.

Analog Layout Engineer Contract (TSMC N3)

Technical Link

Mountain View, CA • On-site

$236K/yr

Other

This job post has expired today. Applications are no longer accepted.

Job description

Job Title: Analog Layout Engineer – Contract (TSMC N3)
Location: Mountain View, CA – Onsite
Contract: 6 Months

Onsite Requirement: Candidates must be able to work onsite in Mountain View at least 4 days per week. During tapeout periods, engineers will be required onsite 5 days per week, with potential weekend support.

Description:
Seeking an experienced Analog Layout Engineer with TSMC N3 experience. You’ll create high-quality, manufacturable analog layouts, collaborate with design engineers, and ensure designs meet electrical and DRC/LVS requirements.
Requirements:
Proven analog IC layout experience (TSMC N3 or similar)
Proficiency with layout tools (Cadence Virtuoso, Synopsys, or equivalent)
Strong understanding of analog performance, matching, and parasitics

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