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Ic Layout Contract Jobs (NOW HIRING)

IC Enable

RFIC Layout Design (TSMC 4nm)

Richardson, TX · On-site +1

Opportunity for W2 Employment or Contract Minimum Qualifications * Minimum 5 years of Industry ... IC Enable benefits include Medical, Dental, Vision and Ancillary benefits, 401K Plan with Company ...

MDT Technical

Contract Hardware Engineer Mid

San Jose, CA · On-site

$144K - $191K/yr

Design Experience: 8-12+ years of hands-on experience in analog IC design. Knowledge and Skills ... Perform comprehensive pre-layout and post-layout simulations, including Monte Carlo, corner ...

Teledyne

Sr. ASIC Layout Design Engineer

Goleta, CA

$113K - $151K/yr

... contracts. As part of our close-knit team, you will play a key role in producing analog and mixed ... Develop high-quality analog/mixed-signal IC layouts and create GDS databases of completed designs ...

Teledyne FLIR LLC

Sr. ASIC Layout Design Engineer

Goleta, CA · On-site

$113K - $151K/yr

... contracts. As part of our close-knit team, you will play a key role in producing analog and mixed ... Develop high-quality analog/mixed-signal IC layouts and create GDS databases of completed designs ...

Apple

iPhone Analog System EE

Cupertino, CA · On-site

... Contract Manufacturer teams, and IC vendor teams throughout different development stages ... and layout reviews, manufacturing and production test support, systems validation and ...

Protingent

Senior Staff CAD Engineer

San Jose, CA · On-site

$65 - $75/hr

Protingent Staffing has an exciting contract Senior Staff CAD Engineer with our client located in ... We are looking for a senior IC EDA/CAD Engineer to own and advance our EDA design flows, IT infrast ...

USA Firmware

Mid-Level PCB Designer

Brecksville, OH · Hybrid

You'll be responsible for PCB layout from concept through production using Altium Designer and ... RS-485 * SPI * IC * UART * Bluetooth * Wi-Fi * Cellular products * Switching power supplies

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How much do ic layout contract jobs pay per hour?

As of Aug 2, 2026, the average hourly pay for ic layout contract in the United States is $21.83, according to ZipRecruiter salary data. Most workers in this role earn between $15.62 and $22.12 per hour, depending on experience, location, and employer.

What is the highest paid design job?

In the field of IC layout design, senior and lead positions such as IC Design Engineers or FPGA Design Engineers tend to have the highest salaries, especially with expertise in advanced semiconductor processes and EDA tools. These roles often require specialized skills, certifications, and experience, and can command high compensation in the semiconductor industry.

What are the key skills and qualifications needed to thrive in the Ic Layout Contract position, and why are they important?

To thrive as an IC Layout Contract professional, you need strong expertise in analog and digital IC layout, a solid understanding of semiconductor fabrication processes, and relevant education in electrical or electronics engineering. Proficiency with industry-standard EDA tools such as Cadence Virtuoso, Mentor Graphics, or Synopsys, along with knowledge of DRC/LVS checks, is typically required. Attention to detail, effective communication, and the ability to work independently are important soft skills in this role. These skills are crucial for delivering high-quality, manufacturable layouts within project timelines, while collaborating with design and verification teams.

How to get a job in IC design?

To get a job in IC design, candidates typically need a bachelor's degree in electrical engineering, electronics, or a related field. Proficiency in hardware description languages like VHDL or Verilog, experience with CAD tools such as Cadence or Synopsys, and a strong understanding of digital or analog circuit design are essential. Internships and hands-on project experience can also improve job prospects.

How much do analog IC design engineers make in the US?

Analog IC design engineers in the US typically earn between $90,000 and $150,000 annually, with experienced professionals and those working in high-demand sectors earning higher salaries. Compensation varies based on experience, location, and company size, and may include bonuses and stock options.

What are the common challenges faced by IC Layout Contract professionals, and how can they overcome them?

IC Layout Contract professionals often encounter challenges such as tight project deadlines, managing complex design rules, and ensuring accurate communication across multidisciplinary teams. Staying updated with the latest EDA tools and process technology helps address the technical complexities of advanced node designs. Regular collaboration with circuit designers and verification engineers is essential for catching potential errors early and meeting quality standards. Maintaining organized documentation and clear communication channels can streamline workflow and help mitigate common issues. By proactively managing these challenges, layout engineers can consistently deliver reliable and manufacturable designs.

What does an IC layout engineer do?

An IC layout engineer designs the physical layout of integrated circuits, translating circuit schematics into detailed geometric representations for manufacturing. They use CAD tools like Cadence or Synopsys to ensure the layout meets electrical, thermal, and manufacturing specifications. Their work is essential for ensuring chip performance, reliability, and manufacturability.

What is an IC Layout Contract job?

An IC Layout Contract job involves designing and drafting the physical layout of integrated circuits (ICs) for semiconductor manufacturing. Contractors typically work on short-term or project-based assignments for companies that need custom IC designs. Responsibilities include placing transistors, routing interconnections, and ensuring compliance with design rules. These professionals use industry-standard software like Cadence Virtuoso or Synopsys Custom Compiler. Strong knowledge of semiconductor fabrication processes and design constraints is essential.

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Ic Layout Contract jobs near you
Infographic showing various Ic Layout Contract job openings in the United States as of July 2026, with employment types broken down into 100% Full Time. Highlights an 66% In-person, 17% Hybrid, and 17% Remote job distribution, with an average salary of $45,402 per year, or $21.8 per hour.

Senior IC Layout Engineer (TSMC 12/16nm)

Technical Link

Dallas, TX • On-site

Other

Posted 11 days ago

Job description

Plano, TX (right outside Dallas)

Duration – 3 months

Manager feedback: 

I need TSMC12/16 expertise that can start asap with 100% familiarity with the node

I am looking for a layout engineer to cover an overload. The need is to have experience in TSMC12/16 or TSMC lower nodes.

Position Overview

We are seeking an experienced IC Layout Engineer to support a high-priority project and help address increased design workload. The ideal candidate will have strong custom IC layout experience with advanced TSMC process technologies and a proven track record of delivering high-quality layouts in complex semiconductor designs.

Key Responsibilities

  • Perform custom IC layout design for analog, mixed-signal, and/or digital integrated circuits.
  • Create and verify transistor-level layouts while ensuring compliance with foundry design rules.
  • Work closely with design, verification, and physical design teams to achieve performance, area, and reliability targets.
  • Execute layout verification activities including DRC, LVS, ERC, and parasitic extraction.
  • Support layout optimization for performance, power, and manufacturability.
  • Collaborate with cross-functional teams to meet project schedules and tapeout milestones.

Required Qualifications

  • Proven experience as an IC Layout Engineer in advanced semiconductor process technologies.
  • Hands-on layout experience with TSMC 12nm, 16nm, or more advanced process nodes.
  • Strong understanding of semiconductor fabrication processes and physical design methodologies.
  • Experience performing DRC, LVS, and parasitic extraction signoff.
  • Proficiency with industry-standard EDA tools such as Cadence Virtuoso and Calibre.
  • Ability to work independently and contribute immediately in a fast-paced development environment.

Preferred Qualifications

  • Experience with FinFET technologies.
  • Background in high-speed, mixed-signal, RF, networking, AI/ML, or data center semiconductor products.
  • Prior tapeout experience in advanced TSMC nodes.
  • Strong communication and collaboration skills.

Duration

Contract opportunity with the potential for extension based on project needs.

Apply