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Junior Ic Layout Jobs (NOW HIRING)

IC Enable

IC Layout Design Engineer

Richardson, TX · Hybrid

The team has an exciting opportunity for a IC Layout Design Engineer V to join our diverse team ... This position is best suited for a junior-mid level engineer who is hungry, humble and smart and is ...

Micron Technology

Staff Layout Designer

San Jose, CA · On-site

$72 - $122/hr

Effectively mentor junior team members * Contribute to the improvement of layout efficiency through ... IC layout design experience with NAND, DRAM and/or SRAM * Programming skills and AI experience ...

Micron

Staff Layout Designer

San Jose, CA · On-site

$72 - $122/hr

Effectively mentor junior team members * Contribute to the improvement of layout efficiency through ... IC layout design experience with NAND, DRAM and/or SRAM * Programming skills and AI experience ...

Synopsys

R&D Engineering, Sr Architect-17656

Sunnyvale, CA · On-site

$226K - $338K/yr

... IC layout for advanced nodes * Collaborate with Synopsys IP teams to integrate and proliferate Custom Compiler layout automation technologies across internal design flows * Mentor and guide junior ...

Synopsys

R&D Engineering, Sr Architect

Sunnyvale, CA · Remote

$226K - $338K/yr

... IC layout for advanced nodes * Collaborate with Synopsys IP teams to integrate and proliferate Custom Compiler layout automation technologies across internal design flows * Mentor and guide junior ...

Apple

IC Designer - Power Management

Cupertino, CA · On-site

Additionally, this role covers IC areas closely related to power converter IPs such as mixed signal ... layout, and production. We work in a team environment to build sophisticated power management ...

Lockheed Martin

ASIC & FPGA Design Engineer Stf

Orlando, FL · On-site

$114K - $158K/yr

... junior layout engineers and promote an inclusive, knowledge sharing culture. Why Join Us Do you ... signal IC layout design • Layout experience across process nodes ranging from 130nm to 12nm ...

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Junior Ic Layout information

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$33.5K

$71.8K

$109.5K

How much do junior ic layout jobs pay per year?

As of Jun 9, 2026, the average yearly pay for junior ic layout in the United States is $71,799.00, according to ZipRecruiter salary data. Most workers in this role earn between $48,500.00 and $80,000.00 per year, depending on experience, location, and employer.

What are some typical challenges junior IC layout engineers face when transitioning from academic projects to professional environments?

Junior IC layout engineers often find that transitioning from academic assignments to industry projects involves adapting to stricter design rules, tighter deadlines, and more complex verification processes. In professional environments, they must collaborate closely with circuit designers and verification engineers, ensuring that layouts meet both functional and manufacturability requirements. Additionally, learning to use advanced EDA tools efficiently and understanding company-specific workflow standards are common hurdles. Support from senior team members and proactive communication can help overcome these challenges and accelerate skill development.

What are the key skills and qualifications needed to thrive as a Junior IC Layout Engineer, and why are they important?

To thrive as a Junior IC Layout Engineer, you need a solid understanding of semiconductor physics, circuit design basics, and relevant engineering degrees or coursework. Proficiency in CAD layout tools such as Cadence Virtuoso, as well as familiarity with design rule checks (DRC) and LVS tools, is typically required. Attention to detail, problem-solving skills, and effective communication are essential soft skills for collaborating with design teams and ensuring design accuracy. These competencies are vital for producing reliable, manufacturable integrated circuit layouts that meet performance and quality standards.

What are Junior IC Layout Engineers?

Junior IC (Integrated Circuit) Layout Engineers are entry-level professionals who assist in designing the physical layout of integrated circuits using specialized CAD tools. They work closely with senior engineers to convert circuit schematics into actual silicon layouts, ensuring that the designs meet performance, area, and power requirements. Their responsibilities typically include layout drawing, verification, and assisting in design rule checks under supervision. Junior IC Layout Engineers play a crucial role in the development of microchips used in electronics. This position is ideal for those with a background in electrical engineering or microelectronics and a keen attention to detail.

What is the difference between Junior Ic Layout vs Senior Ic Layout?

AspectJunior Ic LayoutSenior Ic Layout
ExperienceEntry-level, 0-2 yearsAdvanced, 3+ years
ResponsibilitiesAssisting in layout design, following guidelinesLeading layout projects, optimizing designs
SkillsBasic CAD tools, fundamental IC design knowledgeExpertise in CAD, design optimization, mentorship
CertificationsRelevant coursework or certificationsAdvanced certifications preferred

The main difference between Junior Ic Layout and Senior Ic Layout lies in experience, responsibilities, and skill level. Junior roles focus on assisting and learning, while senior roles involve leading projects and providing expertise. Both positions are essential in the IC design industry, with senior roles requiring more experience and advanced skills.

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Junior Ic Layout jobs near you
Infographic showing various Junior Ic Layout job openings in the United States as of June 2026, with employment types broken down into 92% Full Time, 6% Part Time, and 2% Contract. Highlights an 94% Physical, 2% Hybrid, and 4% Remote job distribution, with an average salary of $71,799 per year, or $34.5 per hour.
IC Layout Manager (Analog/Mixed Signal)

IC Layout Manager (Analog/Mixed Signal)

IC Enable

Richardson, TX • Hybrid

Full-time

Medical, Dental, Vision, Retirement

Posted 9 days ago

Job description

About IC Enable
For over 20 years, IC Enable has delivered high-reliability design IP, IC products, and platform solutions to customers ranging from fast-moving startups to Fortune 50 companies. Our work spans mixed-signal and digital IC design, with deep expertise in full-custom ASIC/SoC development across semiconductor, medical, and defense applications—often in some of the industry’s most demanding process nodes and use cases. We’re growing—and looking for a senior layout / mask design leader who can own critical pieces of complex silicon development and raise the bar for execution across our team.
At IC Enable, we approach every challenge with a startup mindset—nimble, relentless, and unwilling to accept limits. No task is too complex or too ambitious; we take ownership, solve hard problems, and push forward as we continue building something bigger than ourselves.
The Role
As a Mixed-Signal and Analog IC Layout Manager, you will take ownership of chip-level layout execution and verification for high-performance, full-custom ICs. This is a hands-on leadership role: you’ll drive layout quality, guide best practices, and collaborate closely with design, verification, and customer teams to deliver first-pass success on challenging designs.
Location: Richardson, TX (Hybrid: 3 days onsite)
What You’ll Do
  • Lead chip-level layout integration across analog, digital, and IP blocks
  • Own full-chip physical verification: DRC, LVS, EM/IR, parasitic extraction, and density compliance
  • Drive layout quality, consistency, and adherence to foundry requirements
  • Collaborate with cross-functional teams (design, CAD, verification) across global locations
  • Review and interpret layout specifications to ensure accuracy and performance alignment
  • Mentor junior layout engineers and contribute to continuous improvement of layout methodologies
What You Bring
  • 10+ years of hands-on IC layout experience, with significant exposure to mixed-signal designs
  • Proven track record delivering complex, full-custom chips to tape-out
  • Deep expertise with industry-standard tools: Cadence Virtuoso or Synopsys Custom Compiler, and physical verification tools such as Calibre, PVS, or IC Validator
  • Strong experience with LVS, DRC, and chip-level verification flows
  • Solid understanding of semiconductor manufacturing processes and design rules
  • High attention to detail and ability to work effectively under tight timelines
  • Strong communication skills, with experience working directly with internal teams and external customers
  • Must comply with all applicable International Traffic in Arms Regulations (ITAR) requirements (Requires U.S. Persons). Due to the nature of the work and access to export-controlled information, applicants must be authorized to access ITAR-restricted data in accordance with U.S. export control laws and regulations.
Education
  • Bachelor’s degree in Electrical Engineering or equivalent experience (Associate degree with significant industry experience considered)
Why IC Enable
We hire people who are humble, driven, and highly capable—and give them the opportunity to work on technically challenging, meaningful designs. You’ll be part of a team that values ownership, precision, and continuous growth.
Benefits include:
  • Medical, Dental, Vision, and supplemental coverage
  • 401(k) with company match
  • Collaborative, engineering-focused culture
Equal Opportunity Employer
IC Enable is committed to building a diverse and inclusive team.

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About IC Enable

Sourced by ZipRecruiter

Industry

Semiconductor and electronic component manufacturing

Company size

51 - 200 Employees

Headquarters location

Dallas, TX, US

Year founded

2004

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