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Junior Ic Layout Jobs (NOW HIRING)

Fermilab

Jr. ASIC Design Engineer

Batavia, IL · On-site

$70K - $93K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Designing circuit networks using schematic entry and layout tools with full custom or timing-driven ... IC design. * Familiarity with principles of instrumentation for radiation detection with solid ...

Elevate Semiconductor

Staff Analog Design Engineer

San Diego, CA · On-site

$145K - $195K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

You will drive architecture decisions, mentor junior engineers, and play a key role in delivering ... Perform and review layout, verification, and post layout simulations including advanced corner ...

Elevate Semiconductor

Staff Analog Design Engineer

San Diego, CA · On-site

$145K - $195K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

You will drive architecture decisions, mentor junior engineers, and play a key role in delivering ... Perform and review layout, verification, and post layout simulations including advanced corner ...

Elevate Semiconductor

Staff Analog Design Engineer

San Diego, CA

$145K - $195K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

You will drive architecture decisions, mentor junior engineers, and play a key role in delivering ... Perform and review layout, verification, and post layout simulations including advanced corner ...

TetraMem Inc

CAD Engineer

San Jose, CA · On-site

$110K - $250K/yr

Development of in-house CAD tools for analog design, analog layout, database management, digital ... Mentor and provide technical guidance to junior engineers, fostering a culture of continuous ...

TetraMem - Accelerate The World

CAD Engineer

San Jose, CA · On-site

$110K - $250K/yr

Development of in-house CAD tools for analog design, analog layout, database management, digital ... Mentor and provide technical guidance to junior engineers, fostering a culture of continuous ...

Skyworks

Staff Electrical Engineer

Austin, TX · On-site

$114K - $220K/yr

  • Medical

  • Retirement

  • PTO

Requisition ID: 77946 Description Seeking an experienced Analog IC design engineer for developing ... Advanced understanding of layout tradeoffs for performance and size * Experience mentoring junior ...

Skyworks

Staff Electrical Engineer

Austin, TX · On-site

$114K - $220K/yr

  • Medical

  • Retirement

  • PTO

Requisition ID: 77946 Description Seeking an experienced Analog IC design engineer for developing ... Advanced understanding of layout tradeoffs for performance and size * Experience mentoring junior ...

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Junior Ic Layout information

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$33.5K

$71.8K

$109.5K

How much do junior ic layout jobs pay per year?

As of Aug 15, 2026, the average yearly pay for junior ic layout in the United States is $71,799.00, according to ZipRecruiter salary data. Most workers in this role earn between $48,500.00 and $80,000.00 per year, depending on experience, location, and employer.

What are some typical challenges junior IC layout engineers face when transitioning from academic projects to professional environments?

Junior IC layout engineers often find that transitioning from academic assignments to industry projects involves adapting to stricter design rules, tighter deadlines, and more complex verification processes. In professional environments, they must collaborate closely with circuit designers and verification engineers, ensuring that layouts meet both functional and manufacturability requirements. Additionally, learning to use advanced EDA tools efficiently and understanding company-specific workflow standards are common hurdles. Support from senior team members and proactive communication can help overcome these challenges and accelerate skill development.

What are the key skills and qualifications needed to thrive as a junior IC layout engineer?

To thrive as a Junior IC Layout Engineer, you need a solid understanding of semiconductor physics, circuit design basics, and relevant engineering degrees or coursework. Proficiency in CAD layout tools such as Cadence Virtuoso, as well as familiarity with design rule checks (DRC) and LVS tools, is typically required. Attention to detail, problem-solving skills, and effective communication are essential soft skills for collaborating with design teams and ensuring design accuracy. These competencies are vital for producing reliable, manufacturable integrated circuit layouts that meet performance and quality standards.

What is a junior IC layout?

Junior IC (Integrated Circuit) Layout Engineers are entry-level professionals who assist in designing the physical layout of integrated circuits using specialized CAD tools. They work closely with senior engineers to convert circuit schematics into actual silicon layouts, ensuring that the designs meet performance, area, and power requirements. Their responsibilities typically include layout drawing, verification, and assisting in design rule checks under supervision. Junior IC Layout Engineers play a crucial role in the development of microchips used in electronics. This position is ideal for those with a background in electrical engineering or microelectronics and a keen attention to detail.

What is the difference between Junior Ic Layout vs Senior Ic Layout?

AspectJunior Ic LayoutSenior Ic Layout
ExperienceEntry-level, 0-2 yearsAdvanced, 3+ years
ResponsibilitiesAssisting in layout design, following guidelinesLeading layout projects, optimizing designs
SkillsBasic CAD tools, fundamental IC design knowledgeExpertise in CAD, design optimization, mentorship
CertificationsRelevant coursework or certificationsAdvanced certifications preferred

The main difference between Junior Ic Layout and Senior Ic Layout lies in experience, responsibilities, and skill level. Junior roles focus on assisting and learning, while senior roles involve leading projects and providing expertise. Both positions are essential in the IC design industry, with senior roles requiring more experience and advanced skills.

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Junior Ic Layout jobs near you
Infographic showing various Junior Ic Layout job openings in the United States as of August 2026, with employment types broken down into 100% Full Time. Highlights an 50% In-person, and 50% Hybrid job distribution, with an average salary of $71,799 per year, or $34.5 per hour.

Jr. ASIC Design Engineer

Fermilab

Batavia, IL • On-site

$70K - $93K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 24 days ago

Fermilab rating

9.1

Company rating: 9.1 out of 10

Based on 9 frontline employees who took The Breakroom Quiz

11th of 120 rated laboratories

Job description

The expected hiring range for this position is:
$70,800.00-$93,200.00.
Please note that the pay range information is a general guideline only. The pay offered to a selected candidate will be determined based on factors such the scope and responsibilities of the position, qualifications of the selected candidate, business considerations, internal equity, and external market pay for comparable jobs.
About the Role:
We are looking for a Junior ASIC Design Engineer to lead and contribute to research activities and engineering work focused on developing custom instrumentation for extreme radiation and/or cryogenic environments.
What your day-to-day as a Junior ASIC Design Engineer at Fermilab will look like:
  • Performing a leading role in Analog and RF ASIC design projects, while being able to contribute individually to major design tasks.
  • Developing design specifications for ASICs based on theoretical analyses and in conjunction with application needs.
  • Designing circuit networks using schematic entry and layout tools with full custom or timing-driven layout tools in Cadence CAD/EDA or a similar environment.
  • Models circuit networks and system components in hardware-description languages (Verilog-A and Verilog/SystemVerilog).
  • Building test benches and carries out analog and/or RF circuit simulations.
  • Executing physical and functional circuit and system verification.
  • Preparing documentation and participates in test-board designs and laboratory testing.
  • Delivering presentations internally, at national and international workshops, and at the topical conferences.
  • Performing other duties as assigned by supervisor.
  • Abiding by and being responsible for performing all duties in accordance with all environmental, health and safety regulations and practices pertinent to this position.

Skills and Attributes for Success:
  • Bachelor's degree in an applicable Engineering discipline from an ABET accredited institution.

Applicable Knowledge, Skills and Abilities Required:
  • Readiness for working on challenging projects that may have tight schedules.
  • Capability of working as part of a design team in a research and development environment
  • Experience with industry-standard front-end and back-end CAD/EDA design tools, such as Cadence, Synopsys and Mentor for the IC design.
  • Familiarity with principles of instrumentation for radiation detection with solid state or gaseous detectors and usages in extreme environments, like cryogenic or radiation harsh conditions
  • Strong computer skills and competence in performing analytical engineering calculations, in drawing schematics and in documentation.

Work Arrangement:
Please note that the described work arrangement is subject to change based on business needs and is not guaranteed to be final.
  • Hybrid: is a work arrangement in which an employee as part of an ongoing regular schedule, works at an alternative worksite in the United States (e.g., an employee's residence) on some days and at the primary worksite on other days. Requires an approved hybrid work request for one or more days a week worked remotely within the United States on a routine basis.

Benefits/Perks:
Fermilab offers a competitive and comprehensive benefits program, including:
Medical, Dental, Vision and Flexible Spending Accounts
  • Paid time off
  • Life insurance
  • Short and Long-term disability insurance
  • Retirement benefits
  • Onsite day care

Why Fermilab:
Fermilab is America's premier laboratory for particle physics and accelerator research, funded by the U.S. Department of Energy. We support discovery science experiments in Illinois and locations around the world, including deep underground mines in South Dakota and Canada, mountaintops in Arizona and Chile, CERN in Europe and the South Pole.
Pre-Employment Screening:
Drug-Free Workplace & Pre-Employment Screening
Fermilab is dedicated to fostering a safe, productive and drug-free environment. An offer of employment is contingent upon the successful completion of a background check and drug screening.
HSPD-12
In accordance with Homeland Security Presidential Directive 12 (HSPD-12) new employees are required to obtain and maintain a HSPD-12 Personal Identity Verification (PIV) Credential. To obtain this credential, new employees must successfully complete and pass a federal background check investigation. This investigation includes a declaration of illegal drug activities, including use, supply, possession, or manufacture. This includes marijuana and cannabis derivatives, which are still considered illegal under federal law, regardless of state laws. Failure to obtain or maintain such government access authorization could result in the withdrawal of a job offer or future termination of employment.
Foreign Government Sponsored Activities
Fermilab employees, and certain guest researchers and contractors, are subject to particular restrictions related to participation in Foreign Government Sponsored or Affiliated Activities, as defined and detailed in United States Department of Energy Order 486.1A. Such individuals will be asked to disclose any participation for review by Fermilab's Office of General Counsel.
REAL-ID Requirement for access to Fermilab Campus
Fermilab requires all members of the public to produce a REAL-ID, or equivalent, to access the Fermilab Campus for interviews or career events. A list of acceptable forms of ID can be found here: https://get-connected.fnal.gov/wp-content/uploads/2021/09/REALID-Documents.pdf. If a candidate is selected for an interview but does not possess any of the equivalent documents, we may schedule a virtual interview.
Equal Opportunity Statement
Fermilab is an equal opportunity employer. We evaluate qualified applicants without regard to race, color, religion, sex, age, national origin, disability, veteran status, genetic information, and other legally protected categories.

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