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Ic Layout Jobs in Oregon (NOW HIRING)

Biotronik

Staff IC Design Engineer, Analog

Lake Oswego, OR · On-site

$207K/yr

Staff IC Design Engineer, Analog The Staff IC Design Engineer provides advanced technical expertise ... Solid understanding of circuit building blocks and layout techniques for ultra-low-power design ...

Nvidia

OR · Hybrid

This position will collaborate with Technical Package Lead and different design teams in the design and development of sophisticated, detailed layout of IC substrates for NVIDIA products. In addition ...

Intel

Memory Circuit Design Engineer

Hillsboro, OR

Memory bit-cell and complex periphery IC layout and automation. * Memory array/IP design, memory circuit innovation, test-chip design. * Pre-Si verification, post-Si validation and debugging to ...

Analogdevices

Staff PDK Engineer

Beaverton, OR · On-site

... IC design and semiconductor processes. * Prior development experience and demonstrated understanding of CDFs, Callbacks, Layout P-cells, and schematic symbols. * Demonstrated experience in ...

Analog Devices

Staff PDK Engineer

Beaverton, OR · On-site

... IC design and semiconductor processes. * Prior development experience and demonstrated understanding of CDFs, Callbacks, Layout P-cells, and schematic symbols. * Demonstrated experience in ...

Intel

Analog Engineer

Hillsboro, OR · On-site

$220K/yr

... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...

Intel Corporation

Analog Engineer

Hillsboro, OR · On-site

$220K/yr

... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...

Apple

SerDes Circuit Design Engineer

Beaverton, OR · On-site

$210K/yr

... IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization Concepts of timing closure and related industry tools (e.g ...

Apple

SerDes Circuit Design Engineer

Beaverton, OR

... IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization Concepts of timing closure and related industry tools (e.g ...

Intel

ADCE Packaging Design Architect

Hillsboro, OR

$220K - $311K/yr

... layout and routing of the package design. Performs substrate fit and routing studies to establish ... IC digital design. Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary ...

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Ic Layout information

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How much do ic layout jobs pay per hour?

As of Jul 26, 2026, the average hourly pay for ic layout in Oregon is $23.08, according to ZipRecruiter salary data. Most workers in this role earn between $16.54 and $23.37 per hour, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive in the Ic Layout position, and why are they important?

To thrive as an IC Layout professional, you need strong proficiency in analog and digital integrated circuit (IC) layout design, a solid understanding of semiconductor physics, and a degree in electrical engineering or a related field. Expertise with Electronic Design Automation (EDA) tools such as Cadence Virtuoso, Mentor Graphics, or Synopsys is typically required. Attention to detail, effective communication, and the ability to collaborate with circuit design engineers are valuable soft skills. These qualities ensure that layouts are precise, manufacturable, and meet stringent performance and reliability standards in the semiconductor industry.

What are some common challenges faced by IC Layout engineers, and how do they typically overcome them?

IC Layout engineers often encounter challenges such as balancing area constraints with performance requirements, minimizing parasitic effects, and ensuring adherence to complex design rules. These challenges are addressed by leveraging advanced EDA tools, closely collaborating with circuit designers to understand specific needs, and frequently reviewing and updating the layout to align with fabrication requirements. Strong analytical thinking and attention to detail are essential for identifying and solving these issues. By keeping up with evolving technology and continually honing their skills, IC Layout engineers can efficiently deliver robust and high-quality designs.

What is an IC Layout job?

An IC Layout job involves designing the physical layout of integrated circuits (ICs) to ensure they meet electrical, manufacturing, and performance requirements. Layout engineers use specialized software to place and route transistors, resistors, and metal interconnects while following design rules and constraints. They work closely with circuit designers to optimize the layout for power, performance, and area. The role requires knowledge of semiconductor manufacturing processes and layout verification techniques such as DRC (Design Rule Checking) and LVS (Layout vs. Schematic).

What are the most commonly searched types of Ic Layout jobs in Oregon? The most popular types of Ic Layout jobs in Oregon are:
What are popular job titles related to Ic Layout jobs in Oregon? For Ic Layout jobs in Oregon, the most frequently searched job titles are:
What job categories do people searching Ic Layout jobs in Oregon look for? The top searched job categories for Ic Layout jobs in Oregon are:
What cities in Oregon are hiring for Ic Layout jobs? Cities in Oregon with the most Ic Layout job openings:
Ic Layout jobs near you
Infographic showing various Ic Layout job openings in Oregon as of July 2026, with employment types broken down into 87% Full Time, 7% Part Time, 5% Contract, and 1% Nights. Highlights an 92% Physical, 2% Hybrid, and 6% Remote job distribution, with an average salary of $48,003 per year, or $23.1 per hour.

Principal IC Design Engineer, Analog

Biotronik

Lake Oswego, OR • On-site

Full-time

Posted 29 days ago

Job description

Working for Micro Systems Engineering, Inc. (MSEI) means joining an elite team to work on some of the most exciting challenges in medical technology today. We are a pioneer in developing innovative implantable medical device technologies and devices that save and enhance the quality of life for millions of individuals living with cardiovascular and chronic neurologic pain disorders. With more than 40 years of experience in design and manufacturing of active implantable medical devices, our continuing success is based on our company's core values - innovation, quality, reliability, integrity, teamwork, and undisputed expertise - thus enabling us to inspire confidence and trust in physicians and patients worldwide. We are continually looking for talented engineers, scientists, and professionals to share in our mission.
Please join us as:
Principal IC Design Engineer, Analog
Our elite PDX IC Design group is looking for a Principal Analog IC Design Engineer to lead and personally contribute to the innovation, design, and development of ultra-low-power analog and mixed-signal integrated circuits used in life-critical implantable medical devices.
In this role, you will provide technical leadership and hands-on contributions across all phases of product development, from early market and clinical definition through design, release, and long-term maintenance. You will bring broad, cross-disciplinary expertise beyond IC design, working closely with research, manufacturing, quality, testing, and clinical teams to deliver highly reliable silicon that meets stringent medical and regulatory requirements.
Your success will be measured by the on-time delivery of product-specific integrated circuits that address key clinical and business needs while exceeding industry standards for performance, reliability, and quality. Using state-of-the-art CAD and simulation tools, you will design, integrate, and verify complex circuits and systems, influencing architecture decisions and critical design tradeoffs.
You will collaborate directly with system hardware, software, and clinical engineering teams, medical consultants, and IC design, test, and layout engineers across U.S. and international design centers, playing a pivotal role in bringing advanced implantable technologies from concept to production.
PRIMARY RESPONSIBILITIES
  • Design and development of high-performance and high-reliability ultra-low power analog but also mixed signal integrated circuits for implantable medical products.
  • Active involvement in all aspects of IC design, including the development of functional concepts and specifications, top-level design architecture, design partitioning and block level design, detailed circuit design and simulation, layout floor-planning and transistor level layout, bench verification and testing, test-vector development, and documentation.
  • Design of novel, robust, ultra-low power, low-voltage analog/mixed-signal IC functional blocks including but not limited to voltage/current references, operational amplifiers, comparators, switched-capacitor circuits (amplifiers, filters, charge pumps, etc.), ADCs and DACs, oscillators, switching power circuits, communication circuits, etc.
  • Design of ultra-low power digital functional blocks (combinatorial, sequential, synchronous, asynchronous, state machines, etc.) for timing, control, interfacing and signal processing.
  • Create behavioral models for modules and system level verification models for circuits. Perform pre-silicon verification and post-silicon validation of circuits. Collaborate with IC Test group to define production vectors.
  • Consult with physicians, clinical research, published literature, and technology leaders on new and existing technologies, trends, and requirements for their uses.

QUALIFICATIONS AND EXPERIENCE
  • Advanced degree in Electrical Engineering (MS / PhD) with additional background in business principles with demonstrated expertise in fundamental electrical engineering, circuit, and systems principles and closed form analytical approaches.
  • The candidate should be a self-motivated independent thinker able to apply industry research and personal experience to design proposals combined with strong verbal communications skill and strong technical document writing skills.
  • 8+ years of experience in analog/mixed-signal IC design for very low power portable and/or implantable applications, with a strong grasp of the tradeoffs involved in using various analog and digital circuit design techniques (RTL or schematic based) to optimally implement system functions. Preferred: 5+ years implantable medical device industry experience including FDA regulated design controls and product approval process.
  • Deep understanding of CMOS processes, device characteristics and models, transistor level circuit analysis and design concepts and trade-offs: BW, noise, power, feedback analysis, stability etc., worst case process corners, margin and Monte Carlo analysis, and design-for-test. Knowledge of low power flows, including voltage/power domains, power shutoff, retention is desired
  • Solid understanding of circuit building blocks (op-amps, comparators, voltage and current references, DACs, ADCs,) and layout techniques for ultra-low power design to deliver robust, production quality silicon designs. Preferred: Experience with medical domain specific designs such as neuromodulation, charging, low noise biomedical signal measurement and processing, battery energy conversion techniques, and very low power RF communication circuits.
  • Extensive working knowledge and use of Cadence mixed signal Design tools, Virtuoso XL, Spectre, Xcelium/AMS simulators along with Maestro, and other mixed signal signoff tools for analog regression testing. Preferred: Knowledge of scripting/language (perl, shell, tcl, python) along with C/C++, as well Matlab is desirable
  • Experience in lab bench characterization and test-vector generation for pre-silicon and post-silicon verification, design-for-manufacturing test vector generation, production support, fault isolation and failure analysis, and pre-clinical and clinical testing environments.
  • The candidate would demonstrate industry recognition of technical accomplishments in the form of patents and/or published articles. Preferred: Experience with international teams and a working knowledge of German would be highly desirable.

PHYSICAL AND TRAVEL REQUIREMENTS
The physical demands described within the Responsibilities section of this job description are representative of those that must be met by an employee to successfully perform the essential functions of this job. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions.
  • While performing the duties of this job, the employee is regularly required to be independently mobile.
  • The employee is also required to interact with a computer for extended periods of time and communicate with co-workers.
  • Must be able to work a minimum of 40 hours / week.
  • Must be able to travel to other office locations.
  • Must be able to travel internationally and domestically, less than 5% of the time.

Location: Lake Oswego(0001)
Working hours: Full-time
Oregon (US-OR)
Job ID: 62053
Micro Systems Engineering, Inc. is an equal opportunity employer. In accordance with applicable law, the company prohibits discrimination based on race, color, religion, creed, gender, pregnancy or related medical conditions, age, national origin or ancestry, physical or mental disability, sexual orientation, genetic information, uniformed service or any other consideration protected by federal state and local laws. Our commitment to equal opportunity employment applies to all persons involved in our operations and prohibits unlawful discrimination by any employee.

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