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Director Memory Design Engineer Jobs (NOW HIRING)

Memory Design Engineer Location: Ontario, Canada Duration: 6+ Months with possible extension Qualification Required: * Typically requires minimum of 2 to 5 years of experience in Memory Design with ...

Memory Design Engineer

Austin, TX · Hybrid

$130K - $176K/yr

Contribute in all parts of the memory development flow, starting at design specification, circuit ... Master's in Electrical Engineering, Computer Engineering, or other relevant technical fields with ...

Memory Design Engineer

Austin, TX · On-site

$130K - $176K/yr

Contribute in all parts of the memory development flow, starting at design specification, circuit ... Master's in Electrical Engineering, Computer Engineering, or other relevant technical fields with ...

Memory Design Engineer

Austin, TX · On-site

$130K - $176K/yr

Contribute in all parts of the memory development flow, starting at design specification, circuit ... Master's in Electrical Engineering, Computer Engineering, or other relevant technical fields with ...

About the Role • • • • • 's CPU Circuit Technology team is seeking a highly motivated CPU Memory Design Engineer to help develop the next generation of high-performance, power-efficient ...

About the Role Intel's CPU Circuit Technology team is seeking a highly motivated CPU Memory Design Engineer to help develop the next generation of high-performance, power-efficient processors. In ...

About the Role • • • • • 's CPU Circuit Technology team is seeking a highly motivated CPU Memory Design Engineer to help develop the next generation of high-performance, power-efficient ...

Memory Design Engineer, HBM

Richardson, TX · On-site

$183K/yr

The Memory Design Engineer develops and optimizes digital and analog circuits for advanced DRAM products. This role focuses on circuit design, simulation, validation, and multi-functional ...

As a Design Engineer at Micron Technology, Inc., you will be responsible for designing and analyzing digital and analog circuits used in the development of memory products. We are engaged in ...

Job Summary As a Design Engineer at Micron Technology, Inc., you will be responsible for designing ... You will provide high‑quality, efficient, and reliable memory solutions that optimize ...

... Memory Circuit Design Engineer to drive the design and development of advanced memory circuits for ... This is an opportunity to make a direct impact, grow your technical expertise, and help deliver ...

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How much do director memory design engineer jobs pay per year?

As of Sep 12, 2026, the average yearly pay for director memory design engineer in the United States is $135,763.00, according to ZipRecruiter salary data. Most workers in this role earn between $109,500.00 and $163,000.00 per year, depending on experience, location, and employer.
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Infographic showing various Director Memory Design Engineer job openings in the United States as of September 2026, with employment types broken down into 1% Internship, 87% Full Time, 9% Part Time, and 3% Contract. Highlights an 81% Physical, 4% Hybrid, and 15% Remote job distribution, with an average salary of $135,763 per year, or $65.3 per hour.

Memory Design Engineer

Troy, MI • On-site

Resource Point LLC
IT Services • 51 - 200 employees

Contractor

Re-posted 21 days ago


Job description

Looking for W-2 CANDIDATES ONLY who are authorized to work in the United States without the need for sponsorship. H-1B Transfers AND CORP-TO-CORP Candidates WILL NOT BE CONSIDERED for this position

Job Title: Memory Design Engineer

Location: Ontario, Canada

Duration: 6+ Months with possible extension

Qualification Required:

  • Typically requires minimum of 2 to 5  years of experience in Memory Design with mainstream SRAM tools
  • Bachelors / Master Degree in E&E and E&C

Roles and Responsibilities:

  • Good understanding of SRAM architecture, Critical Path Modelling, Full Cut Analysis and Monte Carlo Simulations.
  • Exposure to full embedded memory design flow: Architecture, circuit design, physical implementation, compiler automation, characterization, timing and model generation.
  • Good experience in design verification: Sense amplifier analysis, self-time analysis and marginality analysis.
  • Good exposure to validation of the characterized data.
  • Strong knowledge of physical implementation impact on circuit performance.
  • Experience with the most advanced technology nodes up to 28nm and below.