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Sram Memory Design Engineer Jobs (NOW HIRING)

Good understanding of SRAM architecture, Critical Path Modelling, Full Cut Analysis and Monte Carlo Simulations. * Exposure to full embedded memory design flow: Architecture, circuit design, physical ...

Memory Design Engineer

Austin, TX · On-site

$150 - $200/hr

... design or Bachelors degree in Electrical Engineering or Computer Engineering with relevant work ... An understanding of basic memory principles, especially for SRAM. * A good understanding of ...

Memory Design Engineer

Austin, TX · On-site

$130K - $176K/yr

... design or Bachelors degree in Electrical Engineering or Computer Engineering with relevant work ... An understanding of basic memory principles, especially for SRAM. * A good understanding of ...

Memory Design Engineer

Austin, TX · Hybrid

$130K - $176K/yr

... design or Bachelors degree in Electrical Engineering or Computer Engineering with relevant work ... An understanding of basic memory principles, especially for SRAM. * A good understanding of ...

Drive the hands-on circuit design of cutting-edge SRAM, DRAM, and Non-Volatile Memory (NVM ... D. in Electrical Engineering, Computer Engineering, or a related field with 3+ years of industry ...

Drive the hands-on circuit design of cutting-edge SRAM, DRAM, and Non-Volatile Memory (NVM ... D. in Electrical Engineering, Computer Engineering, or a related field with 3+ years of industry ...

DRAM Design Engineer

Boise, ID · On-site

$80 - $100/hr

Exposure to memory design (DRAM, NAND, SRAM) or high‑speed circuit design * Experience with layout tools and physical design methodologies * Knowledge of scripting or programming (e.g., Python, TCL ...

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Sram Memory Design Engineer information

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How much do sram memory design engineer jobs pay per hour?

As of Sep 9, 2026, the average hourly pay for sram memory design engineer in the United States is $49.97, according to ZipRecruiter salary data. Most workers in this role earn between $40.87 and $57.21 per hour, depending on experience, location, and employer.

What does an SRAM Memory Design Engineer do?

An SRAM Memory Design Engineer is responsible for designing, developing, and optimizing Static Random-Access Memory (SRAM) circuits used in various electronic devices. Their work includes creating circuit schematics, performing simulations, verifying design functionality, and ensuring the memory meets performance, power, and area requirements. They collaborate with other engineers to integrate the memory into larger systems and address issues related to fabrication, reliability, and testing. Their expertise helps ensure efficient and reliable data storage within chips such as microprocessors and ASICs.

What are the key skills and qualifications needed to thrive as an SRAM Memory Design Engineer?

To thrive as an SRAM Memory Design Engineer, you need a solid background in electrical engineering, CMOS circuit design, and semiconductor physics, typically supported by a relevant degree. Familiarity with EDA tools like Cadence or Synopsys, experience with SPICE simulations, and knowledge of industry standards are essential. Strong problem-solving skills, attention to detail, and effective teamwork set standout candidates apart. These competencies ensure the development of efficient, reliable SRAM designs that meet performance and yield targets in advanced semiconductor processes.

What are some common challenges faced by SRAM Memory Design Engineers during the development cycle?

SRAM Memory Design Engineers often encounter challenges such as meeting stringent power, performance, and area (PPA) targets while ensuring robust functionality and yield. Debugging issues related to variability in process technology, minimizing leakage and access times, and ensuring compatibility with different voltage domains are frequent hurdles. Additionally, collaborating effectively with verification, layout, and system integration teams is essential to address interface issues and achieve a successful tape-out. Staying up-to-date with the latest EDA tools and design methodologies can also be demanding but is crucial for long-term success.

What is the difference between Sram Memory Design Engineer vs DRAM Memory Design Engineer?

AspectSram Memory Design EngineerDRAM Memory Design Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering or Computer EngineeringBachelor's or Master's in Electrical Engineering or Computer Engineering
Work EnvironmentSemiconductor companies, chip design labsSemiconductor companies, chip design labs
Industry UsageCache memory, embedded systemsMain memory modules, high-density storage

Both roles require similar educational backgrounds and work environments, focusing on designing different types of memory. Sram Memory Design Engineers specialize in static RAM used for fast cache memory, while DRAM Memory Design Engineers focus on dynamic RAM used for main system memory. The key difference lies in the memory type and application, but both roles involve circuit design, simulation, and verification within semiconductor industries.

What cities are hiring for Sram Memory Design Engineer jobs?

Cities with the most Sram Memory Design Engineer job openings:

What states have the most Sram Memory Design Engineer jobs?

States with the most job openings for Sram Memory Design Engineer jobs include:

What are popular job titles related to Sram Memory Design Engineer jobs?

For Sram Memory Design Engineer jobs, the most frequently searched job titles are:

Infographic showing various Sram Memory Design Engineer job openings in the United States as of June 2026, with employment types broken down into 1% As Needed, 57% Full Time, 17% Part Time, 24% Contract, and 1% Nights. Highlights an 95% Physical, 1% Hybrid, and 4% Remote job distribution, with an average salary of $103,934 per year, or $50 per hour.

SRAM/ROM Circuit Design Engineer

Austin, TX • On-site

Full-time

Posted 28 days ago


Job description

NXP's Austin Memories team is seeking an experienced memory circuit design engineer for our SRAM and ROM internal memory compiler designs.
Our team is part of the Design Enablement/Foundation IP organization within the Chief Technology Office at NXP. We provide differentiating SRAM/ROM memory compiler solutions to NXP SoC design teams across multiple business lines- your work will have real impact for our design teams and, through them, our end products and end customers.
Job Summary:
  • Implement design of CMOS memory circuits to meet memory compiler performance, power, and area requirements, including periphery circuits to support functional safety and scan functionality.
  • Generate, execute, and evaluate simulation characterization measurements and simulation test benches, and compare vs. performance targets/benchmarks.
  • Engage with layout teams on implementation of compiler leaf cells based on designs to improve area and performance.
  • Work closely with CAD teams on implementation of new designs into our characterization, verification, and regression flows.
  • Align with modeling/verification team to ensure consistency of designs with frontend models (behavioral/ATPG/emulation).
  • Collaborate effectively across global memory teams to help ensure common methodologies and best practices.
  • Leverage internally supported LLM/GenAI tools and EDA vendor GenAI solutions to implement efficiencies in design methodologies.

Job Qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, or related discipline. (Master's degree is preferred).
  • 8+ years of industry experience (6+ with Master's degree) in SRAM memory circuit design, including some design experience with advanced CMOS foundry technologies at 5nm and beyond.
  • Strong familiarity with Cadence Virtuoso and other industry-standard EDA tools.
  • Familiarity with automotive design rules and memory design requirements is a plus.
  • Good knowledge of scripting languages such as Perl, tcl, or Python is a must.
  • Creative mindset, with strong analytical and problem-solving skills.

Job location:
  • The position will be based at the NXP offices in Austin, Texas. Team members are expected to work in office at least 3 days/week.

More information about NXP in the United States...
NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.
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