Exposure to complete design cycle of SRAM memory and compiler development * Supervise layout engineers and review layout for optimality * Have the ability to come up with comprehensive design ...
Exposure to complete design cycle of SRAM memory and compiler development * Supervise layout engineers and review layout for optimality * Have the ability to come up with comprehensive design ...
SRAM Design Engineer (7820)
San Jose, CA · On-site
Drive the hands-on circuit design of cutting-edge SRAM, DRAM, and Non-Volatile Memory (NVM ... D. in Electrical Engineering, Computer Engineering, or a related field with 3+ years of industry ...
SRAM Design Engineer (7820)
San Jose, CA · On-site
Drive the hands-on circuit design of cutting-edge SRAM, DRAM, and Non-Volatile Memory (NVM ... D. in Electrical Engineering, Computer Engineering, or a related field with 3+ years of industry ...
SRAM Design Engineer (7820)
San Jose, CA · On-site
Drive the hands-on circuit design of cutting-edge SRAM, DRAM, and Non-Volatile Memory (NVM ... D. in Electrical Engineering, Computer Engineering, or a related field with 3+ years of industry ...
SRAM Design Engineer (7820)
San Jose, CA · On-site
Drive the hands-on circuit design of cutting-edge SRAM, DRAM, and Non-Volatile Memory (NVM ... D. in Electrical Engineering, Computer Engineering, or a related field with 3+ years of industry ...
Drive the hands-on circuit design of cutting-edge SRAM, DRAM, and Non-Volatile Memory (NVM ... D. in Electrical Engineering, Computer Engineering, or a related field with 3+ years of industry ...
Drive the hands-on circuit design of cutting-edge SRAM, DRAM, and Non-Volatile Memory (NVM ... D. in Electrical Engineering, Computer Engineering, or a related field with 3+ years of industry ...
Design and develop SRAM memory arrays, including bit cells, sense amplifiers, decoders and control ... Mentor Junior engineers, providing guidance on SRAM design techniques and best practices. * Perform ...
Quick apply
Design and develop SRAM memory arrays, including bit cells, sense amplifiers, decoders and control ... Mentor Junior engineers, providing guidance on SRAM design techniques and best practices. * Perform ...
Design and develop SRAM memory arrays, including bit cells, sense amplifiers, decoders and control ... Mentor Junior engineers, providing guidance on SRAM design techniques and best practices. * Perform ...
Design and develop SRAM memory arrays, including bit cells, sense amplifiers, decoders and control ... Mentor Junior engineers, providing guidance on SRAM design techniques and best practices. * Perform ...
Senior SRAM Engineer
Santa Clara, CA · On-site
We are now looking for a Senior SRAM Engineer within our Full Custom Memory (FCM) team. The FCM ... memory design techniques and macro/block development Ways to stand out from the crowd: Self ...
Senior SRAM Engineer
Santa Clara, CA · On-site
We are now looking for a Senior SRAM Engineer within our Full Custom Memory (FCM) team. The FCM ... memory design techniques and macro/block development Ways to stand out from the crowd: Self ...
MS or PhD in Electrical Engineering with emphasis on CMOS memory, digital or mixed-signal design ... SRAM, DRAM, Flash or emerging NVM technologies * Strong understanding of layout design including ...
MS or PhD in Electrical Engineering with emphasis on CMOS memory, digital or mixed-signal design ... SRAM, DRAM, Flash or emerging NVM technologies * Strong understanding of layout design including ...
MS or PhD in Electrical Engineering with emphasis on CMOS memory, digital or mixed-signal design ... SRAM, DRAM, Flash or emerging NVM technologies * Strong understanding of layout design including ...
MS or PhD in Electrical Engineering with emphasis on CMOS memory, digital or mixed-signal design ... SRAM, DRAM, Flash or emerging NVM technologies * Strong understanding of layout design including ...
Senior SRAM Engineer
Santa Clara, CA · On-site
Strong understanding of SRAM and memory design techniques and macro/block development Ways to stand out from the crowd: * Self-motivation, attention to detail, clear data analysis and presentation ...
Senior SRAM Engineer
Santa Clara, CA · On-site
Strong understanding of SRAM and memory design techniques and macro/block development Ways to stand out from the crowd: * Self-motivation, attention to detail, clear data analysis and presentation ...
Senior SRAM Engineer
Santa Clara, CA · On-site
Strong understanding of SRAM and memory design techniques and macro/block development Ways to stand out from the crowd: * Self-motivation, attention to detail, clear data analysis and presentation ...
Senior SRAM Engineer
Santa Clara, CA · On-site
Strong understanding of SRAM and memory design techniques and macro/block development Ways to stand out from the crowd: * Self-motivation, attention to detail, clear data analysis and presentation ...
TD Memory Quality and Reliability Engineer
Santa Clara, CA · On-site
$84K - $109K/yr
The Memory Quality and Reliability team partners with Design, Device Engineering, Product Development Engineering, and Yield organizations to develop, characterize and certify SRAM, Register File (RF ...
TD Memory Quality and Reliability Engineer
Santa Clara, CA · On-site
$84K - $109K/yr
The Memory Quality and Reliability team partners with Design, Device Engineering, Product Development Engineering, and Yield organizations to develop, characterize and certify SRAM, Register File (RF ...
TD Memory Quality and Reliability Engineer
Folsom, CA · On-site
$77K - $99K/yr
The Memory Quality and Reliability team partners with Design, Device Engineering, Product Development Engineering, and Yield organizations to develop, characterize and certify SRAM, Register File (RF ...
TD Memory Quality and Reliability Engineer
Folsom, CA · On-site
$77K - $99K/yr
The Memory Quality and Reliability team partners with Design, Device Engineering, Product Development Engineering, and Yield organizations to develop, characterize and certify SRAM, Register File (RF ...
TD Memory Quality and Reliability Engineer
Folsom, CA · On-site
$77K - $99K/yr
The Memory Quality and Reliability team partners with Design, Device Engineering, Product Development Engineering, and Yield organizations to develop, characterize and certify SRAM, Register File (RF ...
TD Memory Quality and Reliability Engineer
Folsom, CA · On-site
$77K - $99K/yr
The Memory Quality and Reliability team partners with Design, Device Engineering, Product Development Engineering, and Yield organizations to develop, characterize and certify SRAM, Register File (RF ...
TD Memory Quality and Reliability Engineer
Folsom, CA · On-site
$109K - $137K/yr
The Memory Quality and Reliability team partners with Design, Device Engineering, Product Development Engineering, and Yield organizations to develop, characterize and certify SRAM, Register File (RF ...
TD Memory Quality and Reliability Engineer
Folsom, CA · On-site
$109K - $137K/yr
The Memory Quality and Reliability team partners with Design, Device Engineering, Product Development Engineering, and Yield organizations to develop, characterize and certify SRAM, Register File (RF ...
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Staff Memory Circuit Design Engineer
Irvine, CA · On-site
$108K - $172K/yr
Staff Memory Circuit Design Engineer We are looking for energetic and passionate memory design engineers to join our Central Engineering Group and be part of an elite memory team responsible for the ...
Staff Memory Circuit Design Engineer
Irvine, CA · On-site
$108K - $172K/yr
Staff Memory Circuit Design Engineer We are looking for energetic and passionate memory design engineers to join our Central Engineering Group and be part of an elite memory team responsible for the ...
Staff Memory Circuit Design Engineer
Irvine, CA · On-site
$108K - $172K/yr
Staff Memory Circuit Design Engineer We are looking for energetic and passionate memory design engineers to join our Central Engineering Group and be part of an elite memory team responsible for the ...
Staff Memory Circuit Design Engineer
Irvine, CA · On-site
$108K - $172K/yr
Staff Memory Circuit Design Engineer We are looking for energetic and passionate memory design engineers to join our Central Engineering Group and be part of an elite memory team responsible for the ...
Staff Memory Circuit Design Engineer
Irvine, CA · On-site
$108K - $172K/yr
Staff Memory Circuit Design Engineer We are looking for energetic and passionate memory design engineers to join our Central Engineering Group and be part of an elite memory team responsible for the ...
Staff Memory Circuit Design Engineer
Irvine, CA · On-site
$108K - $172K/yr
Staff Memory Circuit Design Engineer We are looking for energetic and passionate memory design engineers to join our Central Engineering Group and be part of an elite memory team responsible for the ...
Associate Design Engineer
San Luis Obispo, CA · On-site
$71K - $80K/yr
As an Associate Design Engineer, you'll work on front drivetrain components used by elite cyclists ... At SRAM, we believe in expanding the potential of cycling, and that starts with you. KEY ...
Associate Design Engineer
San Luis Obispo, CA · On-site
$71K - $80K/yr
As an Associate Design Engineer, you'll work on front drivetrain components used by elite cyclists ... At SRAM, we believe in expanding the potential of cycling, and that starts with you. KEY ...
Sram Memory Design Engineer information
What does an SRAM Memory Design Engineer do?
An SRAM Memory Design Engineer is responsible for designing, developing, and optimizing Static Random-Access Memory (SRAM) circuits used in various electronic devices. Their work includes creating circuit schematics, performing simulations, verifying design functionality, and ensuring the memory meets performance, power, and area requirements. They collaborate with other engineers to integrate the memory into larger systems and address issues related to fabrication, reliability, and testing. Their expertise helps ensure efficient and reliable data storage within chips such as microprocessors and ASICs.
What are the key skills and qualifications needed to thrive as an SRAM Memory Design Engineer?
To thrive as an SRAM Memory Design Engineer, you need a solid background in electrical engineering, CMOS circuit design, and semiconductor physics, typically supported by a relevant degree. Familiarity with EDA tools like Cadence or Synopsys, experience with SPICE simulations, and knowledge of industry standards are essential. Strong problem-solving skills, attention to detail, and effective teamwork set standout candidates apart. These competencies ensure the development of efficient, reliable SRAM designs that meet performance and yield targets in advanced semiconductor processes.
What are some common challenges faced by SRAM Memory Design Engineers during the development cycle?
SRAM Memory Design Engineers often encounter challenges such as meeting stringent power, performance, and area (PPA) targets while ensuring robust functionality and yield. Debugging issues related to variability in process technology, minimizing leakage and access times, and ensuring compatibility with different voltage domains are frequent hurdles. Additionally, collaborating effectively with verification, layout, and system integration teams is essential to address interface issues and achieve a successful tape-out. Staying up-to-date with the latest EDA tools and design methodologies can also be demanding but is crucial for long-term success.
What is the difference between Sram Memory Design Engineer vs DRAM Memory Design Engineer?
| Aspect | Sram Memory Design Engineer | DRAM Memory Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's or Master's in Electrical Engineering or Computer Engineering | Bachelor's or Master's in Electrical Engineering or Computer Engineering |
| Work Environment | Semiconductor companies, chip design labs | Semiconductor companies, chip design labs |
| Industry Usage | Cache memory, embedded systems | Main memory modules, high-density storage |
Both roles require similar educational backgrounds and work environments, focusing on designing different types of memory. Sram Memory Design Engineers specialize in static RAM used for fast cache memory, while DRAM Memory Design Engineers focus on dynamic RAM used for main system memory. The key difference lies in the memory type and application, but both roles involve circuit design, simulation, and verification within semiconductor industries.
What cities in California are hiring for Sram Memory Design Engineer jobs?
Cities in California with the most Sram Memory Design Engineer job openings:
Senior Staff Engineer/Principal Memory Design Engineer (San Jose)
San Jose, CA • On-site
MediaTek
Full-time
Medical, Life, Retirement, PTO
This job post has expired today. Applications are no longer accepted.
Key responsibilities
Collaborate with tier-1 ASIC customers in North America to co-design embedded memory architectures and circuits.
Define, design, and develop high performance customized semiconductor memories including SRAM, TCAM, CPU caches, and CIM macros.
Design dual rail custom memories from start to finish to meet customer PPA specifications.
Job description
Senior Staff Engineer/Principal Memory Design EngineerSenior Staff Engineer/Principal Memory Design Engineer
3 weeks ago Be among the first 25 applicants
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MediaTek’s advanced Memory Design team in San Jose is looking for a senior memory design engineer to define and architect memory circuits for high performance compute ASICs targeting Cloud AI, Data Center Networking, Automotive and other Enterprise ASIC applications as well as edge AI Machine Learning (ML) Accelerator SoCs
Responsibilities
- Primary job responsibilities include close collaboration with tier-1 ASIC customers in North America to co-design embedded memory architectures and circuits in advanced nodes
- Collaborate closely with product and architecture teams to define, design, and develop high performance customized semiconductor memories including SRAM, TCAM, CPU caches and Compute-In-Memory (CIM) macros with varied PPA requirements spanning across Cloud AI, Networking, Automotive and edge AI applications
- Design dual rail custom memories from start to finish to meet customer PPA spec
- Innovate, design, and incorporate special circuits and features to achieve best-in-class PPA for custom and compiler memories
- Mentor, guide, and direct other designers, while being hands-on in digital circuit design, especially targeting memories
- Highly organized and independent design engineer who can multi-task and closely collaborate with worldwide design and CAD teams
Qualifications
- 12+ years of hands-on experience in design of embedded memories (SRAM, TCAM) for high performance processors or ASICs in advanced nodes (3nm/5nm)
- Strong track record of offering innovative solutions (papers, patents), good understanding of technology roadmap and market for embedded memories
- Strong understanding of Digital Circuit design techniques in FinFET technologies
- Exposure to complete design cycle of SRAM memory and compiler development
- Supervise layout engineers and review layout for optimality
- Have the ability to come up with comprehensive design verification plans, silicon bring-up plans for high-performance embedded memories
- Experience with LEC tools (ESPCV)
- Ability to review and coordinate layout activities
- Silicon debug and bring up experience is required
- Working knowledge of scripting in Perl/Python
- Willingness to collaborate closely with cross functional teams across the globe
Salary range: $180,000 - $260,000
Employee may be eligible for performance bonus, short and long term incentive programs. Actual total compensation will be dependent upon the individual's skills, experience and qualifications. In addition, MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, Company paid holidays, Paid time off (PTO), Parental leave, 401K and more.
MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.
Seniority level- Seniority levelMid-Senior level
- Employment typeFull-time
- IndustriesSemiconductor Manufacturing
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