1

Dft Jobs in Arizona (NOW HIRING)

We are 500+ employees in India and 250+ In US Clear visibility to senior management which helps for constant professional growth Need knowledge of design for test (DFT) structures such as scan chains ...

Senior DfT Engineer

Chandler, AZ · On-site

$120 - $160/hr

## Senior DfT EngineerApplylocations: Chandler (Office)time type: Full timeposted on: Posted Todayjob requisition id: R-10064841As a DfT engineer, you will join a highly experienced team. Your key ...

DFT Application Engineer

Phoenix, AZ · On-site

  • Medical

  • Retirement

  • PTO

Position Overview We seek a DFT Application Engineer to provide technical support to Intel Foundry Services customers on PDKs, DFT/DFM insertion, and ATPG validation methodologies. This critical role ...

DFT Application Engineer

Phoenix, AZ · On-site

  • Medical

  • Retirement

  • PTO

Position Overview We seek a DFT Application Engineer to provide technical support to Intel Foundry Services customers on PDKs, DFT/DFM insertion, and ATPG validation methodologies. This critical role ...

As a DfT engineer, you will join a highly experienced team. Your key responsibilities will be: 1) Closely collaborate with Product Definer, Analog Design Lead, Digital Design Lead, Test Lead, Product ...

As a DFT engineer in our mixed signal audio development team, you will be performing initial test planning, inserting memory BIST and scan, improving coverage, and delivering test patterns to our ...

Be Seen First

Industrial Painters

Eloy, AZ · On-site

$22 - $26/hr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

... DFT) range, using proper overlapping spray technique, gun speed, and gun-to-part distance to ensure consistent film build across all surfaces including recesses, edges, and complex geometries. • ...

Principal Digital Design Engineer

Chandler, AZ · On-site +1

$200K - $250K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

Work closely with verification, physical design, DFT, and firmware teams * Align design decisions with verification plans and implementation Constraints * Act as the technical bridge between ...

Board Design Engineer

Tucson, AZ · On-site

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Apply Design for Manufacturability (DFM) and Design for Test (DFT) best practices throughout development. * Partner with PCB fabrication vendors and contract manufacturers to improve ...

Board Design Engineer

Tucson, AZ · Hybrid

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Apply Design for Manufacturability (DFM) and Design for Test (DFT) best practices throughout development. * Partner with PCB fabrication vendors and contract manufacturers to improve ...

next page

Showing results 1-20

Dft information

See Arizona salary details

$64.8K

$72.8K

$79.2K

How much do dft jobs pay per year?

As of Aug 17, 2026, the average yearly pay for dft in Arizona is $72,780.00, according to ZipRecruiter salary data. Most workers in this role earn between $69,000.00 and $76,400.00 per year, depending on experience, location, and employer.

What is a DFT engineer?

DFT engineers, or Design for Test engineers, are professionals in the semiconductor industry who specialize in designing and implementing testability features in integrated circuits (ICs) and systems-on-chip (SoCs). Their primary role is to ensure that chips can be efficiently and effectively tested for manufacturing defects after fabrication. This involves adding test structures, developing test methodologies, and working closely with design and verification teams to optimize test coverage and reduce the cost of testing. DFT engineers play a critical role in improving product quality and yield in chip manufacturing.

What are the key skills and qualifications needed to thrive as a Design for Test (DFT) engineer?

To thrive as a Design for Test (DFT) Engineer, you need a solid background in digital design, VLSI concepts, and experience with ASIC/FPGA design, typically supported by a degree in electrical or computer engineering. Proficiency with EDA tools such as Synopsys DFT Compiler, Mentor Tessent, and scripting languages like TCL or Python is essential, along with knowledge of test methodologies like scan insertion and ATPG. Strong problem-solving abilities, attention to detail, and effective communication skills help in debugging complex issues and collaborating across teams. These skills are vital for ensuring high-quality, testable hardware designs that meet production and reliability standards.

What are some common challenges faced by DFT engineers when collaborating with design and verification teams?

DFT engineers often encounter challenges ensuring their test structures integrate seamlessly with the main design and verification flows. Balancing test coverage with minimal impact on design performance requires ongoing communication and compromise. Additionally, DFT engineers must frequently align on methodologies and resolve conflicts between testability requirements and design constraints, making cross-functional teamwork essential for success.

What is the difference between Dft vs Draftsman?

AspectDftDraftsman
Required CredentialsTypically requires a diploma or certification in drafting or engineeringOften requires a diploma or technical training in drafting or architecture
Work EnvironmentWorks in engineering, construction, or manufacturing settingsWorks mainly in architectural or engineering offices
Industry UsageCommonly used in engineering, manufacturing, and construction industriesPrimarily used in architecture and civil engineering sectors
Job FocusDesigning and creating technical drawings for engineering projectsPreparing detailed architectural or structural drawings

In summary, Dft and Draftsman roles share similar skills and work environments, often requiring technical diplomas. Dft typically refers to a broader engineering drafting role, while Draftsman is more focused on architectural drawings. Both are essential in their respective industries for translating concepts into technical plans.

Is DFT a good career?

A DFT (Design for Test) engineer specializes in developing testing methods for electronic circuits and systems, often requiring knowledge of digital and analog testing techniques, CAD tools, and industry standards. It can be a stable career with opportunities in electronics manufacturing, semiconductor, and technology companies, especially for those with strong technical skills and certifications. The role typically involves problem-solving, attention to detail, and staying current with testing technologies.

Is DFT a good place to work?

DFT, as a job title, typically refers to a role such as a Design for Test engineer or a similar technical position. The work environment and job satisfaction depend on the company, industry, and specific role, but these positions often require technical skills and attention to detail. Overall, the suitability of DFT as a workplace varies based on individual preferences and organizational culture.

What are the most commonly searched types of Dft jobs in Arizona?

The most popular types of Dft jobs in Arizona are:

What cities in Arizona are hiring for Dft jobs?

Cities in Arizona with the most Dft job openings:

Infographic showing various Dft job openings in Arizona as of August 2026, with employment types broken down into 93% Full Time, 2% Part Time, 2% Temporary, 2% Contract, and 1% Nights. Highlights an 92% Physical, 5% Hybrid, and 3% Remote job distribution, with an average salary of $72,780 per year, or $35 per hour.

Full-time

Re-posted 6 days ago


Job description

Company Description

About Mirafra :
Mirafra is software service base organization started in 2004.

       We are 500+ employees in India and 250+ In US
     Clear visibility to senior management which helps for constant professional growth

Job Description

Need knowledge of design for test (DFT) structures such as scan chains,
scan compression and verification concepts for test coverage (ATPG). Be
able to generate ATPG and analyze coverage results and how to extend or
optimize them. Need to know how to run gate simulation for to verify scan
patterns to demonstrate functionality.
Min Qualifications:
5 years experience in DFT in ASICs

Qualifications

10 years experience in DFT for large scale ASICs. Experience with Mentor
Graphics DFT tools.

Additional Information

All your information will be kept confidential according to EEO guidelines.