Analog Engineer
$200K/yr
As an Analog Circuit Design Engineer, you will be at the forefront of designing and developing ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...
$200K/yr
As an Analog Circuit Design Engineer, you will be at the forefront of designing and developing ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...
$200K/yr
As an Analog Circuit Design Engineer, you will be at the forefront of designing and developing ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...
$97K - $134K/yr
Understanding of layout techniques in digital, analog, and/or RF designs * Highend package design ... Ability to support electrical engineers with netlisting and componentselection tasks * Experience ...
$97K - $134K/yr
Understanding of layout techniques in digital, analog, and/or RF designs * Highend package design ... Ability to support electrical engineers with netlisting and componentselection tasks * Experience ...
Phoenix, AZ · On-site
$97K - $134K/yr
Understanding of layout techniques in digital, analog, and/or RF designs * Highend package design ... Ability to support electrical engineers with netlisting and componentselection tasks * Experience ...
Phoenix, AZ · On-site
$97K - $134K/yr
Understanding of layout techniques in digital, analog, and/or RF designs * Highend package design ... Ability to support electrical engineers with netlisting and componentselection tasks * Experience ...
Phoenix, AZ · On-site
$97K - $134K/yr
Understanding of layout techniques in digital, analog, and/or RF designs * High-end package design ... Ability to support electrical engineers with netlisting and component-selection tasks * Experience ...
Phoenix, AZ · On-site
$97K - $134K/yr
Understanding of layout techniques in digital, analog, and/or RF designs * High-end package design ... Ability to support electrical engineers with netlisting and component-selection tasks * Experience ...
Principal PCB Substrate Layout Engineer (Remote or Hybrid opportunities are available, as well as ... This includes power, digital, analog, and RF signals across multiple die (primarily flip-chip) • ...
Principal PCB Substrate Layout Engineer (Remote or Hybrid opportunities are available, as well as ... This includes power, digital, analog, and RF signals across multiple die (primarily flip-chip) • ...
Phoenix, AZ · On-site
$110 - $115/hr
This includes power, digital, analog, and RF signals across multiple die (primarily flip-chip) • ... and layout. Schematic support to the Electrical Engineering community. • Work on problems of ...
Phoenix, AZ · On-site
$110 - $115/hr
This includes power, digital, analog, and RF signals across multiple die (primarily flip-chip) • ... and layout. Schematic support to the Electrical Engineering community. • Work on problems of ...
Phoenix, AZ · On-site
$200K/yr
The position also involves providing guidance to layout engineers and mentoring junior analog designers as needed. Strong problem-solving skills, teamwork, and a willingness to share knowledge and ...
Phoenix, AZ · On-site
$200K/yr
The position also involves providing guidance to layout engineers and mentoring junior analog designers as needed. Strong problem-solving skills, teamwork, and a willingness to share knowledge and ...
Create and optimize layouts working closely with layout engineers. Perform circuit analysis ... Technical Leadership Lead analog design projects from specification to silicon validation. Mentor ...
Create and optimize layouts working closely with layout engineers. Perform circuit analysis ... Technical Leadership Lead analog design projects from specification to silicon validation. Mentor ...
Principal PCB & Substrate Layout Engineer Pay Rate: $98/hr. Location: Phoenix, AZ Zip Code: 85034 ... This includes power, digital, analog, and RF signals across multiple die (primarily flip-chip)
Quick apply
Principal PCB & Substrate Layout Engineer Pay Rate: $98/hr. Location: Phoenix, AZ Zip Code: 85034 ... This includes power, digital, analog, and RF signals across multiple die (primarily flip-chip)
Education: (Engineering/Technology/Technical School) with 10+ years' experience in custom analog CMOS layout design * Experience with Cadence, Pegasus and Calibre EDA tools * Knowledge of Advanced ...
Education: (Engineering/Technology/Technical School) with 10+ years' experience in custom analog CMOS layout design * Experience with Cadence, Pegasus and Calibre EDA tools * Knowledge of Advanced ...
Chandler, AZ · On-site
Education: (Engineering/Technology/Technical School) with 10+ years' experience in custom analog CMOS layout design * Experience with Cadence, Pegasus and Calibre EDA tools * Knowledge of Advanced ...
Chandler, AZ · On-site
Education: (Engineering/Technology/Technical School) with 10+ years' experience in custom analog CMOS layout design * Experience with Cadence, Pegasus and Calibre EDA tools * Knowledge of Advanced ...
Chandler, AZ · On-site
$114K - $157K/yr
About Analog Devices Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that ... Work with layout engineers to review physical design layouts and make recommendations to ...
Chandler, AZ · On-site
$114K - $157K/yr
About Analog Devices Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that ... Work with layout engineers to review physical design layouts and make recommendations to ...
$114K - $157K/yr
About Analog Devices Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that ... Work with layout engineers to review physical design layouts and make recommendations to ...
$114K - $157K/yr
About Analog Devices Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that ... Work with layout engineers to review physical design layouts and make recommendations to ...
Chandler, AZ · On-site
$198K/yr
Design and verify CMOS analog circuits for custom mixed-signal ASICs, including amplifiers ... Work closely with Layout Engineering to guide physical implementation and ensure layout quality for ...
Chandler, AZ · On-site
$198K/yr
Design and verify CMOS analog circuits for custom mixed-signal ASICs, including amplifiers ... Work closely with Layout Engineering to guide physical implementation and ensure layout quality for ...
Design and verify CMOS analog circuits for custom mixed-signal ASICs, including amplifiers ... Work closely with Layout Engineering to guide physical implementation and ensure layout quality for ...
Quick apply
Design and verify CMOS analog circuits for custom mixed-signal ASICs, including amplifiers ... Work closely with Layout Engineering to guide physical implementation and ensure layout quality for ...
Chandler, AZ · On-site
$198K/yr
Design and verify CMOS analog circuits for custom mixed-signal ASICs, including amplifiers ... Work closely with Layout Engineering to guide physical implementation and ensure layout quality for ...
Chandler, AZ · On-site
$198K/yr
Design and verify CMOS analog circuits for custom mixed-signal ASICs, including amplifiers ... Work closely with Layout Engineering to guide physical implementation and ensure layout quality for ...
Chandler, AZ · On-site
$198K/yr
Analog Design Engineer Job Responsibility: * Design high-performance analog and mixed-signal ... Collaborate with layout engineers to ensure optimal device placement, matching, EM/IR compliance ...
Chandler, AZ · On-site
$198K/yr
Analog Design Engineer Job Responsibility: * Design high-performance analog and mixed-signal ... Collaborate with layout engineers to ensure optimal device placement, matching, EM/IR compliance ...
Analog Design Engineer Job Responsibility: * Design high-performance analog and mixed-signal ... Collaborate with layout engineers to ensure optimal device placement, matching, EM/IR compliance ...
Analog Design Engineer Job Responsibility: * Design high-performance analog and mixed-signal ... Collaborate with layout engineers to ensure optimal device placement, matching, EM/IR compliance ...
Phoenix, AZ · On-site
$103K - $142K/yr
Create and optimize layouts working closely with layout engineers. * Perform circuit analysis ... Technical Leadership * Lead analog design projects from specification to silicon validation.
Phoenix, AZ · On-site
$103K - $142K/yr
Create and optimize layouts working closely with layout engineers. * Perform circuit analysis ... Technical Leadership * Lead analog design projects from specification to silicon validation.
Phoenix, AZ · On-site
$103K - $142K/yr
Create and optimize layouts working closely with layout engineers. * Perform circuit analysis ... Technical Leadership * Lead analog design projects from specification to silicon validation.
Phoenix, AZ · On-site
$103K - $142K/yr
Create and optimize layouts working closely with layout engineers. * Perform circuit analysis ... Technical Leadership * Lead analog design projects from specification to silicon validation.
$71.8K - $82.4K
2% of jobs
$82.4K - $93.1K
1% of jobs
$93.1K - $103.8K
2% of jobs
$103.8K - $114.5K
2% of jobs
$114.5K - $125.1K
5% of jobs
$125.1K - $135.8K
3% of jobs
$135.8K - $146.5K
2% of jobs
$146.5K - $157.2K
2% of jobs
$157.2K - $167.8K
2% of jobs
$167.8K - $178.5K
2% of jobs
$178.6K is the 25th percentile. Wages below this are outliers.
$178.5K - $189.2K
76% of jobs
$71.8K
$173.6K
$189.2K
| Aspect | Analog Layout Engineer | Digital IC Layout Engineer |
|---|---|---|
| Required Credentials | Bachelor's or Master's in Electrical Engineering, specialized in analog design | Bachelor's or Master's in Electrical Engineering, focused on digital design |
| Work Environment | Designing analog circuits, working closely with circuit designers | Implementing digital logic layouts, collaborating with digital design teams |
| Industry Usage | Semiconductor companies, ASIC/FPGA design | Semiconductor companies, ASIC/FPGA design |
| Common Search/Comparison | Analog Layout Engineer vs Digital IC Layout Engineer |
Both roles involve IC layout design within the semiconductor industry, but Analog Layout Engineers focus on analog circuits requiring precise analog signal handling, while Digital IC Layout Engineers work on digital logic circuits. The skills, tools, and design considerations differ, making each role specialized within the chip design process.

8.7
Based on 147 frontline employees who took The Breakroom Quiz
14th of 144 rated electronics manufacturers
The Role and Impact
Join Intel's Advanced Design Foundational IP Organization (AD-FIP) within the Design Technology Platform (DTP), a team that is pivotal in shaping the future of analog and mixed-signal IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and developing cutting-edge analog circuits in advanced process nodes. Your work will directly impact Intel's ability to deliver the best-in-class foundational IP and product designs that drive innovation across client, server, and networking technologies. Collaborating with cross-functional teams, you will play a critical role in optimizing performance, power, area, and yield of circuits while pushing the boundaries of what is possible in semiconductor technology.
Key Responsibilities
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Minimum Qualifications
3+ years of experience with the following technical skills
Preferred Qualifications
Come be a part of Intel's mission to shape the future of technology. Apply today to join a team where innovation, collaboration, and excellence drive the creation of transformative products.
Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, Arizona, Phoenix, US, California, Santa Clara, US, Texas, AustinBusiness group:Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $164,470.00-269,100.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Sourced by ZipRecruiter
Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
Manufacturing
10,000+ Employees
Santa Clara, CA, US
1968