Solving layout design issues and applying proactive intervention ... Proactively work with design engineers to achieve efficient circuit performance * Design analog ...
Solving layout design issues and applying proactive intervention ... Proactively work with design engineers to achieve efficient circuit performance * Design analog ...
Staff Analog Engineer
Chandler, AZ · On-site
$198K/yr
... and layout supervision of CMOS power management circuits meeting performance, area, power and ... Applications Engineers * Produce high quality documentation for own IP blocks • Leading ...
Staff Analog Engineer
Chandler, AZ · On-site
$198K/yr
... and layout supervision of CMOS power management circuits meeting performance, area, power and ... Applications Engineers * Produce high quality documentation for own IP blocks • Leading ...
Staff Analog Engineer
Chandler, AZ · Hybrid
$198K/yr
... and layout supervision of CMOS power management circuits meeting performance, area, power and ... with Applications Engineers * Produce high quality documentation for own IP blocks Leading ...
Staff Analog Engineer
Chandler, AZ · Hybrid
$198K/yr
... and layout supervision of CMOS power management circuits meeting performance, area, power and ... with Applications Engineers * Produce high quality documentation for own IP blocks Leading ...
Power/Analog Engineer
Tempe, AZ · On-site
$129K - $194K/yr
At Viasat you'll work with highly motivated engineers in an exciting, dynamic, yet informal ... board layout (Mentor Graphics Expedition, Zuken) * Experience in DC-DC converters, operational ...
Power/Analog Engineer
Tempe, AZ · On-site
$129K - $194K/yr
At Viasat you'll work with highly motivated engineers in an exciting, dynamic, yet informal ... board layout (Mentor Graphics Expedition, Zuken) * Experience in DC-DC converters, operational ...
Power/Analog Engineer with Security Clearance
Tempe, AZ · On-site
$104K - $164K/yr
Power/Analog Engineer Job Locations US-USA-AZ-Tempe 2026-6343 About us One team. Global challenges ... and board layout (Mentor Graphics Expedition, Zuken) • Experience in DC-DC converters ...
Power/Analog Engineer with Security Clearance
Tempe, AZ · On-site
$104K - $164K/yr
Power/Analog Engineer Job Locations US-USA-AZ-Tempe 2026-6343 About us One team. Global challenges ... and board layout (Mentor Graphics Expedition, Zuken) • Experience in DC-DC converters ...
Staff Analog Design Engineer
Chandler, AZ · On-site
$198K/yr
... and layout supervision of CMOS power management circuits meeting performance, area, power and ... Applications Engineers * Produce high quality documentation for own IP blocks • Leading ...
Staff Analog Design Engineer
Chandler, AZ · On-site
$198K/yr
... and layout supervision of CMOS power management circuits meeting performance, area, power and ... Applications Engineers * Produce high quality documentation for own IP blocks • Leading ...
Staff Analog Design Engineer
Chandler, AZ · Hybrid
$198K/yr
... and layout supervision of CMOS power management circuits meeting performance, area, power and ... with Applications Engineers * Produce high quality documentation for own IP blocks Leading ...
Staff Analog Design Engineer
Chandler, AZ · Hybrid
$198K/yr
... and layout supervision of CMOS power management circuits meeting performance, area, power and ... with Applications Engineers * Produce high quality documentation for own IP blocks Leading ...
Senior Engineer, Mixed Signal Design Engineering
$114K - $166K/yr
Function as the chip lead and lead analog or digital designer for projects and perform chip floor planning to guide layout engineers during physical implementation. Evaluate the physical ...
Senior Engineer, Mixed Signal Design Engineering
$114K - $166K/yr
Function as the chip lead and lead analog or digital designer for projects and perform chip floor planning to guide layout engineers during physical implementation. Evaluate the physical ...
Developing and preparing layout drawings of the analog and digital semiconductor devices. Creating the drawings from schematics and related geometry as provided by the circuit design engineer. Work ...
Developing and preparing layout drawings of the analog and digital semiconductor devices. Creating the drawings from schematics and related geometry as provided by the circuit design engineer. Work ...
Power/Analog Engineer
Tempe, AZ · On-site
$129K - $194K/yr
At Viasat you'll work with highly motivated engineers in an exciting, dynamic, yet informal ... board layout (Mentor Graphics Expedition, Zuken) * Experience in DC-DC converters, operational ...
Power/Analog Engineer
Tempe, AZ · On-site
$129K - $194K/yr
At Viasat you'll work with highly motivated engineers in an exciting, dynamic, yet informal ... board layout (Mentor Graphics Expedition, Zuken) * Experience in DC-DC converters, operational ...
Power/Analog Engineer
Tempe, AZ · On-site
$129K - $194K/yr
At Viasat you'll work with highly motivated engineers in an exciting, dynamic, yet informal ... board layout (Mentor Graphics Expedition, Zuken) * Experience in DC-DC converters, operational ...
Power/Analog Engineer
Tempe, AZ · On-site
$129K - $194K/yr
At Viasat you'll work with highly motivated engineers in an exciting, dynamic, yet informal ... board layout (Mentor Graphics Expedition, Zuken) * Experience in DC-DC converters, operational ...
About Analog Devices Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that ... Perform parasitic-aware simulation, layout-dependent effect analysis, and design centering across ...
About Analog Devices Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that ... Perform parasitic-aware simulation, layout-dependent effect analysis, and design centering across ...
... simulation, and layout of Analog/RF circuits Use Cadence tools for circuit design and verification Support silicon validation and testing Collaborate with a distributed engineering team ...
... simulation, and layout of Analog/RF circuits Use Cadence tools for circuit design and verification Support silicon validation and testing Collaborate with a distributed engineering team ...
Developing and preparing layout drawings of the analog and digital semiconductor devices. Creating the drawings from schematics and related geometry as provided by the circuit design engineer. Work ...
Developing and preparing layout drawings of the analog and digital semiconductor devices. Creating the drawings from schematics and related geometry as provided by the circuit design engineer. Work ...
Layout Designer | DCC DAC
Tucson, AZ · On-site
Developing and preparing layout drawings of the analog and digital semiconductor devices. Creating the drawings from schematics and related geometry as provided by the circuit design engineer. Work ...
Layout Designer | DCC DAC
Tucson, AZ · On-site
Developing and preparing layout drawings of the analog and digital semiconductor devices. Creating the drawings from schematics and related geometry as provided by the circuit design engineer. Work ...
Analog Design- Internship
Tempe, AZ · On-site
... and layout of Analog/RF circuits • Use Cadence tools for circuit design and verification • Support silicon validation and testing • Collaborate with a distributed engineering team ...
Analog Design- Internship
Tempe, AZ · On-site
... and layout of Analog/RF circuits • Use Cadence tools for circuit design and verification • Support silicon validation and testing • Collaborate with a distributed engineering team ...
Developing and preparing layout drawings of the analog and digital semiconductor devices. Creating the drawings from schematics and related geometry as provided by the circuit design engineer. Work ...
Developing and preparing layout drawings of the analog and digital semiconductor devices. Creating the drawings from schematics and related geometry as provided by the circuit design engineer. Work ...
Developing and preparing layout drawings of the analog and digital semiconductor devices. Creating the drawings from schematics and related geometry as provided by the circuit design engineer. Work ...
Developing and preparing layout drawings of the analog and digital semiconductor devices. Creating the drawings from schematics and related geometry as provided by the circuit design engineer. Work ...
Staff Analog Engineer
Chandler, AZ · On-site
... and layout supervision of CMOS power management circuits meeting performance, area, power and ... Applications Engineers * Produce high quality documentation for own IP blocks • Leading ...
Staff Analog Engineer
Chandler, AZ · On-site
... and layout supervision of CMOS power management circuits meeting performance, area, power and ... Applications Engineers * Produce high quality documentation for own IP blocks • Leading ...
Staff Analog Engineer
Chandler, AZ · On-site
... and layout supervision of CMOS power management circuits meeting performance, area, power and ... with Applications Engineers * Produce high quality documentation for own IP blocks Leading ...
Staff Analog Engineer
Chandler, AZ · On-site
... and layout supervision of CMOS power management circuits meeting performance, area, power and ... with Applications Engineers * Produce high quality documentation for own IP blocks Leading ...
Analog Layout Engineer information
See Arizona salary details
$71.8K - $82.4K
2% of jobs
$82.4K - $93.1K
1% of jobs
$93.1K - $103.8K
2% of jobs
$103.8K - $114.5K
2% of jobs
$114.5K - $125.1K
5% of jobs
$125.1K - $135.8K
3% of jobs
$135.8K - $146.5K
2% of jobs
$146.5K - $157.2K
2% of jobs
$157.2K - $167.8K
2% of jobs
$167.8K - $178.5K
2% of jobs
$178.6K is the 25th percentile. Wages below this are outliers.
$178.5K - $189.2K
76% of jobs
$71.8K
$173.6K
$189.2K
How much do analog layout engineer jobs pay per year?
What are Analog Layout Engineers?
What are some common challenges Analog Layout Engineers face when collaborating with circuit designers?
What are the key skills and qualifications needed to thrive as an Analog Layout Engineer, and why are they important?
What is the difference between Analog Layout Engineer vs Digital IC Layout Engineer?
| Aspect | Analog Layout Engineer | Digital IC Layout Engineer |
|---|---|---|
| Required Credentials | Bachelor's or Master's in Electrical Engineering, specialized in analog design | Bachelor's or Master's in Electrical Engineering, focused on digital design |
| Work Environment | Designing analog circuits, working closely with circuit designers | Implementing digital logic layouts, collaborating with digital design teams |
| Industry Usage | Semiconductor companies, ASIC/FPGA design | Semiconductor companies, ASIC/FPGA design |
| Common Search/Comparison | Analog Layout Engineer vs Digital IC Layout Engineer |
Both roles involve IC layout design within the semiconductor industry, but Analog Layout Engineers focus on analog circuits requiring precise analog signal handling, while Digital IC Layout Engineers work on digital logic circuits. The skills, tools, and design considerations differ, making each role specialized within the chip design process.
Full-time
Posted 16 days ago
Job description
What you'll do
In this position, you will work closely with design engineering to complete the layout and verification of high-performance mixed-signal CMOS Integrated Circuits using Cadence Virtuoso XL and Mentor's Calibre tools, and work with circuit engineers to generate topological layouts to ensure optimal circuit performance.
Responsibilities
- Solving layout design issues and applying proactive intervention
- Proactively work with design engineers to achieve efficient circuit performance
- Design analog & mixed-signal layouts
- Understand device matching techniques
- Understand signal conditioning/protection techniques
- Strong collaboration skills, including written and verbal communication
- Outstanding layout planning and integration skills
- Experience in routing at the block level and chip top-level using assisted/automated tools
Qualifications
Required Skills:
- Associates Degree in Electronic/IC layout CAD specialization or related program and 10+ years of IC layout experience
- Ability to layout analog circuitry in a size/time constrained environment
- Understand layout techniques such as common centroid, matching, isolation, shielding, and the use of dummy devices
- Solid understanding of ESD, Latch-up, STI, WPE, electro-migration, IR drop, cross-coupling capacitance, DFM, and Antenna effect
- Ability to solve design problems while using a combination of technical skills, intuition, and creativity
- Proficiency in floor planning activities with block assembly, and block-level routing
- LVS trouble shooting and debug skills
- Proven track record of working in a fast-paced team-oriented environment
- Great teammate and works well with others
Preferred Skills:
- BS Degree in Electronics Engineering or related program
- Comfortable with multiple IC design CAD tools and foundry PDKs
- Demonstrated ability to contribute ideas for improved efficiency and automation of layout tasks
- Knowledge of analog, digital, and mixed-signal fundamentals
Applicants must be authorized to work for ANY employer in the U.S. We are unable to sponsor or take over sponsorship of an employment visa at this time.
Export control restrictions based upon applicable laws and regulations would prohibit candidates who are nationals of certain embargoed countries from working in this position without Cirrus Logic first obtaining an export license. Candidates for this role must be able to access technical data without a requirement for an export license. We are unable to sponsor or obtain export licenses for this role.
Cirrus Logic strives to select the best qualified applicant for any opening. Different approaches, ideas and points of view are both valued and respected. Employment decisions are made on the basis of job-related criteria without regard to race, color, religion, sex, national origin, age, protected veteran or disabled status, genetic information, or any other classification protected by applicable law.
About Cirrus Logic
Sourced by ZipRecruiter
Industry
Semiconductor and electronic component manufacturing
Company size
1,001 - 5,000 Employees
Headquarters location
Austin, TX, US
Year founded
1981