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Analog Layout Engineer Jobs in Arizona (NOW HIRING)

Layout & Post-Layout Validation: Supervise layout design and verify post-layout design using SPICE ... MS or PhD in Electrical Engineering * 6+ years of mixed-signal and analog design experience. Design ...

Developing and preparing layout drawings of the analog and digital semiconductor devices. * Creating the drawings from schematics and related geometry as provided by the circuit design engineer.

Staff Analog Design Engineer

Chandler, AZ · On-site +1

$198K/yr

We are seeking a Staff Analog Design Engineer to drive the design of complex Power Management ICs ... Lead the design, simulation, verification, and layout supervision of CMOS power management circuits ...

Staff Analog Design Engineer

Chandler, AZ · On-site

$198K/yr

We are seeking a Staff Analog Design Engineer to drive the design of complex Power Management ICs ... Lead the design, simulation, verification, and layout supervision of CMOS power management circuits ...

Staff Analog Design Engineer

Chandler, AZ · On-site +1

$198K/yr

We are seeking a Staff Analog Design Engineer to drive the design of complex Power Management ICs ... Lead the design, simulation, verification, and layout supervision of CMOS power management circuits ...

Developing and preparing layout drawings of the analog and digital semiconductor devices. Creating the drawings from schematics and related geometry as provided by the circuit design engineer. Work ...

Showing results 21-40

Analog Layout Engineer information

See Arizona salary details

$71.8K

$173.6K

$189.2K

How much do analog layout engineer jobs pay per year?

As of Sep 6, 2026, the average yearly pay for analog layout engineer in Arizona is $173,553.00, according to ZipRecruiter salary data. Most workers in this role earn between $188,200.00 and $188,200.00 per year, depending on experience, location, and employer.

What is an analog layout engineer?

Analog Layout Engineers are specialized professionals who design the physical layout of analog and mixed-signal integrated circuits (ICs). They translate circuit schematics into detailed geometric representations that can be manufactured on silicon wafers. Their work includes placement and routing of transistors, resistors, capacitors, and interconnects, ensuring optimal performance, area, and reliability. They collaborate closely with circuit designers to meet electrical and physical requirements, and use electronic design automation (EDA) tools to create and verify layouts.

What are some common challenges analog layout engineers face when collaborating with circuit designers?

Analog Layout Engineers often work closely with circuit designers to translate schematics into physical layouts, which can present challenges such as resolving conflicting design requirements or optimizing for both performance and manufacturability. Miscommunications can occur regarding layout constraints, parasitic effects, or changes in design specifications. Successful collaboration requires clear communication, proactive problem-solving, and regular design reviews to ensure that the final layout meets all electrical, physical, and timing requirements.

What are the key skills and qualifications needed to thrive as an analog layout engineer, and why are they important?

To thrive as an Analog Layout Engineer, you need strong knowledge of semiconductor physics, circuit design principles, and experience with analog/mixed-signal layout, typically supported by a degree in electrical engineering or a related field. Proficiency with EDA tools such as Cadence Virtuoso, DRC/LVS verification tools, and familiarity with IC fabrication processes are crucial. Attention to detail, problem-solving, and effective communication are important soft skills for collaborating with design teams and ensuring design accuracy. These skills and qualities are essential for creating high-performance, manufacturable integrated circuits that meet stringent specifications and timelines.

What is the difference between Analog Layout Engineer vs Digital IC Layout Engineer?

AspectAnalog Layout EngineerDigital IC Layout Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering, specialized in analog designBachelor's or Master's in Electrical Engineering, focused on digital design
Work EnvironmentDesigning analog circuits, working closely with circuit designersImplementing digital logic layouts, collaborating with digital design teams
Industry UsageSemiconductor companies, ASIC/FPGA designSemiconductor companies, ASIC/FPGA design
Common Search/ComparisonAnalog Layout Engineer vs Digital IC Layout Engineer

Both roles involve IC layout design within the semiconductor industry, but Analog Layout Engineers focus on analog circuits requiring precise analog signal handling, while Digital IC Layout Engineers work on digital logic circuits. The skills, tools, and design considerations differ, making each role specialized within the chip design process.

What are the most commonly searched types of Analog Layout Engineer jobs in Arizona?

The most popular types of Analog Layout Engineer jobs in Arizona are:

What are popular job titles related to Analog Layout Engineer jobs in Arizona?

For Analog Layout Engineer jobs in Arizona, the most frequently searched job titles are:

What job categories do people searching Analog Layout Engineer jobs in Arizona look for?

The top searched job categories for Analog Layout Engineer jobs in Arizona are:

Infographic showing various Analog Layout Engineer job openings in Arizona as of August 2026, with employment types broken down into 100% Contract. Highlights an 74% In-person, and 26% Remote job distribution, with an average salary of $173,553 per year, or $83.4 per hour.

Analog and Mixed Signal Design Engineer

Broadcom

Chandler, AZ • On-site

$198K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 12 days ago


Broadcom rating

8.7

Company rating: 8.7 out of 10

Based on 23 frontline employees who took The Breakroom Quiz

18th of 161 rated electronics manufacturers


Job description

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Job Description:

Role Overview

Broadcom's Central Engineering Group is seeking an experienced Mixed-Signal Analog Design Engineer to join our world-class team. In this position, you will design advanced on-die Process, Voltage, and Temperature (PVT) monitoring IP. You will work across a wide range of cutting-edge technologies, including the industry's most advanced process nodes and applications.

Responsibilities

  • Circuit Design & Verification: Design schematic architectures for analog and mixed-signal blocks, including bandgaps, ADCs, DACs, voltage regulators, comparators, and GPIOs.
  • Layout & Post-Layout Validation: Supervise layout design and verify post-layout design using SPICE simulations to ensure silicon success.
  • Digital Modeling: Build behavioral and gate-level models for IPs and validate functionality through Verilog simulations.
  • IP Delivery & Documentation: Create standard EDA tool views (including timing models), and author comprehensive datasheets and technical integration documents.
  • Silicon Bring-up & Validation: Establish post-silicon testing guidelines and oversee the validation process by analyzing and reviewing test data.

Education & Experience

  • MS or PhD in Electrical Engineering
  • 6+ years of mixed-signal and analog design experience.

Design Expertise

  • Deep knowledge of core analog concepts including gain, bandwidth, stability, device physics, circuit reliability, process variation, and the statistical analysis of Monte Carlo simulation results.
  • Strong understanding of layout effects on circuit performance.
  • Familiarity with Verilog modeling, digital circuits, and standard digital implementation flows.

EDA Tools

  • Proficiency with Cadence Virtuoso and simulation platforms like Spectre, HSPICE, or PrimeSim.
  • Experience with Synopsys PrimeTime and Verilog simulators such as Xcelium or VCS.

Professional Attributes

  • Excellent communication and teamwork skills.
  • Proven ability to independently navigate complex, new, or unfamiliar engineering challenges.

Desired Skills

  • Prior experience building and delivering mixed-signal IPs.
  • General familiarity with laboratory testing methodologies and common bench equipment to effectively guide lab teams.
  • Proficiency in scripting languages (Python, Perl, SKILL) to automate design and verification tasks.
  • Familiarity with ESD (Electrostatic Discharge) and latch-up design rules.
  • Silicon Failure Analysis (FA) and debugging skills.

Compensation and Benefits


The annual base salary range for this position is USD 109,700.00 To USD 175,500.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.


Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.


Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.


If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.


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