DDR Design Engineer
Beaverton, OR · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Exposure to Design For Test, understanding of scan concept and writing DFT friendly RTL. Unified ...
DDR Design Engineer
Beaverton, OR · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Exposure to Design For Test, understanding of scan concept and writing DFT friendly RTL. Unified ...
Be Seen First
Wafer PVD Process Engineer
Corvallis, OR · On-site
Worked with product R&D and manufacturing teams on design for test (DFT) and design for ... Engineering is a premier engineering design firm. We partner with clients from start-ups to ...
Quick apply
Be Seen First
Wafer PVD Process Engineer
Corvallis, OR · On-site
Worked with product R&D and manufacturing teams on design for test (DFT) and design for ... Engineering is a premier engineering design firm. We partner with clients from start-ups to ...
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Exposure to Design For Test, understanding of scan concept and writing DFT friendly RTL. Unified ...
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Exposure to Design For Test, understanding of scan concept and writing DFT friendly RTL. Unified ...
DDR Design Engineer
Beaverton, OR · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Exposure to Design For Test, understanding of scan concept and writing DFT friendly RTL. Unified ...
DDR Design Engineer
Beaverton, OR · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Exposure to Design For Test, understanding of scan concept and writing DFT friendly RTL. Unified ...
Help developers GPU-accelerate and scale materials and chemistry workflows - density functional theory (DFT), molecular dynamics (MD), quantum chemistry, machine-learning interatomic potentials (MLIP ...
Help developers GPU-accelerate and scale materials and chemistry workflows - density functional theory (DFT), molecular dynamics (MD), quantum chemistry, machine-learning interatomic potentials (MLIP ...
Timing Design Engineer
Beaverton, OR · On-site
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... Familiarity with synthesis, DFT and backend related methodology and tools. Strong communication ...
Timing Design Engineer
Beaverton, OR · On-site
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... Familiarity with synthesis, DFT and backend related methodology and tools. Strong communication ...
RTL Design Engineer
Beaverton, OR · On-site
You will work with a variety of flows fundamental to modern silicon engineering: modeling and ... test (DFT) SystemVerilog assertions, checkers, and advanced verification techniques Scripting ...
RTL Design Engineer
Beaverton, OR · On-site
You will work with a variety of flows fundamental to modern silicon engineering: modeling and ... test (DFT) SystemVerilog assertions, checkers, and advanced verification techniques Scripting ...
Senior FPGA Prototyping Engineer
OR · On-site +1
$120K - $225K/yr
Collaborate closely with ASIC Design, Verification, Firmware, Software, Systems, and DFT teams to accelerate product development. Qualifications * BS or MS in Electrical Engineering, Computer ...
Senior FPGA Prototyping Engineer
OR · On-site +1
$120K - $225K/yr
Collaborate closely with ASIC Design, Verification, Firmware, Software, Systems, and DFT teams to accelerate product development. Qualifications * BS or MS in Electrical Engineering, Computer ...
Timing Design Engineer
Beaverton, OR · On-site
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... Familiarity with synthesis, DFT and backend related methodology and tools. Strong communication ...
Timing Design Engineer
Beaverton, OR · On-site
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... Familiarity with synthesis, DFT and backend related methodology and tools. Strong communication ...
We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If ... Understanding of DFT logic and experience with DFT timing closure for various modes e.g., scan ...
We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If ... Understanding of DFT logic and experience with DFT timing closure for various modes e.g., scan ...
We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If ... Understanding of DFT logic and experience with DFT timing closure for various modes e.g., scan ...
We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If ... Understanding of DFT logic and experience with DFT timing closure for various modes e.g., scan ...
... DFT strategies, error detection and correction Understanding of low power microarchitecture ... programming Experience using an interpretive language such as Perl or Python
... DFT strategies, error detection and correction Understanding of low power microarchitecture ... programming Experience using an interpretive language such as Perl or Python
... DFT strategies, error detection and correction Understanding of low power microarchitecture ... programming Experience using an interpretive language such as Perl or Python
... DFT strategies, error detection and correction Understanding of low power microarchitecture ... programming Experience using an interpretive language such as Perl or Python
RTL Design Engineer
Beaverton, OR · On-site
You will work with a variety of flows fundamental to modern silicon engineering: modeling and ... test (DFT) SystemVerilog assertions, checkers, and advanced verification techniques Scripting ...
RTL Design Engineer
Beaverton, OR · On-site
You will work with a variety of flows fundamental to modern silicon engineering: modeling and ... test (DFT) SystemVerilog assertions, checkers, and advanced verification techniques Scripting ...
Product Development/DFX Lead - Neuromorphic Computing
Hillsboro, OR · On-site
$141K - $269K/yr
Position Overview We are seeking a senior product development engineer to lead the DFT/DFX strategy for Intel's neuromorphic silicon program. This role offers a unique opportunity to help define ...
Product Development/DFX Lead - Neuromorphic Computing
Hillsboro, OR · On-site
$141K - $269K/yr
Position Overview We are seeking a senior product development engineer to lead the DFT/DFX strategy for Intel's neuromorphic silicon program. This role offers a unique opportunity to help define ...
Timing Design Engineer
Beaverton, OR · On-site
... DFT and backend related methodology and tools. Strong communication skills are a pre-requisite. You will be collaborating with many diverse groups at Apple. The ideal candidate will be a self starter ...
Timing Design Engineer
Beaverton, OR · On-site
... DFT and backend related methodology and tools. Strong communication skills are a pre-requisite. You will be collaborating with many diverse groups at Apple. The ideal candidate will be a self starter ...
Product Development/DFX Lead - Neuromorphic Computing
Hillsboro, OR · On-site
$141K - $269K/yr
Position Overview We are seeking a senior product development engineer to lead the DFT/DFX strategy for Intel's neuromorphic silicon program. This role offers a unique opportunity to help define ...
Product Development/DFX Lead - Neuromorphic Computing
Hillsboro, OR · On-site
$141K - $269K/yr
Position Overview We are seeking a senior product development engineer to lead the DFT/DFX strategy for Intel's neuromorphic silicon program. This role offers a unique opportunity to help define ...
RTL Design Engineer
$141K/yr
... test (DFT) SystemVerilog assertions, checkers, and advanced verification techniques Scripting ... Engineering.
RTL Design Engineer
$141K/yr
... test (DFT) SystemVerilog assertions, checkers, and advanced verification techniques Scripting ... Engineering.
Timing Design Engineer
Beaverton, OR · On-site
... DFT and backend related methodology and tools. Strong communication skills are a pre-requisite. You will be collaborating with many diverse groups at Apple. The ideal candidate will be a self starter ...
Timing Design Engineer
Beaverton, OR · On-site
... DFT and backend related methodology and tools. Strong communication skills are a pre-requisite. You will be collaborating with many diverse groups at Apple. The ideal candidate will be a self starter ...
... Software, DFT and other teams. What you'll be doing: * Define and develop system-level ... A Masters in Computer or Electrical Engineering or equivalent experience * 8+ years of experience ...
... Software, DFT and other teams. What you'll be doing: * Define and develop system-level ... A Masters in Computer or Electrical Engineering or equivalent experience * 8+ years of experience ...
Dft Engineer information
See Oregon salary details
$77.2K - $94.1K
10% of jobs
$107.7K is the 25th percentile. Wages below this are outliers.
$94.1K - $111K
19% of jobs
$111K - $127.9K
17% of jobs
The median wage is $129.8K / yr.
$127.9K - $144.8K
39% of jobs
$144.8K - $161.8K
12% of jobs
$161.8K - $178.7K
1% of jobs
$178.7K - $195.6K
1% of jobs
$195.6K - $212.5K
1% of jobs
$212.5K - $229.4K
0% of jobs
$229.4K - $246.3K
0% of jobs
$246.3K - $263.3K
0% of jobs
$77.2K
$136.9K
$263.3K
How much do dft engineer jobs pay per year?
As of Sep 13, 2026, the average yearly pay for dft engineer in Oregon is $136,930.00, according to ZipRecruiter salary data. Most workers in this role earn between $108,900.00 and $142,200.00 per year, depending on experience, location, and employer.
What is a DFT engineer?
DFT Engineers, or Design for Test Engineers, are professionals who specialize in designing and implementing test structures and methodologies within integrated circuits (ICs) to ensure their testability and reliability during manufacturing. Their work enables efficient detection and diagnosis of faults in chips, helping to improve yield and reduce production costs. DFT Engineers collaborate closely with design, verification, and manufacturing teams to integrate features such as scan chains, built-in self-test (BIST), and boundary scan into chip designs. Their expertise is crucial for modern semiconductor development, especially as chips become increasingly complex.
What are the key skills and qualifications needed to thrive as a DFT engineer?
To thrive as a DFT (Design for Test) Engineer, you need a solid background in electrical engineering, digital design, and ASIC/FPGA development, often supported by a relevant degree. Familiarity with test methodologies, scan insertion tools (such as Synopsys DFT Compiler or Mentor Tessent), and scripting languages like Perl or Python is typically required. Strong problem-solving skills, attention to detail, and effective communication help DFT Engineers collaborate with design and verification teams to resolve complex testability challenges. These competencies are essential to ensure high-quality, testable silicon designs that minimize defects and streamline manufacturing processes.
What are some common challenges faced by DFT engineers during the silicon validation phase, and how can these be addressed?
DFT Engineers often encounter challenges during the silicon validation phase, such as discrepancies between simulation results and actual silicon behavior, limited access to internal nodes, and diagnosing scan chain failures. These issues can be addressed by thorough pre-silicon verification, incorporating robust test points, and leveraging advanced diagnostic tools and methodologies. Effective collaboration with design and validation teams is also crucial to quickly resolve issues and implement necessary design changes, ensuring high test coverage and product reliability.
What is the difference between Dft Engineer vs Test Engineer?
| Aspect | Dft Engineer | Test Engineer |
|---|---|---|
| Required Credentials | Bachelor's in Electronics, Electrical, or related fields; certifications in DFT techniques | Bachelor's in Electronics, Electrical, Computer Science; certifications in testing methodologies |
| Work Environment | Design and implementation of DFT strategies during IC development | Testing, validation, and debugging of electronic products and systems |
| Employer & Industry Usage | Semiconductor companies, IC design firms | Consumer electronics, automotive, telecommunications industries |
While both Dft Engineers and Test Engineers work in electronics and semiconductor industries, Dft Engineers focus on designing testability features during chip development, whereas Test Engineers execute testing and validation of finished products. Their roles complement each other, but their daily tasks and expertise areas differ significantly.
Is DFT engineering in demand?
DFT (Design for Test) engineering is in demand within the semiconductor and integrated circuit industries, as companies seek to improve chip testability and reduce manufacturing costs. Skills in digital design, verification, and familiarity with EDA tools are valuable, and demand is driven by ongoing advancements in electronics and increasing complexity of chips.
What are the most commonly searched types of Dft Engineer jobs in Oregon?
The most popular types of Dft Engineer jobs in Oregon are:
What are popular job titles related to Dft Engineer jobs in Oregon?
For Dft Engineer jobs in Oregon, the most frequently searched job titles are:
- Freelance Work From Home Analog Mixed Signal Design Engineer
- Vlsi Design Engineer
- Senior Asic Design Engineer
- Senior Vdc Engineer
- Work From Home Design Verification Engineer
- Remote Asic Design Engineer
- Remote Entry Level Mechanical Design Engineer
- Work From Home Chip Design Engineer
- Vlsi Engineer
- Remote Dfm Engineer
What job categories do people searching Dft Engineer jobs in Oregon look for?
The top searched job categories for Dft Engineer jobs in Oregon are:
What cities in Oregon are hiring for Dft Engineer jobs?
Cities in Oregon with the most Dft Engineer job openings:
DDR Design Engineer
Beaverton, OR • On-site
Apple
• Computer and Electronic Product Manufacturing • 10K+ employees10,000+ employees
Full-time
Re-posted 13 days ago
Apple rating
8.1
Based on 684 frontline employees who took The Breakroom Quiz
Job description
At Apple, we work to craft products that enrich people's lives. If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated DDR Design Engineer.
As a member of our dynamic group, you will have the rare and rewarding opportunity to craft upcoming products that will delight and inspire millions of Apple's customers every single day. You will join the DDR PHY design team. We provide best-in-class PHY designs for high-performance, low power applications. As a logic design engineer, you will be involved in all phases of the design, from concept study, architecture definition, design and verification, to silicon bring-up and characterization.
Description
In this role, you will be responsible for performing concept studies and providing direction in terms of performance, gate count and power for various digital designs. You will be responsible for writing detailed design specification and test plans in close collaboration with architecture, circuit designers and verification engineers. You will provide high-quality RTL description, including assertions, for the design. Use formal tools and static checkers to guarantee RTL quality. You will also support design verification to insure bug-free first silicon. Responsibilities will include driving functional and code coverage as well as timing closure for your designs and supporting silicon bring-up, performance and power characterization.
Minimum Qualifications
Bachelors of Science in Electrical Engineering.
Preferred Qualifications
RTL design using Verilog or SystemVerilog, assertion writing.
Design of state machines, data paths, arbitration and clock domain crossing logic.
Logic synthesis, timing constraints.
Exposure to Design For Test, understanding of scan concept and writing DFT friendly RTL.
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
Prior experience in DDR PHY design and mixed-signal environment is a plus.
As a member of our dynamic group, you will have the rare and rewarding opportunity to craft upcoming products that will delight and inspire millions of Apple's customers every single day. You will join the DDR PHY design team. We provide best-in-class PHY designs for high-performance, low power applications. As a logic design engineer, you will be involved in all phases of the design, from concept study, architecture definition, design and verification, to silicon bring-up and characterization.
Description
In this role, you will be responsible for performing concept studies and providing direction in terms of performance, gate count and power for various digital designs. You will be responsible for writing detailed design specification and test plans in close collaboration with architecture, circuit designers and verification engineers. You will provide high-quality RTL description, including assertions, for the design. Use formal tools and static checkers to guarantee RTL quality. You will also support design verification to insure bug-free first silicon. Responsibilities will include driving functional and code coverage as well as timing closure for your designs and supporting silicon bring-up, performance and power characterization.
Minimum Qualifications
Bachelors of Science in Electrical Engineering.
Preferred Qualifications
RTL design using Verilog or SystemVerilog, assertion writing.
Design of state machines, data paths, arbitration and clock domain crossing logic.
Logic synthesis, timing constraints.
Exposure to Design For Test, understanding of scan concept and writing DFT friendly RTL.
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
Prior experience in DDR PHY design and mixed-signal environment is a plus.
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976