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Contractual Asic Rtl Design Engineer Jobs (NOW HIRING)

Etched

RTL Design Engineer

Cupertino, CA

$2.0K/mo

RTL Design Engineer As an RTL Engineer at Etched, you will be critical in ensuring that our AI ... both our existing and upcoming ASIC designs. In this role, you will work closely with ...

Synopsys

ASIC Digital Design, Architect - 15036

Austin, TX · On-site

$181K - $271K/yr

... 2026 Job Category Engineering Job Subcategory ASIC Digital Design Hire Type Employee Remote ... Defining and developing ASIC RTL design and verification at both chip and block levels. * Creating ...

Sivaltech

RTL Engineer (Ethernet)

San Francisco, CA

Sivaltech is hiring an experienced RTL Design Engineer with strong Ethernet expertise for a high ... Knowledge of ASIC/SoC design flow * Experience in clock/reset/power domain design * Exposure to ...

Etched

RTL Design Engineer

Cupertino, CA · On-site

$2.0K/mo

RTL Design Engineer As an RTL Engineer at Etched, you will be critical in ensuring that our AI ... both our existing and upcoming ASIC designs. In this role, you will work closely with ...

Google

RTL Design Engineer, TPU

Sunnyvale, CA · On-site

... ASIC design. * Experience interacting with software, system hardware, and other cross-functional ... Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not ...

Cerebras Systems

Lead RTL Design Engineer

Sunnyvale, CA · Hybrid

$175K - $275K/yr

About The Role As a lead front-end design engineer, you will be a key part of the world-class team ... The role also requires close collaboration and management of external ASIC vendor. You will ...

iFlow Inc

Power Engineer (RTL Design)

Sunnyvale, CA · On-site

ASIC/SOC power engineers with experience on tools like PTPX / RTL-A. • We are seeking a highly skilled and motivated Contract Worker for RTL Design and Verification with expertise in power ...

Jobsbridge

ASIC Engineer

San Jose, CA

$194K/yr

ASIC Engineer Location: San Jose, CA Duration: 6 Months Minimum Required Skills ... ASIC Design, FPGA, RTL Design, Chip Architecture, ASIC, Implementation,Synthesis /Conformal ...

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Contractual Asic Rtl Design Engineer information

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$94K

$150.2K

$202K

How much do contractual asic rtl design engineer jobs pay per year?

As of Jun 20, 2026, the average yearly pay for contractual asic rtl design engineer in the United States is $150,195.00, according to ZipRecruiter salary data. Most workers in this role earn between $131,500.00 and $180,000.00 per year, depending on experience, location, and employer.

What is the difference between Contractual Asic Rtl Design Engineer vs Digital IC Design Engineer?

AspectContractual Asic Rtl Design EngineerDigital IC Design Engineer
CredentialsBachelor's/Master's in Electrical Engineering or Computer EngineeringBachelor's/Master's in Electrical Engineering or Computer Engineering
Work EnvironmentContract-based, project-specific, often in semiconductor or tech companiesFull-time or contract, working on digital integrated circuit design
Industry UsageCommon in semiconductor, electronics, and tech firms for ASIC developmentUsed across semiconductor, consumer electronics, and communication industries

Both roles require similar educational backgrounds and work in related environments, focusing on digital circuit design. The main difference is that Contractual Asic Rtl Design Engineers typically work on specific ASIC projects on a contractual basis, while Digital IC Design Engineers may have broader responsibilities in digital chip development, often in full-time roles.

More about Contractual Asic Rtl Design Engineer jobs
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Contractual Asic Rtl Design Engineer jobs near you
Infographic showing various Contractual Asic Rtl Design Engineer job openings in the United States as of June 2026, with employment types broken down into 1% Locum Tenens, 78% Full Time, 6% Part Time, 1% Temporary, 13% Contract, and 1% Nights. Highlights an 87% Physical, 5% Hybrid, and 8% Remote job distribution, with an average salary of $150,195 per year, or $72.2 per hour.

RTL Design Engineer

Etched

Cupertino, CA

$2.0K/mo

Other

Medical, Dental, Vision

Posted 26 days ago

Job description

About Etched

Etched is building AI chips that are hard-coded for individual model architectures. Our first product (Sohu) only supports transformers, but has an order of magnitude more throughput and lower latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep chain-of-thought reasoning.

RTL Design Engineer

As an RTL Engineer at Etched, you will be critical in ensuring that our AI chips operate correctly and efficiently. You will develop and implement design verification strategies for both our existing and upcoming ASIC designs.

In this role, you will work closely with state-of-the-art architectures for machine learning. You do not need to have experience working with these yet, but you will be willing and able to learn quickly. You will work in a fast-paced environment with a high degree of autonomy, and be responsible for a key part of Etched's success.

Representative projects:

  • Implement a block to efficiently compute floating point math operators
  • Provide feedback to the uArch team to make sure blocks meet timing and area constraints

You may be a good fit if you:

  • At least 5 years of work experience in RTL development.
  • Experience with high-speed digital logic.
  • Proficiency in standard RTL design and synthesis tools
  • Familiarity with verification work and writing test benches
  • Are able to learn quickly about transformers and other aspects of modern artificial intelligence
  • Willing to start quickly

Strong candidates may also have experience with:

  • Experience with PCIe, Ethernet, or HBM technologies
  • Familiarity with transformer models and machine learning.
  • Familiarity with numerical representations and functions
  • Ability to program with Python or another scripting language

We encourage you to apply even if you do not believe you meet every single qualification.

How we're different:

Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.

We are a fully in-person team in Cupertino, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.

Benefits:

  • Full medical, dental, and vision packages, with 100% of premium covered, 90% for dependents
  • Housing subsidy of $2,000/month for those living within walking distance of the office
  • Daily lunch and dinner in our office
  • Relocation support for those moving to Cupertino

Apply