ASIC Engineer
Atlanta, GA ยท On-site
$159K/yr
Falcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design
Atlanta, GA ยท On-site
$159K/yr
Falcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design
Atlanta, GA ยท On-site
$159K/yr
Falcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design
$159K/yr
Falcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design
$159K/yr
Falcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design
Atlanta, GA ยท On-site
$159K/yr
Falcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design
Quick apply
Atlanta, GA ยท On-site
$159K/yr
Falcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design
Duluth, GA ยท On-site
$125K/yr
Mentor and train junior engineers and New College Grad engineers Qualifications * Education ... Fluent in Verilog RTL coding and ASIC design methodology * Expertise in digital design ...
Duluth, GA ยท On-site
$125K/yr
Mentor and train junior engineers and New College Grad engineers Qualifications * Education ... Fluent in Verilog RTL coding and ASIC design methodology * Expertise in digital design ...
Duluth, GA ยท On-site
$125K/yr
Mentor and train junior engineers and New College Grad engineers Qualifications * Education ... Fluent in Verilog RTL coding and ASIC design methodology * Expertise in digital design ...
Duluth, GA ยท On-site
$125K/yr
Mentor and train junior engineers and New College Grad engineers Qualifications * Education ... Fluent in Verilog RTL coding and ASIC design methodology * Expertise in digital design ...
Mentor and train junior engineers and New College Grad engineers Qualifications * Education ... Fluent in Verilog RTL coding and ASIC design methodology * Expertise in digital design ...
Quick apply
Mentor and train junior engineers and New College Grad engineers Qualifications * Education ... Fluent in Verilog RTL coding and ASIC design methodology * Expertise in digital design ...
Duluth, GA ยท On-site
$125K/yr
Mentor and train junior engineers and New College Grad engineers Qualifications * Education ... Fluent in Verilog RTL coding and ASIC design methodology * Expertise in digital design ...
Duluth, GA ยท On-site
$125K/yr
Mentor and train junior engineers and New College Grad engineers Qualifications * Education ... Fluent in Verilog RTL coding and ASIC design methodology * Expertise in digital design ...
Lincolnton, GA ยท On-site
$115K/yr
Responsibilities - Develop and extend EDA/RTL compilation tools and scripts (Python, C++, and/or ... Engineering, or Computer Science. - Demonstrated expertise in EDA toolchains, RTL design (Verilog ...
Quick apply
Lincolnton, GA ยท On-site
$115K/yr
Responsibilities - Develop and extend EDA/RTL compilation tools and scripts (Python, C++, and/or ... Engineering, or Computer Science. - Demonstrated expertise in EDA toolchains, RTL design (Verilog ...
Lincolnton, GA ยท On-site
$115K/yr
Responsibilities - Develop and extend EDA/RTL compilation tools and scripts (Python, C++, and/or ... Engineering, or Computer Science. - Demonstrated expertise in EDA toolchains, RTL design (Verilog ...
Quick apply
Lincolnton, GA ยท On-site
$115K/yr
Responsibilities - Develop and extend EDA/RTL compilation tools and scripts (Python, C++, and/or ... Engineering, or Computer Science. - Demonstrated expertise in EDA toolchains, RTL design (Verilog ...
Lincolnton, GA ยท On-site
$115K/yr
Responsibilities - Develop and extend EDA/RTL compilation tools and scripts (Python, C++, and/or ... Engineering, or Computer Science. - Demonstrated expertise in EDA toolchains, RTL design (Verilog ...
Quick apply
Lincolnton, GA ยท On-site
$115K/yr
Responsibilities - Develop and extend EDA/RTL compilation tools and scripts (Python, C++, and/or ... Engineering, or Computer Science. - Demonstrated expertise in EDA toolchains, RTL design (Verilog ...
Atlanta, GA ยท On-site
$130K/yr
Responsibilities - Develop and extend EDA/RTL compilation tools and scripts (Python, C++, and/or ... Engineering, or Computer Science. - Demonstrated expertise in EDA toolchains, RTL design (Verilog ...
Quick apply
Atlanta, GA ยท On-site
$130K/yr
Responsibilities - Develop and extend EDA/RTL compilation tools and scripts (Python, C++, and/or ... Engineering, or Computer Science. - Demonstrated expertise in EDA toolchains, RTL design (Verilog ...
Suwanee, GA ยท On-site
$150K - $200K/yr
Senior Design Engineer - Mixed-Signal (PMIC) Location: Suwanee, GA 30024 | Reporting To: Sr. ... Designing/writing microarchitecture and RTL coding using System Verilog * Implementing fine-grain ...
Quick apply
Suwanee, GA ยท On-site
$150K - $200K/yr
Senior Design Engineer - Mixed-Signal (PMIC) Location: Suwanee, GA 30024 | Reporting To: Sr. ... Designing/writing microarchitecture and RTL coding using System Verilog * Implementing fine-grain ...
Duluth, GA ยท On-site
$119K - $153K/yr
Complex Engineering Challenges. * Lead highly technical FPGA and PLD development efforts spanning architecture, RTL design, verification, certification, integration, and system-level problem solving.
Duluth, GA ยท On-site
$119K - $153K/yr
Complex Engineering Challenges. * Lead highly technical FPGA and PLD development efforts spanning architecture, RTL design, verification, certification, integration, and system-level problem solving.
Duluth, GA ยท On-site
$119K - $153K/yr
Complex Engineering Challenges. * Lead highly technical FPGA and PLD development efforts spanning architecture, RTL design, verification, certification, integration, and system-level problem solving.
Duluth, GA ยท On-site
$119K - $153K/yr
Complex Engineering Challenges. * Lead highly technical FPGA and PLD development efforts spanning architecture, RTL design, verification, certification, integration, and system-level problem solving.
Suwanee, GA ยท On-site
$140K - $180K/yr
Senior Design Engineer - Analog Location: Suwanee, GA 30024 | Reporting To: Sr. Director ... Experience with Verilog RTL coding, including synchronous and asynchronous machines * Experience ...
Quick apply
Suwanee, GA ยท On-site
$140K - $180K/yr
Senior Design Engineer - Analog Location: Suwanee, GA 30024 | Reporting To: Sr. Director ... Experience with Verilog RTL coding, including synchronous and asynchronous machines * Experience ...
Design Quality Control Engineer - Roadway In a world of possibilities, pursue one with endless ... specifications, contractual obligations, company QA/QC procedures, and industry standards.
Design Quality Control Engineer - Roadway In a world of possibilities, pursue one with endless ... specifications, contractual obligations, company QA/QC procedures, and industry standards.
Design Quality Control Engineer - Roadway In a world of possibilities, pursue one with endless ... specifications, contractual obligations, company QA/QC procedures, and industry standards.
Design Quality Control Engineer - Roadway In a world of possibilities, pursue one with endless ... specifications, contractual obligations, company QA/QC procedures, and industry standards.
... RTL and simulation assistance, system bring up and debug) * Collaborate with field and AMD Xilinx ... Experience with and understanding at systems level, FPGA and ASIC design tools. Experience with ...
... RTL and simulation assistance, system bring up and debug) * Collaborate with field and AMD Xilinx ... Experience with and understanding at systems level, FPGA and ASIC design tools. Experience with ...
... RTL and simulation assistance, system bring up and debug) * Collaborate with field and AMD Xilinx ... Experience with and understanding at systems level, FPGA and ASIC design tools. Experience with ...
... RTL and simulation assistance, system bring up and debug) * Collaborate with field and AMD Xilinx ... Experience with and understanding at systems level, FPGA and ASIC design tools. Experience with ...
Duluth, GA ยท On-site
$91K - $118K/yr
We are seeking a Project Manager / Sr Highway Design Engineer (Roadway Engineer 3) to join our ... Financial & Contractual Management Manage contracts, billing, and collections to ensure project ...
Duluth, GA ยท On-site
$91K - $118K/yr
We are seeking a Project Manager / Sr Highway Design Engineer (Roadway Engineer 3) to join our ... Financial & Contractual Management Manage contracts, billing, and collections to ensure project ...
| Aspect | Contractual Asic Rtl Design Engineer | Digital IC Design Engineer |
|---|---|---|
| Credentials | Bachelor's/Master's in Electrical Engineering or Computer Engineering | Bachelor's/Master's in Electrical Engineering or Computer Engineering |
| Work Environment | Contract-based, project-specific, often in semiconductor or tech companies | Full-time or contract, working on digital integrated circuit design |
| Industry Usage | Common in semiconductor, electronics, and tech firms for ASIC development | Used across semiconductor, consumer electronics, and communication industries |
Both roles require similar educational backgrounds and work in related environments, focusing on digital circuit design. The main difference is that Contractual Asic Rtl Design Engineers typically work on specific ASIC projects on a contractual basis, while Digital IC Design Engineers may have broader responsibilities in digital chip development, often in full-time roles.
$159K/yr
Full-time
Medical, Dental, Vision, Retirement, PTO
Re-posted 4 days ago