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Rtl Design Engineer Jobs in Georgia (NOW HIRING)

Cypress HCM

Senior Design Engineer (PMIC)

Suwanee, GA · On-site

$150K - $200K/yr

Senior Design Engineer - Mixed-Signal (PMIC) Location: Suwanee, GA 30024 | Reporting To: Sr. ... Designing/writing microarchitecture and RTL coding using System Verilog * Implementing fine-grain ...

Universal Avionics

FPGA Logic Design Manager

Duluth, GA · On-site

$119K - $153K/yr

Complex Engineering Challenges. * Lead highly technical FPGA and PLD development efforts spanning architecture, RTL design, verification, certification, integration, and system-level problem solving.

Cypress HCM

Senior Analog Design Engineer

Suwanee, GA

$140K - $180K/yr

Senior Design Engineer - Analog Location: Suwanee, GA 30024 | Reporting To: Sr. Director ... Experience with Verilog RTL coding, including synchronous and asynchronous machines * Experience ...

Falcomm

ASIC Engineer

Atlanta, GA · On-site

$159K/yr

Falcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design

Falcomm

ASIC Engineer

Atlanta, GA · On-site

$159K/yr

Falcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design

Falcomm

ASIC Engineer

Atlanta, GA · On-site

$159K/yr

Falcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design

Avnet, Inc.

Field Application Engineer

Atlanta, GA

... Design Closure, RTL and simulation assistance, system bring up and debug) * Collaborate with field and AMD Xilinx factory resources to develop and deliver technical proposals to customer project ...

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Rtl Design Engineer information

See Georgia salary details

$34.2K

$74.4K

$133.8K

How much do rtl design engineer jobs pay per year?

As of Jul 29, 2026, the average yearly pay for rtl design engineer in Georgia is $74,432.00, according to ZipRecruiter salary data. Most workers in this role earn between $57,400.00 and $83,200.00 per year, depending on experience, location, and employer.

What are the typical career growth opportunities for an RTL Design Engineer?

As an RTL Design Engineer, you can advance into roles such as Senior Design Engineer, Technical Lead, or even Design Manager as you gain experience and demonstrate strong technical expertise. Many professionals also transition into related areas such as verification engineering, system architecture, or product management. The role offers continuous learning opportunities and exposure to cutting-edge semiconductor technology, making it ideal for those interested in expanding their skillset. Career progression is often supported by successful project delivery, ongoing education, and active collaboration within multidisciplinary teams.

What are the key skills and qualifications needed to thrive in the Rtl Design Engineer position, and why are they important?

To thrive as an RTL Design Engineer, you need a strong background in digital logic design, proficiency in hardware description languages like Verilog or VHDL, and a bachelor's or master’s degree in electrical or computer engineering. Experience with industry-standard EDA tools such as Synopsys or Cadence, and knowledge of FPGA or ASIC design flow, are typically required. Strong problem-solving, teamwork, and communication skills are essential for effective collaboration with verification teams and other engineering groups. These competencies are critical to accurately translate system requirements into robust, manufacturable hardware designs within fast-paced project timelines.

What is an RTL Design Engineer job?

An RTL (Register Transfer Level) Design Engineer is responsible for designing and implementing digital circuits using hardware description languages like VHDL or Verilog. They develop and optimize high-performance, power-efficient designs for ASICs or FPGAs based on system requirements. Their role includes writing RTL code, performing simulations, debugging issues, and collaborating with verification, physical design, and architecture teams. RTL engineers ensure the design meets functional, timing, and power constraints before handing it off for further implementation.

What are the most commonly searched types of Rtl Design Engineer jobs in Georgia? The most popular types of Rtl Design Engineer jobs in Georgia are:
What are popular job titles related to Rtl Design Engineer jobs in Georgia? For Rtl Design Engineer jobs in Georgia, the most frequently searched job titles are:
What job categories do people searching Rtl Design Engineer jobs in Georgia look for? The top searched job categories for Rtl Design Engineer jobs in Georgia are:
Rtl Design Engineer jobs near you
Infographic showing various Rtl Design Engineer job openings in Georgia as of July 2026, with employment types broken down into 86% Full Time, 10% Part Time, 1% Temporary, and 3% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $74,432 per year, or $35.8 per hour.

Senior Digital Design Engineer

TRC Talent Solutions

Suwanee, GA

Full-time

Posted 2 days ago

New

Job description

The Opportunity
Our client is a globally recognized leader in memory interface and digital control technologies, with a strong presence in data center, cloud computing, and communications markets. This is a foundational growth hire for their U.S. headquarters.
The site is currently approximately 60 engineers with a strategic roadmap to scale to 250+ over the next 510 years. This offers the stability of a global leader with the "early-in" influence of a scaling site, allowing you to help shape the technical culture and mentorship of the growing team.
Summary
Theyre seeking a Senior to Staff-level Digital Design Engineer (typically 412+ years of experience) to architect and develop RTL for a range of products. This role focuses on digital control systems (PMICs) as well as clock buffers and synchronizers. The ideal candidate will have hands-on experience with the full RTL-to-GDSII flow and a desire to provide technical leadership within a growing organization.
Key Responsibilities
Contribute as an individual designer and technical mentor within a collaborative environment.
Design and implement logic and state machines using SystemVerilog/Verilog RTL.
Develop, debug, and validate RTL using industry-standard simulation, synthesis, and analysis tools (including LEC, CDC/RDC, lint, DFT, and STA).
Generate PPA (power, performance, area) estimates, schedules, and detailed RTL design specifications.
Collaborate with verification and AMS teams to ensure functionality, performance, and coverage goals are met.
Support top-level integration, including floorplanning and digital/analog co-design.
Work closely with cross-functional stakeholders to identify requirements and drive continuous improvements.

Qualifications and Skills

Experience: 412+ years of relevant industry experience in digital design (Leveling available from Senior to Staff).
Design Depth: Strong background in high-speed, low-power design using advanced deep submicron technologies.
RTL: Proficiency in SystemVerilog/Verilog for both simulation and synthesis.
Tools: Experience with industry tools such as Design Compiler and PrimeTime.
Scripting: Experience with Perl, Tcl, and/or Python.
Mindset: Strong communication skills with a proactive, ownership-driven mindset and a willingness to mentor junior talent.

Preferred Qualifications

Experience with embedded microcontrollers (e.g., RISC-V).
Knowledge of digital control circuits for PMIC applications.
Familiarity with clock buffers and synchronizers.