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Ai Chip Design Rtl Jobs in Georgia (NOW HIRING)

Cypress HCM

Senior Design Engineer (PMIC)

Suwanee, GA · On-site

$150K - $200K/yr

Designing/writing microarchitecture and RTL coding using System Verilog * Implementing fine-grain ... Floor-planning and supporting integration of digital circuits at top chip level * Collaborating ...

Cypress HCM

Senior Analog Design Engineer

Suwanee, GA · On-site

$140K - $180K/yr

Floor-planning and supporting integration of both digital and analog circuits at top chip level ... Experience with Verilog RTL coding, including synchronous and asynchronous machines * Experience ...

Rambus

SPE Analog Engineering

Johns Creek, GA · On-site

$169K - $254K/yr

Modeling of chip and block level at various levels of detail for design tradeoff analysis and ... AI and other data-intensive workloads. Our world-class team is the foundation of our company, and ...

Rambus

SPE Analog Engineering

Johns Creek, GA · Hybrid

$169K - $254K/yr

Direct chip design experience in DDR interface design is a strong plus * Experience with Verilog ... AI and other data-intensive workloads. Our world-class team is the foundation of our company, and ...

Rambus

SPE Analog Engineering

Johns Creek, GA · Hybrid

$169K - $254K/yr

Direct chip design experience in DDR interface design is a strong plus * Experience with Verilog ... AI and other data-intensive workloads. Our world-class team is the foundation of our company, and ...

Rambus.com

SPE Analog Engineering

Johns Creek, GA · On-site

$169 - $254/hr

Direct chip design experience in DDR interface design is a strong plus * Experience with Verilog ... AI and other data-intensive workloads. Our world-class team is the foundation of our company, and ...

Falcomm

ASIC Engineer

Atlanta, GA · On-site

$159K/yr

... system-on-chip platforms. The position requires strong collaboration with RFIC, analog ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design

Falcomm

ASIC Engineer

Atlanta, GA

$159K/yr

... system-on-chip platforms. The position requires strong collaboration with RFIC, analog ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design

Falcomm

ASIC Engineer

Atlanta, GA · On-site

$159K/yr

... system-on-chip platforms. The position requires strong collaboration with RFIC, analog ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design

Rambus

Technical Director Validation

Johns Creek, GA · On-site

$160K - $298K/yr

Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional ... Work with silicon design teams to develop experiments, drive data collection, and present results ...

Rambus

Technical Director Validation

Johns Creek, GA · Hybrid

$160K - $298K/yr

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Technical ... Work with silicon design teams to develop experiments, drive data collection, and present results ...

Rambus

Technical Director Validation

Johns Creek, GA · Hybrid

$160K - $298K/yr

Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional ... Work with silicon design teams to develop experiments, drive data collection, and present results ...

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Ai Chip Design Rtl information

What is an AI Chip Design RTL engineer?

AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.

What skills and qualifications are needed to thrive as an AI Chip Design RTL engineer?

To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.

What are common challenges faced by AI Chip Design RTL engineers during the verification process?

AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.

What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?

AspectAi Chip Design RtlAi Chip Verification Engineer
Primary FocusDeveloping and implementing Register Transfer Level (RTL) code for AI chipsVerifying and validating RTL designs to ensure functionality
Skills RequiredHDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledgeSimulation, testbench creation, debugging, scripting skills
Work EnvironmentDesign teams, hardware development labs, EDA toolsVerification teams, simulation environments, test setups
CertificationsHardware design certifications, FPGA/ASIC trainingVerification methodologies, UVM, SystemVerilog certifications

While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.

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Ai Chip Design Rtl jobs near you

ML Software Engineer Intern - AI/CAD Integration

Atlanta, GA • On-site

Falcomm
See more jobs at Falcommexternal

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Re-posted 20 days ago

Job description

Are you passionate about applying machine learning to transform the future of semiconductor design? At Falcomm, we are on a mission to revolutionize semiconductor technologies by integrating AI-driven solutions into the design and development of our energy-efficient power amplifier products. As a ML Software Engineer Intern in AI/CAD Integration, you will collaborate with our team of experts to develop and deploy AI/ML models that enhance CAD workflows, automate design processes, and accelerate innovation in RFIC design. This role offers a unique opportunity to work at the intersection of software engineering, machine learning, and semiconductor design, contributing directly to tools and methodologies that drive next-generation hardware solutions.
We are seeking an intern who thrives in a fast-paced environment, is eager to tackle complex technical challenges, and is motivated to turn AI research into practical engineering solutions. If you have a strong foundation in machine learning, software development, and a desire to apply these skills to advance semiconductor innovation, we invite you to join us. At Falcomm, your creativity and technical expertise will help shape energy-efficient technologies that set new industry standards.
Responsibilities
  • Design and implement code for training/serving ML models in chip design workflows
  • Automate creation of large datasets for training models
  • Integrate ML models into existing chip design software infrastructure
  • Write comprehensive tests and documentation
  • Collaborate with engineers to understand model requirements and deployment needs
  • Participate in code reviews and follow software engineering best practices
  • Research and evaluate new technologies for ML model serving and deployment

Requirements
  • Currently pursuing a degree in Computer Science, Electrical Engineering, or related field
  • Availability to work at least part-time starting in Fall 2026
  • Strong Python programming skills with experience in scripting and automation
  • Understanding of software engineering principles and code organization
  • Experience with data processing libraries (pandas, numpy, scipy)
  • Familiarity with machine learning frameworks (PyTorch, TensorFlow, scikit-learn)
  • Basic understanding of file I/O, data parsing, and format conversion
  • Experience with version control systems (Git) and collaborative development

Preferred Skills
  • Exposure to CAD tools or EDA software (Cadence, Synopsys, Mentor Graphics, etc.)
  • Knowledge of chip design file formats (GDSII, LEF/DEF, Verilog, SPICE)
  • Experience with shell scripting (bash) and command-line tools
  • Understanding of semiconductor design concepts
  • Familiarity with Linux environments
  • Experience with workflow automation and batch processing systems
  • Knowledge of data visualization tools (matplotlib, plotly) for design analysis
  • Understanding of software testing frameworks and debugging techniques

Benefits
  • Competitive Salary
  • Sick Leave

DISCLOSURE
  • Falcomm is an Equal Opportunity Employer; employment with Falcomm is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
  • Applicants wishing to view a copy of Falcomm's Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should notify Falcomm.
  • To conform to U.S. Government export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State.

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