Chandler, AZ · On-site
$133K/yr
Senior Digital Design Engineer Primary Location: Chandler, Arizona, USA Role Summary: * Lead ... Drive product execution from concept through RTL development, integration, silicon validation ...
Chandler, AZ · On-site
$133K/yr
Senior Digital Design Engineer Primary Location: Chandler, Arizona, USA Role Summary: * Lead ... Drive product execution from concept through RTL development, integration, silicon validation ...
Chandler, AZ · On-site
$133K/yr
Senior Digital Design Engineer Primary Location: Chandler, Arizona, USA Role Summary: * Lead ... Drive product execution from concept through RTL development, integration, silicon validation ...
Chandler, AZ · On-site
$133K/yr
Senior Digital Design Engineer Primary Location: Chandler, Arizona, USA Role Summary: * Lead ... Drive product execution from concept through RTL development, integration, silicon validation ...
Chandler, AZ · On-site
$136K - $167K/yr
Strong proficiency in Verilog and/or SystemVerilog for synthesizable RTL design. * Strong ... Ability to work closely with hardware, firmware, software, ASIC, analog, verification, and ...
Chandler, AZ · On-site
$136K - $167K/yr
Strong proficiency in Verilog and/or SystemVerilog for synthesizable RTL design. * Strong ... Ability to work closely with hardware, firmware, software, ASIC, analog, verification, and ...
Chandler, AZ · On-site
$136K - $167K/yr
Strong proficiency in Verilog and/or SystemVerilog for synthesizable RTL design. * Strong ... Ability to work closely with hardware, firmware, software, ASIC, analog, verification, and ...
Chandler, AZ · On-site
$136K - $167K/yr
Strong proficiency in Verilog and/or SystemVerilog for synthesizable RTL design. * Strong ... Ability to work closely with hardware, firmware, software, ASIC, analog, verification, and ...
Chandler, AZ · On-site
$120 - $150/hr
## Staff Digital Design Engineer (AI/ML)Applylocations: US, AZ, Chandler, East Elliotposted on: Posted ... Execute RTL design, coding, and optimization in Verilog/SystemVerilog for performance, area, and ...
Chandler, AZ · On-site
$120 - $150/hr
## Staff Digital Design Engineer (AI/ML)Applylocations: US, AZ, Chandler, East Elliotposted on: Posted ... Execute RTL design, coding, and optimization in Verilog/SystemVerilog for performance, area, and ...
Chandler, AZ · On-site
$101K - $136K/yr
Strong digital design engineer with FPGA/ASIC SoC design experience * Strong FPGA Implementation ... Capable of creating RTL simulations to identify and resolve most issues before hardware tests
Quick apply
Chandler, AZ · On-site
$101K - $136K/yr
Strong digital design engineer with FPGA/ASIC SoC design experience * Strong FPGA Implementation ... Capable of creating RTL simulations to identify and resolve most issues before hardware tests
Chandler, AZ · On-site
$101K - $136K/yr
Strong digital design engineer with FPGA/ASIC SoC design experience * Strong FPGA Implementation ... Capable of creating RTL simulations to identify and resolve most issues before hardware tests
Chandler, AZ · On-site
$101K - $136K/yr
Strong digital design engineer with FPGA/ASIC SoC design experience * Strong FPGA Implementation ... Capable of creating RTL simulations to identify and resolve most issues before hardware tests
Gilbert, AZ · On-site
$98K - $147K/yr
HDL design for FPGA and/or ASIC applications FPGA/ASIC verification via simulation and emulation ... RTL design for an aerospace environment or space application Proficient in FPGA design flow ...
Gilbert, AZ · On-site
$98K - $147K/yr
HDL design for FPGA and/or ASIC applications FPGA/ASIC verification via simulation and emulation ... RTL design for an aerospace environment or space application Proficient in FPGA design flow ...
Gilbert, AZ · On-site
$98K - $147K/yr
HDL design for FPGA and/or ASIC applications * FPGA/ASIC verification via simulation and emulation ... Experience in RTL design for an aerospace environment or space application * Proficient in FPGA ...
Gilbert, AZ · On-site
$98K - $147K/yr
HDL design for FPGA and/or ASIC applications * FPGA/ASIC verification via simulation and emulation ... Experience in RTL design for an aerospace environment or space application * Proficient in FPGA ...
Gilbert, AZ · On-site
$98K - $147K/yr
HDL design for FPGA and/or ASIC applications * FPGA/ASIC verification via simulation and emulation ... Experience in RTL design for an aerospace environment or space application * Proficient in FPGA ...
Gilbert, AZ · On-site
$98K - $147K/yr
HDL design for FPGA and/or ASIC applications * FPGA/ASIC verification via simulation and emulation ... Experience in RTL design for an aerospace environment or space application * Proficient in FPGA ...
Proficient in RTL design (Verilog/System Verilog), Low-power design, synthesis, timing constraint ... Experience with ASIC design flow including LINT, Formal, CDC/RDC, power estimations, MBIST/DFT ...
Proficient in RTL design (Verilog/System Verilog), Low-power design, synthesis, timing constraint ... Experience with ASIC design flow including LINT, Formal, CDC/RDC, power estimations, MBIST/DFT ...
Chandler, AZ · On-site
$206K/yr
Semiconductor / ASIC / SoC Job Summary We are seeking an experienced Mixed-Signal Analog Design Engineer for a high-priority semiconductor engineering opportunity in Chandler, AZ . The ideal ...
Chandler, AZ · On-site
$206K/yr
Semiconductor / ASIC / SoC Job Summary We are seeking an experienced Mixed-Signal Analog Design Engineer for a high-priority semiconductor engineering opportunity in Chandler, AZ . The ideal ...
As a Principal Digital Design Engineer, you will lead the architecture and implementation of ... Lead RTL design, coding, and optimization in Verilog/SystemVerilog for performance, area, and power ...
As a Principal Digital Design Engineer, you will lead the architecture and implementation of ... Lead RTL design, coding, and optimization in Verilog/SystemVerilog for performance, area, and power ...
Phoenix, AZ · On-site
... and ASIC/Foundry products.Partner closely with Architecture, Circuit Design, RTL Design ... Stakeholder EngagementCommunicate effectively with senior engineering leaders, product teams, and ...
Phoenix, AZ · On-site
... and ASIC/Foundry products.Partner closely with Architecture, Circuit Design, RTL Design ... Stakeholder EngagementCommunicate effectively with senior engineering leaders, product teams, and ...
Chandler, AZ · On-site
$133K/yr
Work closely with Analog and Verification engineers to deliver high-quality silicon solutions ... SystemVerilog RTL for digital CMOS circuit design. * Strong understanding of ASIC design ...
Chandler, AZ · On-site
$133K/yr
Work closely with Analog and Verification engineers to deliver high-quality silicon solutions ... SystemVerilog RTL for digital CMOS circuit design. * Strong understanding of ASIC design ...
Chandler, AZ · On-site +1
$133K/yr
Work closely with Analog and Verification engineers to deliver high-quality silicon solutions ... SystemVerilog RTL for digital CMOS circuit design. * Strong understanding of ASIC design ...
Quick apply
Chandler, AZ · On-site +1
$133K/yr
Work closely with Analog and Verification engineers to deliver high-quality silicon solutions ... SystemVerilog RTL for digital CMOS circuit design. * Strong understanding of ASIC design ...
Chandler, AZ · On-site +1
$133K/yr
Work closely with Analog and Verification engineers to deliver high-quality silicon solutions ... SystemVerilog RTL for digital CMOS circuit design. * Strong understanding of ASIC design ...
Chandler, AZ · On-site +1
$133K/yr
Work closely with Analog and Verification engineers to deliver high-quality silicon solutions ... SystemVerilog RTL for digital CMOS circuit design. * Strong understanding of ASIC design ...
Tempe, AZ · On-site
$164K - $246K/yr
Develop, simulate, and verify FPGA RTL (using SystemVerilog, Verilog, or VHDL) for control, data ... Design high-speed interfaces (DDR4, SERDES, UART, I2C, SPI, LVDS) and perform signal/power ...
Tempe, AZ · On-site
$164K - $246K/yr
Develop, simulate, and verify FPGA RTL (using SystemVerilog, Verilog, or VHDL) for control, data ... Design high-speed interfaces (DDR4, SERDES, UART, I2C, SPI, LVDS) and perform signal/power ...
Tucson, AZ · On-site
$120 - $180/hr
We are seeking a highly motivated and versatile engineer to join our dynamic Current Sensing ... Contribute to the full IC development lifecycle, including RTL design, synthesis, place and route ...
Tucson, AZ · On-site
$120 - $180/hr
We are seeking a highly motivated and versatile engineer to join our dynamic Current Sensing ... Contribute to the full IC development lifecycle, including RTL design, synthesis, place and route ...
As a Principal Digital Design Engineer, you will lead the architecture and implementation of ... Lead RTL design, coding, and optimization in Verilog/SystemVerilog for performance, area, and power ...
As a Principal Digital Design Engineer, you will lead the architecture and implementation of ... Lead RTL design, coding, and optimization in Verilog/SystemVerilog for performance, area, and power ...
| Aspect | Contractual Asic Rtl Design Engineer | Digital IC Design Engineer |
|---|---|---|
| Credentials | Bachelor's/Master's in Electrical Engineering or Computer Engineering | Bachelor's/Master's in Electrical Engineering or Computer Engineering |
| Work Environment | Contract-based, project-specific, often in semiconductor or tech companies | Full-time or contract, working on digital integrated circuit design |
| Industry Usage | Common in semiconductor, electronics, and tech firms for ASIC development | Used across semiconductor, consumer electronics, and communication industries |
Both roles require similar educational backgrounds and work in related environments, focusing on digital circuit design. The main difference is that Contractual Asic Rtl Design Engineers typically work on specific ASIC projects on a contractual basis, while Digital IC Design Engineers may have broader responsibilities in digital chip development, often in full-time roles.
The most popular types of Asic Rtl Design Engineer jobs in Arizona are:
For Contractual Asic Rtl Design Engineer jobs in Arizona, the most frequently searched job titles are:
The top searched job categories for Contractual Asic Rtl Design Engineer jobs in Arizona are:
Cities in Arizona with the most Contractual Asic Rtl Design Engineer job openings:
$133K/yr
Full-time
Posted 23 days ago
Review product requirements, IP architecture specifications, programming models, microarchitecture, interfaces, and implementation plans for automotive and industrial PMIC applications.
Lead digital design activities from architecture definition through RTL development, integration, synthesis, timing closure, low-power implementation, silicon bring-up, and production release.
Drive verification strategy and execution, including test planning, simulation, formal verification, coverage analysis, regression management, and achievement of quality standards.
Job Title: Senior Digital Design Engineer
Primary Location: Chandler, Arizona, USA
Role Summary:
Lead digital architecture, design, verification, and implementation of next-generation Power Management ICs (PMICs) for automotive and industrial applications.
Drive product execution from concept through RTL development, integration, silicon validation, qualification, and production release.
Collaborate across analog, verification, validation, subsystem, SoC, applications, systems, product definition, and customer-facing teams to deliver high-quality mixed-signal solutions.
Job Responsibility:
Review product requirements, IP architecture specifications, programming models, microarchitecture, interfaces, and implementation plans for automotive and industrial PMIC applications.
Define and implement digital architectures for mixed-signal PMICs, ensuring alignment with system, performance, quality, reliability, safety, power, and area requirements.
Lead digital design activities from architecture definition through RTL development, integration, synthesis, timing closure, low-power implementation, silicon bring-up, and production release.
Design and develop digital control, monitoring, telemetry, diagnostics, configuration, protection, power sequencing, and fault management functions for PMIC and power conversion products.
Develop and review RTL, microarchitecture, and design specifications using Verilog/SystemVerilog and industry-standard design and quality checking tools.
Drive verification strategy and execution, including test planning, simulation, formal verification, coverage analysis, regression management, and achievement of NXP quality and maturity standards.
Deliver complete IP solutions, including RTL, verification collateral, supporting documentation, and requirements traceability from specification through implementation.
Track development metrics including milestones, code and functional coverage, defect resolution, and compliance with design requirements.
Support silicon debug, characterization, qualification, reliability validation, and production ramp activities.
Mentor junior engineers and drive continuous improvement in design methodologies, automation flows, and engineering best practices.
Job Qualification:
M.S. in Electrical Engineering, Computer Engineering, or a related field required.
Minimum 10 years of experience in digital IC design and development, including technical leadership and architecture responsibilities.
Strong understanding of digital design fundamentals, finite state machines, clock-domain crossing, reset architecture, and low-power design techniques.
Expertise in RTL design using Verilog/SystemVerilog for complex digital and mixed-signal ICs.
Experience with synthesis, static timing analysis, equivalence checking, DFT, and physical implementation flows.
Strong knowledge of modern verification methodologies, including UVM, assertions, formal verification, and coverage-driven verification.
Experience developing digital controllers for PMICs, power management systems, automotive electronics, or industrial applications is highly desirable.
Proficiency with industry-standard EDA tools from Cadence, Synopsys, and Siemens EDA.
Strong analytical and problem-solving skills with the ability to develop innovative solutions for complex technical challenges.
Excellent written and verbal communication skills with proven ability to lead cross-functional teams in a fast-paced product development environment.
NXP Introduction:
NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets.
For more information, please visit our website https://www.nxp.com
Career Development Opportunities
Bright Minds. Bright Futures.
We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills.
Visit our careers website for more job information.
Commitment At NXP.
We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality. Diversity, Equality and Inclusion | NXP Semiconductors
More information about NXP in the United States...
NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.
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