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Asic Jobs (NOW HIRING)

Meta

ASIC Engineer, Power

Sunnyvale, CA · On-site +1

$146K/yr

As an ASIC Engineer specializing in power on the EDA Infrastructure team, you will develop and maintain power analysis and optimization flows that enable silicon engineers across the organization to ...

Meta

ASIC Engineer, Power

Austin, TX · On-site +1

$146K/yr

As an ASIC Engineer specializing in power on the EDA Infrastructure team, you will develop and maintain power analysis and optimization flows that enable silicon engineers across the organization to ...

Purple Hires Inc

ASIC DFT Engineer

Plano, TX · Remote

Lead ASIC DFT Engineer Location: Remote, (Onsite) Duration: Contract Year of Exp: 8+ yrs to 15 yrs. We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and ...

Meta

ASIC Engineer, Architecture

Austin, TX

$114K/yr

As an ASIC Engineer specializing in architecture, performance and modeling, you will define and drive the architectural performance analysis, pre-silicon modeling, and microarchitectural exploration ...

The PJF Group

Senior ASIC Engineer

Bodega Bay, CA

Why is This a Great Opportunity Leading custom ASIC and SoC development company with a pipeline of new technology projects for top companies. Employees are real contributors, often working ...

Purple Hires Inc

ASIC Engineer - Remote

Plano, TX · Remote

Key skills for Lead ASIC DFT: please see these key words of in the project description for the profile consideration. "SCAN, ATPG, MBIST, Timing Simulations, SDF, SDC , PSV, Diagnosys , Pattern ...

Meta

ASIC Engineer, Architecture

Sunnyvale, CA

$178K/yr

As an ASIC Engineer specializing in performance and modeling, you will define and drive the architectural performance analysis, pre-silicon modeling, and microarchitectural exploration of custom ...

Meta

ASIC Engineer, Architecture

Austin, TX

$178K/yr

As an ASIC Engineer specializing in performance and modeling, you will define and drive the architectural performance analysis, pre-silicon modeling, and microarchitectural exploration of custom ...

Meta

ASIC Engineer, Architecture

Sunnyvale, CA

$146K/yr

As an ASIC Engineer specializing in architecture, performance and modeling, you will define and drive the architectural performance analysis, pre-silicon modeling, and microarchitectural exploration ...

Meta

ASIC Engineer, Architecture

Austin, TX

$146K/yr

As an ASIC Engineer specializing in architecture, performance and modeling, you will define and drive the architectural performance analysis, pre-silicon modeling, and microarchitectural exploration ...

Meta

ASIC Engineer, Architecture

Sunnyvale, CA

$114K/yr

As an ASIC Engineer specializing in architecture, performance and modeling, you will define and drive the architectural performance analysis, pre-silicon modeling, and microarchitectural exploration ...

Purple Hires Inc

ASIC DFT Engineer

Irvine, CA · On-site

Key skills for Lead ASIC DFT: please see these key words of in the project description for the profile consideration. "SCAN, ATPG, MBIST, Timing Simulations, SDF, SDC , PSV, Diagnosys , Pattern ...

The PJF Group

Senior ASIC Engineer

Bodega Bay, CA

$180K - $230K/yr

Why is This a Great Opportunity Leading custom ASIC and SoC development company with a pipeline of new technology projects for top companies. Employees are real contributors, often working ...

Fusion408

Principal ASIC Design Engineer

Carlsbad, CA · On-site

Principal ASIC Design Engineer Description: Expertise in at least 3 of the following: communication system design, RF radio design, digital ASIC design, applications platforms, and semiconductor ...

Pow.bio

Principal ASIC Design Engineer

Boulder, CO · On-site

$180 - $220/hr

Atom Computing is seeking a Principal ASIC Designer to lead the development of critical technologies that power our quantum computers. In this role, you will own end-to-end design strategy--from ...

New

Purple Hires Inc

Lead ASIC DFT Engineer

Plano, TX · Remote

Key skills for Lead ASIC DFT: please see these key words of in the project description for the profile consideration. "SCAN, ATPG, MBIST, Timing Simulations, SDF, SDC , PSV, Diagnosys , Pattern ...

Fusion408

Principal ASIC Design Engineer

Carlsbad, CA · On-site

Principal ASIC Design Engineer Description: Expertise in at least 3 of the following: communication system design, RF radio design, digital ASIC design, applications platforms, and semiconductor ...

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Asic information

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$94K

$150.2K

$202K

How much do asic jobs pay per year?

As of Aug 7, 2026, the average yearly pay for asic in the United States is $150,195.00, according to ZipRecruiter salary data. Most workers in this role earn between $131,500.00 and $180,000.00 per year, depending on experience, location, and employer.

What are some common challenges faced by ASIC engineers during the chip design and verification process?

ASIC engineers often encounter challenges such as balancing power, performance, and area constraints while meeting tight project deadlines. Ensuring design correctness through thorough verification and debugging complex issues can be demanding, especially when integrating multiple IP blocks. Collaboration with cross-functional teams—including hardware, software, and test engineers—is essential to resolve challenges efficiently. Staying updated with evolving EDA tools and methodologies also plays a key role in overcoming these hurdles.

What is the difference between Asic vs FPGA Engineer?

AspectAsicFPGA Engineer
Required CredentialsBachelor's or higher in Electrical Engineering, VLSI Design, or related fields; certifications like Certified FPGA Designer are commonSimilar educational background; often the same certifications apply, especially in digital design
Work EnvironmentDesigning and developing custom integrated circuits in a semiconductor lab or design houseDeveloping programmable logic solutions using FPGA boards in labs or on-site environments
Industry UsageUsed in high-volume, performance-critical applications like consumer electronics, automotive, and telecommunicationsCommon in prototyping, testing, and specialized applications requiring flexibility

In summary, Asic and FPGA engineers share similar educational backgrounds and certifications. Asic engineers focus on designing custom chips for high-volume applications, while FPGA engineers work on programmable logic devices for flexible, rapid prototyping and testing. Both roles are vital in the semiconductor and electronics industries, often overlapping in skills and tools used.

What is an ASIC engineer?

ASIC engineers are professionals who design, develop, and test Application-Specific Integrated Circuits (ASICs). These are specialized microchips created for a particular application or product, such as smartphones, networking equipment, or automotive systems. ASIC engineers work on the entire chip design process, including architecture, logic design, verification, and sometimes physical layout. Their expertise ensures that the chips are efficient, reliable, and tailored to meet specific performance requirements.

What are the key skills and qualifications needed to thrive as an ASIC engineer, and why are they important?

To thrive as an ASIC Engineer, you need a solid background in electrical or computer engineering, digital design, and experience with hardware description languages like Verilog or VHDL. Familiarity with EDA tools such as Cadence or Synopsys and relevant certifications (e.g., in ASIC design or verification) are highly valuable. Strong analytical thinking, attention to detail, and effective teamwork skills set top performers apart in this role. These competencies are crucial for developing reliable, high-performance chips that meet complex specifications and project goals.

Is ASIC a good career?

ASIC (Application-Specific Integrated Circuit) design and engineering is a specialized field within electronics and semiconductor industries. It offers opportunities for high technical skill development, competitive salaries, and involvement in cutting-edge technology, but it often requires strong knowledge of digital design, hardware description languages, and industry certifications. The career can be rewarding for those interested in hardware development and engineering innovation.
More about Asic jobs
What cities are hiring for Asic jobs? Cities with the most Asic job openings:
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Asic jobs near you
Infographic showing various Asic job openings in the United States as of August 2026, with employment types broken down into 95% Full Time, 1% Part Time, and 4% Contract. Highlights an 87% Physical, 7% Hybrid, and 6% Remote job distribution, with an average salary of $150,195 per year, or $72.2 per hour.

ASIC Engineer, Power

Meta

Sunnyvale, CA • On-site, Remote

$146K/yr

Full-time

Posted 11 days ago

Meta rating

7.8

Company rating: 7.8 out of 10

Based on 45 frontline employees who took The Breakroom Quiz

137th of 242 rated software companies

Job description

Meta is building custom silicon to power the infrastructure that underlies its family of products and services. As an ASIC Engineer specializing in power on the EDA Infrastructure team, you will develop and maintain power analysis and optimization flows that enable silicon engineers across the organization to accurately model, estimate, and reduce power consumption in custom ASIC designs. In this role, you will work at the intersection of EDA tooling, physical design, and power methodology, helping to define the infrastructure that shapes how Meta's next-generation chips are designed and verified.
ASIC Engineer, Power Responsibilities:
  • Develop and maintain power analysis flows including dynamic and static power estimation, vectorless analysis, and power intent verification using industry-standard EDA tools
  • Define and implement power methodology guidelines for RTL, synthesis, and physical design stages of the ASIC development flow
  • Collaborate with RTL design, physical design, and verification teams to identify and resolve power hotspots and inefficiencies across custom ASIC designs
  • Build and optimize EDA infrastructure scripts and automation frameworks to improve power signoff accuracy and turnaround time
  • Evaluate and integrate commercial and internally developed EDA tools into the power analysis flow, providing technical assessments and recommendations
  • Develop power intent specifications using UPF or CPF and ensure consistent application across design and implementation stages
  • Establish power budgets and track power metrics across design milestones, communicating results and risks to cross-functional stakeholders
  • Drive continuous improvement of power closure methodologies by analyzing results across multiple tape-outs and identifying systemic opportunities
  • Provide technical guidance to other engineers on power analysis best practices, flow usage, and debug techniques
  • Partner with EDA tool vendors to evaluate new capabilities and influence tool roadmaps to meet Meta silicon design requirements

Minimum Qualifications:
  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
  • 6+ years of experience in ASIC design or physical design with a focus on power analysis, power optimization, or power signoff
  • Experience developing or maintaining EDA flows for power analysis using tools such as Synopsys PrimePower, Cadence Voltus, or equivalent
  • Experience with power intent specification languages such as UPF or CPF and their application across RTL-to-GDSII flows
  • Experience scripting in Python, Tcl, or shell to build and automate EDA infrastructure workflows
  • Experience collaborating across RTL design, physical design, and verification disciplines to drive power closure on complex ASIC designs

Preferred Qualifications:
  • Experience evaluating and qualifying new EDA tools or methodologies in a production silicon environment
  • Familiarity with custom or semi-custom design flows for high-performance computing or data center silicon
  • Experience with low-power design techniques including clock gating, power gating, multi-voltage domain design, and dynamic voltage and frequency scaling
  • Background in developing internal EDA infrastructure tooling or flow automation at scale across multiple concurrent design projects

About Meta:
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.
$146,000/year to $209,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.

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