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Altera Jobs (NOW HIRING)

Altera

FPGA Compiler (Placer) Engineer

San Jose, CA · On-site

$152K - $195K/yr

About Altera At Altera, our independence as the world's largest pureplay FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of ...

Altera

Digital Marketing Manager

San Jose, CA · On-site

Altera is seeking a Digital Marketing Manager to lead the strategy, design, delivery, and ongoing optimization of Altera.com. In this highly cross-functional role, you will shape the digital ...

Altera

FPGA Customer Quality Engineer

San Jose, CA · On-site

$118.90 - $210/hr

About Altera**At AlteraTM, our independence as the world's largest pure‐play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four ...

Altera

Senior Design Verification Engineer

San Jose, CA · On-site

$142K - $206K/yr

Altera is responsible for High-Speed Protocol IP development, which includes participating in high-level product specifications, logic/RTL design and implementation, RTL verification, IP FPGA ...

Altera Corporation

$266 - $392/hr

Altera Corporation is seeking a highly experienced Sr. Field Sales Manager to lead strategic customer relationships with Tier 1 and major OEM accounts in the Bay Area. This is a high-impact ...

New

Altera

FPGA System Design Engineer

San Jose, CA · On-site

$118K - $172K/yr

Altera is seeking a highly motivated FPGA System Design Engineer to join our Aerospace, Defense, and Government (ADG) solutions team. In this role, you will work directly with strategic customers to ...

Altera

$134K - $195K/yr

For decades, Altera has been at the forefront of programmable logic technology. Our commitment to innovation has empowered countless customers to create groundbreaking solutions that have transformed ...

Altera

FP&A Manager

San Jose, CA · On-site

$149.10 - $215.90/hr

Altera, a leader in programmable logic solutions, is seeking a strategic and results-driven FP&A Manager to join our finance team! This role will be instrumental in driving financial performance ...

Altera

Senior Field Sales Manager

San Jose, CA · On-site

Altera Corporation is seeking a highly experienced Sr. Field Sales Manager to lead strategic customer relationships with Tier 1 and major OEM accounts in the Bay Area. This is a high-impact ...

New

Altera

Engineering/IT Specialist

San Jose, CA · On-site

$166K - $235K/yr

About Altera At Altera, our independence as the world's largest pureplay FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of ...

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How much do altera jobs pay per year?

As of Aug 22, 2026, the average yearly pay for altera in the United States is $212,138.00, according to ZipRecruiter salary data. Most workers in this role earn between $188,500.00 and $233,000.00 per year, depending on experience, location, and employer.

What is an Altera job?

An Altera job typically refers to roles related to Altera, a company specializing in programmable logic devices, now part of Intel. Positions may include FPGA design engineers, software developers, or hardware engineers working on field-programmable gate arrays (FPGAs) and other semiconductor technologies. These roles often involve developing, testing, and optimizing digital circuits and systems. Employees in Altera-related jobs work on cutting-edge technology for industries like telecommunications, automotive, and data centers.

What are the key skills and qualifications needed to thrive as an Altera (now Intel FPGA) engineer, and why are they important?

To succeed as an Altera (Intel FPGA) Engineer, you need a solid background in digital logic design, hardware description languages (HDLs) like VHDL or Verilog, and a relevant degree in electrical or computer engineering. Familiarity with Altera Quartus Prime software, ModelSim, and FPGA development boards is typically required, along with certifications in FPGA design being advantageous. Strong problem-solving skills, attention to detail, and effective collaboration set standout professionals apart in this field. These skills and qualifications enable engineers to efficiently develop, test, and implement reliable FPGA solutions for complex hardware applications.

What are some common challenges faced by Altera FPGA engineers during the development cycle?

Altera FPGA engineers often encounter challenges related to optimizing code for performance and resource utilization, especially when working with complex designs or tight timing constraints. Debugging and verifying designs can also be demanding, as issues may only become apparent during hardware testing. Collaboration with hardware and software teams is essential to ensure smooth integration, which requires strong communication and documentation skills. Staying updated with evolving toolchains and new device architectures is also important for success in this role.
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Infographic showing various Altera job openings in the United States as of August 2026, with employment types broken down into 100% Full Time. Highlights an 100% In-person job distribution, with an average salary of $212,138 per year, or $102 per hour.

FPGA Compiler (Placer) Engineer

Altera

San Jose, CA • On-site

$152K - $195K/yr

Full-time

Re-posted 29 days ago

Job description

Job Details:Job Description:

About Altera

At Altera, our independence as the world's largest pureplay FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industryleading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely-empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.

Position Overview

Altera is a leader in FPGA innovation, delivering programmable solutions that power AI, cloud computing, networking, and edge applications. Our compiler and tools teams are central to enabling customers to efficiently map complex designs onto advanced FPGA architectures.

Altera is seeking a FPGA Compiler Engineer (Placer) to join our Compiler team in San Jose, CA. This role focuses on developing and optimizing FPGA placement algorithms within the compiler toolchain, directly impacting performance, power efficiency, and overall design quality.

The ideal candidate brings strong expertise in EDA algorithms, large-scale system optimization, and FPGA/ASIC physical design flows, along with a passion for solving complex, performance-critical problems.

Key Responsibilities:

  • Placement Algorithm Development:
    Design, implement, and enhance FPGA placement algorithms to optimize timing, congestion, and resource utilization.

  • Compiler Flow Enhancement:
    Contribute to the end-to-end FPGA compilation flow, working closely with routing, synthesis, and timing teams.

  • Performance Optimization:
    Improve runtime performance, scalability, and quality of results (QoR) for large and complex customer designs.

  • Timing-Driven Placement:
    Develop and refine timing-aware placement strategies to support high-frequency, performance-critical designs.

  • Cross-Functional Collaboration:
    Partner with architecture, routing, and STA teams to align placement strategies with FPGA device capabilities and constraints.

  • Debug & Analysis:
    Analyze placement quality, congestion hotspots, and timing bottlenecks; drive improvements to convergence and design closure.

  • Toolchain Integration:
    Integrate new placement capabilities into the compiler infrastructure and validate across diverse workloads.

Why Join Altera?

  • Work on core compiler technology that directly impacts FPGA performance and usability

  • Solve challenging algorithmic problems at scale

  • Collaborate with world-class teams across architecture, silicon, and software

Salary

The pay range below is for Bay Area California only. Actual salary may vary based ona number offactors including job location, job-related knowledge, skills, experiences,trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.

$149.1K- $215.9KUSD

We use artificial intelligence to screen, assess, or select applicants for the position.Applicants must be eligible for any required U.S. export authorizations.

#CG-1

Qualifications:

Minimum Qualifications:

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.

  • 6+ years of experience in FPGA/ASIC CAD, EDA tools, or related fields.

  • Experience in algorithms and data structures (optimization, graph theory, heuristics)

  • Experience with placement algorithms or physical design flows

  • Experience in C/C++ and software engineering best practices

  • Experience with placement techniques (analytical placement, simulated annealing, partitioning, clustering)

  • Experience with Timing-driven and congestion-driven optimization

  • Experience in ASIC or FPGA physical design methodologies

  • Experience in solving complex, large-scale optimization problems with high performance and scalability requirements.

Preferred Qualifications

  • Experience with FPGA toolchains (e.g., Quartus, Vivado)

  • Knowledge of FPGA architectures and interconnect fabrics

  • Familiarity with routing and timing closure techniques

  • Experience with parallel or distributed algorithms for EDA tools

  • Scripting experience (e.g., Python, Tcl) for tooling and automation

Job Type: RegularShift:Shift 1 (United States of America)Primary Location:San Jose, California, United StatesAdditional Locations:Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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