What does a full time physical verification engineer do?

A Full Time Physical Verification Engineer is responsible for ensuring that integrated circuit (IC) designs meet all manufacturing requirements before production. Their main tasks include running design rule checks (DRC), layout versus schematic (LVS) checks, and electrical rule checks (ERC) to verify that the physical layout matches the intended circuit and adheres to foundry specifications. They work closely with design, layout, and fabrication teams to identify and resolve any issues that could affect chip functionality or yield. Attention to detail and proficiency with electronic design automation (EDA) tools are essential for this role.