TSMC

60 Tsmc Physical Design Engineer Jobs Hiring Near You

Physical Design Engineer (7452)

San Jose, CA · On-site

$155.70K - $160.30K/yr

Drive the end-to-end physical implementation and tapeout of test vehicles on TSMC's leading-edge ... design cycle. Minimum Qualifications * Master's Degree or higher in Electrical Engineering or ...

Senior Physical Design Engineer(7051)

San Jose, CA · Hybrid

$155.70K - $160.30K/yr

Overview of Role As a Senior Physical Design Engineer, you will be responsible for the physical ... Responsible for the physical implementation on TSMC's most advanced process nodes. * Netlist-to-GDS ...

Senior Physical Design Engineer(7051)

San Jose, CA · On-site

$155.70K - $160.30K/yr

Overview of Role As a Senior Physical Design Engineer, you will be responsible for the physical ... Responsible for the physical implementation on TSMC's most advanced process nodes. * Netlist-to-GDS ...

Physical Design Engineer (7452)

San Jose, CA

$155.70K - $160.30K/yr

Drive the end-to-end physical implementation and tapeout of test vehicles on TSMC's leading-edge ... design cycle. Minimum Qualifications * Master's Degree or higher in Electrical Engineering or ...

Physical Design Verification Lead (7264)

San Jose, CA

$155.70K - $160.30K/yr

Overview of Role TSMC Technology Inc. is at the forefront of semiconductor innovation, delivering ... Collaborate closely with the STA team to implement Engineering Change Orders (ECOs) for critical ...

Physical Design Verification Lead (7264)

San Jose, CA · On-site

$155.70K - $160.30K/yr

Overview of Role TSMC Technology Inc. is at the forefront of semiconductor innovation, delivering ... Collaborate closely with the STA team to implement Engineering Change Orders (ECOs) for critical ...

Design Engineer (7672)

San Jose, CA · On-site

$156.85K - $157K/yr

... Physical verification sign off; Implement ECOs for timing closure, and Customized Clock tree ... TSMC Technology, 2851 Junction Ave., San Jose, CA 95134, and various unanticipated work locations ...

Design Engineer (7670)

San Jose, CA · On-site

$156.85K - $157K/yr

Completing entire physical implementation of the block level and tape-out production chip; Block ... TSMC Technology, 2851 Junction Ave., San Jose, CA 95134, and various unanticipated work locations ...

Design Engineer (7671)

San Jose, CA · On-site

$156.85K - $157K/yr

Responsible for utilizing TSMC's leading process technology and portfolio of design enablement ... Physical verification sign off; Implement ECOs for timing closure; and Customized Clock Tree ...

Design Engineer (7671)

San Jose, CA · On-site

$156.85K - $157K/yr

Responsible for utilizing TSMC's leading process technology and portfolio of design enablement ... Physical verification sign off; Implement ECOs for timing closure; and Customized Clock Tree ...

Design Engineer (7672)

San Jose, CA · On-site

$156.85K - $157K/yr

... Physical verification sign off; Implement ECOs for timing closure, and Customized Clock tree ... TSMC Technology, 2851 Junction Ave., San Jose, CA 95134, and various unanticipated work locations ...

Design Engineer (7670)

San Jose, CA · On-site

$156.85K - $157K/yr

Completing entire physical implementation of the block level and tape-out production chip; Block ... TSMC Technology, 2851 Junction Ave., San Jose, CA 95134, and various unanticipated work locations ...

At TSMC Arizona, brilliance can ignite a world of innovation and launch a promising future. The ... Ability to innovate and think flexibly Physical Requirements: * May spend extended hours working ...

At TSMC Arizona, brilliance can ignite a world of innovation and launch a promising future. The ... Ability to innovate and think flexibly Physical Requirements: * May spend extended hours working ...

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TSMC Jobs Information

What is a Physical Design Engineer job?

A Physical Design Engineer is responsible for transforming logical circuit designs into a physical layout that can be manufactured as an integrated circuit (IC). They focus on key aspects like floor planning, placement, clock tree synthesis (CTS), routing, and timing closure while ensuring power and performance optimization. They work with Electronic Design Automation (EDA) tools and collaborate with front-end designers to meet design specifications. The role requires proficiency in tools such as Cadence, Synopsys, or Mentor Graphics and knowledge of processes like ASIC or SoC design.

What are the key skills and qualifications needed to thrive in the Physical Design Engineer position, and why are they important?

To thrive as a Physical Design Engineer, you need a solid background in electrical engineering, experience with ASIC or SoC design methodologies, and a deep understanding of digital circuit fundamentals. Proficiency with EDA tools like Synopsys, Cadence, or Mentor Graphics, as well as familiarity with scripting languages and industry certifications, is highly valued. Attention to detail, effective teamwork, and strong problem-solving skills are essential soft skills for this role. These qualifications are crucial as they enable efficient chip design, ensure successful project delivery, and foster productive collaboration in complex engineering environments.

What are the typical daily responsibilities of a Physical Design Engineer?

As a Physical Design Engineer, your daily responsibilities typically include taking logical circuit designs and translating them into physical layouts, performing floorplanning, placement, and routing of blocks, and conducting timing closure and verification. You will use specialized EDA tools to ensure that designs meet performance, power, and area requirements, collaborating closely with design, verification, and manufacturing teams. The role also involves resolving design issues, optimizing chip layouts, and preparing design data for fabrication. Working in this position provides exposure to advanced technology nodes and the opportunity to contribute directly to the development of cutting-edge semiconductor products.

Do workers at TSMC get paid breaks?

Yes. Most people get paid breaks.
73% of people say they get paid breaks.
Based on data from 15 people who took the Breakroom Quiz between December 2024 and May 2026.

Does TSMC pay people when they’re sick?

Yes. Most people get paid when they’re sick.
78% of people say they would get paid if they were sick but scheduled to work.
Based on data from 18 people who took the Breakroom Quiz between December 2024 and May 2026.

Is the health insurance from TSMC affordable enough for their workers?

Most people say the health insurance costs are okay.
100% of people say the health insurance costs are okay
Based on data from 13 people who took the Breakroom Quiz between March 2025 and May 2026.

Do people get paid time off at TSMC?

Most people get paid time off work.
82% of people say they get paid time off.
Based on data from 11 people who took the Breakroom Quiz between July 2025 and May 2026.

Do workers at TSMC worry about hours?

Most people don’t worry about getting enough hours.
100% of people report they don’t worry about getting enough hours.
Based on data from 13 people who took the Breakroom Quiz between December 2024 and January 2026.

Do TSMC workers get to choose the shifts they work?

Some people don’t get to choose which shifts they work.
43% report that they don’t have enough control over which shifts they work.
Based on data from 14 people who took the Breakroom Quiz between December 2024 and January 2026.

How easy is it to get time off at TSMC?

Some people find it hard to get time off.
36% of people report it’s hard to get time off.
Based on data from 14 people who took the Breakroom Quiz between December 2024 and March 2026.

Do TSMC managers change schedules at the last minute?

Most managers don’t change people’s schedules at the last minute.
93% of people say their manager doesn’t change their shift schedule at the last minute.
Based on data from 15 people who took the Breakroom Quiz between December 2024 and January 2026.

Do workers at TSMC do extra work that they don't get paid for?

Rarely. Most people don’t do unpaid extra work.
79% of people report that they don’t do extra unpaid work.
Based on data from 14 people who took the Breakroom Quiz between December 2024 and January 2026.

How easy is it to take sick days at TSMC?

Most people find it easy to take sick days.
84% of people report that it’s easy to take time off if they are sick.
Based on data from 19 people who took the Breakroom Quiz between December 2024 and May 2026.

Do people at TSMC feel treated with respect by their managers?

Most people feel treated with respect by their managers.
93% of people say they’re treated with respect by their managers.
Based on data from 15 people who took the Breakroom Quiz between December 2024 and May 2026.

Do people at TSMC get to take their breaks without interruption?

Most people get breaks without interruption.
75% of people report that they get to take their breaks without interruption.
Based on data from 16 people who took the Breakroom Quiz between December 2024 and May 2026.

Is it stressful to work at TSMC?

Most people feel stressed out here.
71% of people say they often feel stressed out at work.
Based on data from 14 people who took the Breakroom Quiz between December 2024 and May 2026.

Do people at TSMC enjoy their jobs?

Most people enjoy their job.
86% of people report they enjoy their job.
Based on data from 14 people who took the Breakroom Quiz between December 2024 and May 2026.

Do people at TSMC recommend working with their team?

Most people recommend working with their team.
79% of people report that they would recommend working with their immediate team to a friend.
Based on data from 19 people who took the Breakroom Quiz between December 2024 and May 2026.

Do people get enough training when they start at TSMC?

Some people didn’t get enough training when they started.
63% of people report they didn’t get enough training when they started working here.
Based on data from 16 people who took the Breakroom Quiz between December 2024 and May 2026.

Do people get support to advance at TSMC?

Most people are given support to advance their career here.
In the last year, 82% of people report being given support to advance their career here.
Based on data from 17 people who took the Breakroom Quiz between December 2024 and May 2026.

Do people think TSMC’s headquarters understands what’s happening where they work?

Most people think headquarters understands what’s happening where they work.
50% of people think that this employer’s headquarters or owners have a good understanding of what’s really happening where they work.
Based on data from 14 people who took the Breakroom Quiz between December 2024 and May 2026.

Do workers feel well informed about how TSMC is doing?

Most people feel well informed about how the company is doing.
79% of people feel that they are kept well informed about how the company is doing as a whole.
Based on data from 19 people who took the Breakroom Quiz between December 2024 and May 2026.
What other companies are hiring for Physical Design Engineer jobs?
Infographic showing various Physical Design Engineer job openings at Tsmc in the United States as of May 2026, with employment types broken down into 5% Internship, 90% Full Time, 1% Contract, and 4% Nights. Highlights an 100% Physical job distribution.

Physical Design Engineer (7452)

TSMC

San Jose, CA • On-site

$155.70K - $160.30K/yr

Full-time

Posted 8 days ago


TSMC rating

8.2

Company rating: 8.2 out of 10

Based on 19 frontline employees who took The Breakroom Quiz

36th of 137 rated electronics manufacturers


Job description

Overview of Role
Are you a highly motivated and skilled Physical Design Engineer with at least 3 years of industrial experience eager to push the boundaries of semiconductor technology? Join our dynamic Test Chip Physical Implementation team in San Jose, CA, and play a critical role in bringing TSMC's most advanced process nodes (A16/A14/A10) to life. This is an exciting opportunity for an engineer with a strong foundation in VLSI design, a passion for innovation, and hands-on experience with cutting-edge EDA tools. You will be instrumental in the physical implementation and tapeout of complex test vehicles, contributing directly to the future of high-performance computing and advanced electronics.
Responsibilities
  • Drive the end-to-end physical implementation and tapeout of test vehicles on TSMC's leading-edge process nodes (A16/A14/A10).
  • Execute comprehensive physical design flows from netlist-to-GDS, including:
    • Block and SoC-level floorplanning, power grid implementation, and low-power structure integration.
    • Advanced placement, clock tree synthesis (CTS), and routing for optimal performance and congestion management.
    • Extensive design optimization for power, performance, and area (PPA) targets.
  • Perform rigorous design signoff verification, encompassing:
    • RC extraction, Static Timing Analysis (STA), IR/EM analysis (IREM), Design Rule Check (DRC), Layout Versus Schematic (LVS), Electrical Rule Check (ERC), and Voltage-Aware Layout Parasitic (VCLP) analysis.
  • Achieve robust timing closure, physical design closure, and power/signal integrity closure based on comprehensive signoff verification results.
  • Actively contribute to the development and evaluation of advanced methodologies and flows to meet aggressive PPA goals.
  • Develop and enhance CAD automation scripts and dashboards using TCL, Python, CSH, and other scripting languages to streamline design flows and ensure quality monitoring.
  • Collaborate effectively with cross-functional teams, including RTL, DFT, and CAD, to provide insightful feedback and ensure seamless integration throughout the design cycle.

Minimum Qualifications
  • Master's Degree or higher in Electrical Engineering or Computer Science, with a strong academic background in VLSI-related coursework and projects.
  • A minimum of 3 years of industrial experience in physical design or a closely related field within the semiconductor industry.
  • Demonstrated expertise in digital circuit concepts and a deep understanding of the full physical design implementation flow (auto placement and route, STA, layout design, physical verification, IREM signoff).
  • Hands-on experience with major EDA tools from Synopsys (e.g., ICC2, DC, Primetime, StarRC, ICV) and Cadence (e.g., Innovus, Virtuoso, SimVision).
  • Proficiency in scripting languages such as Python, TCL, CSH, Verilog, and Unix shell scripting.
  • Strong analytical and problem-solving skills with meticulous attention to detail.
  • Excellent written and verbal communication skills, with the ability to articulate complex technical concepts clearly.
  • Positive, collaborative, self-motivated, and adaptable team player capable of thriving in a fast-paced, diverse cultural environment.

Preferred Qualifications
  • Prior internship or professional experience in physical design, circuit design, or related semiconductor roles.
  • Experience in optimizing placement strategies, congestion removal, and post-placement timing closure.
  • Familiarity with clock tree synthesis techniques to mitigate latency and skew.
  • Knowledge of Power Integrity (PI) and Signal Integrity (SI) closure techniques.
  • Experience with multi-voltage design concepts and low-power techniques.
  • Familiarity with other EDA tools such as Ansys Redhawk or Synopsys Fusion Compiler.
  • DFT knowledge is a plus.

Company Description
As a trusted technology and capacity provider, TSMC is driven by the desire to be:
  1. The world's leading dedicated semiconductor foundry
  2. The technology leader with a strong reputation for manufacturing excellence
  3. Advancing semiconductor manufacturing innovations to enable the future of technology

TSMC pioneered the pure-play foundry business model when it was founded in 1987 and has been the world's leading dedicated semiconductor foundry ever since. The Company supports a thriving ecosystem of global customers and partners with the industry's leading process technologies and a portfolio of design enablement solutions to unleash innovation for the global semiconductor industry. With global operations spanning Asia, Europe, and North America, TSMC serves as a committed corporate citizen around the world.
In North America, TSMC has a strong sales and service organization that works with customers by helping them achieve silicon success with cutting-edge technologies and manufacturing excellence. The Company has continued to accelerate its R&D investment and staffing in recent years and is expanding its manufacturing footprint to support customer innovation with 3D IC technologies and optimal manufacturing capacity.
For positions requiring access to technical data subject to export control regulations, including Export Administration Regulations, TSMC North America may have to obtain export licensing approval from the U.S. Government for certain individuals. All employment is contingent upon TSMC North America obtaining any export license or other approval that may be required by the U.S. Government.
Diversity statement
TSMC Technology, Inc. is committed to employing a diverse workforce and provides Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, or any other characteristic protected by applicable law.
TSMC is an equal opportunity employer prizing diversity and inclusion. We are committed to treating all employees and applicants for employment with respect and dignity. If you require reasonable accommodation due to a disability during the application or the recruiting process, please feel free to notify us at g_accommodations@tsmc.com. TSMC confirms to all applicants its commitment to meet TSMC's obligations under applicable employment law. Reasonable accommodations will be determined on a case-by-case basis.
Pay Transparency / Benefits statement
At TSMC, your base pay is only part of your overall total compensation package. At the time of this posting, this role typically pays a base salary between $110,000 and $160,000 per year. The range displayed reflects the minimum and maximum target for new hires. Actual pay may be more or less than the posted range. Factors that influence pay include the individual's skills, qualifications, education, experience and the position level and location. TSMC's total compensation package consists of market competitive pay, allowances, bonuses, and comprehensive benefits. We also offer extensive development opportunities and programs.
Date: May 20, 2026
Country/Region: US
City: San Jose
Company: TSMC Technology, Inc.

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