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Senior Memory Design Engineer Jobs (NOW HIRING)

Intel

Memory Circuit Design Engineer

Austin, TX

$190K - $269K/yr

The CPU Circuit Technology team is looking for a highly motivated and experienced individual to join our team as a Memory Circuit Design Engineer. In this role, you will be responsible for designing ...

Micron Technology

DRAM Design Engineer

Boise, ID · On-site

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the ... Job Summary As a Design Engineer at Micron Technology, Inc., you will be responsible for designing ...

Micron

DRAM Design Engineer

Boise, ID · On-site

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the ... Job Summary As a Design Engineer at Micron Technology, Inc., you will be responsible for designing ...

Nvidia

Senior Memory Planner

Santa Clara, CA

... design. And we've only scratched the surface of what we can accomplish when we apply our technology ... BA/BS degree in Supply Chain, Engineering, Business, or equivalent experience * 5+years of ...

Micron Technology

Senior Design Engineer

San Jose, CA · On-site

$116K - $246K/yr

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the ... As a Sr. or Staff Design Engineer in the NVE Design Engineering Analog group at Micron Technology ...

Micron

Senior Design Engineer

San Jose, CA · On-site

$116K - $246K/yr

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the ... As a Sr. or Staff Design Engineer in the NVE Design Engineering Analog group at Micron Technology ...

Intel

Memory Circuit Design Engineer

Santa Clara, CA · On-site

... Engineering, or a related discipline. Technical Experience: * Design, characterization, and verification of custom memory circuits such as SRAM, Register Files or ROM. * Design trade-offs between ...

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Senior Memory Design Engineer information

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$70.5K

$134.6K

$195K

How much do senior memory design engineer jobs pay per year?

As of Jul 17, 2026, the average yearly pay for senior memory design engineer in the United States is $134,577.00, according to ZipRecruiter salary data. Most workers in this role earn between $107,500.00 and $157,500.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Senior Memory Design Engineer, and why are they important?

To thrive as a Senior Memory Design Engineer, you need a deep understanding of semiconductor physics, circuit design, and memory architectures, usually backed by a degree in electrical engineering or a related field. Familiarity with EDA tools like Cadence or Synopsys, as well as experience with simulation, verification, and layout tools, is typically required. Strong problem-solving abilities, attention to detail, and effective communication are vital soft skills for collaborating with cross-functional teams and troubleshooting complex issues. These skills and qualifications are essential to ensure reliable, high-performance memory solutions that meet strict design specifications and industry standards.

What are Senior Memory Design Engineers?

Senior Memory Design Engineers are experienced professionals who specialize in designing, developing, and optimizing memory components such as SRAM, DRAM, or non-volatile memory for integrated circuits. They work on the architecture, circuit design, verification, and testing of memory systems to meet performance, power, and reliability requirements. These engineers often lead technical teams, contribute to design methodologies, and collaborate with cross-functional teams to ensure successful product development and manufacturing.

What are some common challenges faced by Senior Memory Design Engineers in cross-functional project teams?

Senior Memory Design Engineers often collaborate with teams from digital, analog, verification, and process technology groups. A common challenge is ensuring that memory designs meet performance, power, and area requirements while staying compatible with evolving process technologies. Balancing tight project timelines with the need for thorough validation and addressing unexpected silicon issues can also be demanding. Effective communication and proactive problem-solving are essential, as decisions made in memory design can significantly impact overall chip performance and yield.

What is the difference between Senior Memory Design Engineer vs Memory Design Engineer?

AspectSenior Memory Design EngineerMemory Design Engineer
QualificationsBachelor's/Master's in Electrical Engineering or related field, experience preferredBachelor's or higher in Electrical Engineering or related field
Work EnvironmentDesign teams in semiconductor or electronics companiesDesign and development teams in similar industries
ResponsibilitiesLeading memory architecture, complex circuit design, mentoringMemory circuit design, simulation, testing

The main difference is experience level and responsibility. Senior Memory Design Engineers typically lead projects and mentor junior staff, while Memory Design Engineers focus on executing design tasks. Both roles require similar technical skills and work in comparable environments within the semiconductor industry.

What cities are hiring for Senior Memory Design Engineer jobs? Cities with the most Senior Memory Design Engineer job openings:
What are the most commonly searched types of Memory Design Engineer jobs? The most popular types of Memory Design Engineer jobs are:
What states have the most Senior Memory Design Engineer jobs? States with the most job openings for Senior Memory Design Engineer jobs include:
Senior Memory Design Engineer jobs near you
Memory Circuit Design Engineer

Memory Circuit Design Engineer

Intel

Austin, TX

$190K - $269K/yr

Full-time

Medical, Retirement, PTO

Re-posted 12 days ago

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

11th of 143 rated electronics manufacturers

Job description

Job Details:Job Description: 

The CPU Circuit Technology team is looking for a highly motivated and experienced individual to join our team as a Memory Circuit Design Engineer. In this role, you will be responsible for designing, developing, and building full-custom as well as compiler-based SRAMs, Large Signal Arrays (custom multi-ported register file), ROMs, custom memories, digital circuits and Caches for Intel CPUs and SOCs. You will be partnering with and leveraging domain experts across various areas of technology development to develop and deliver high-quality industry-leading memory technology collaterals and to drive circuit innovations that enable next generation high-performance, high-density, low-power embedded memory designs on advanced CMOS process technologies for Intel CPU and SOCs.

This will be a fast-paced dynamic environment where you will work in the high performance, low power CPU design team on a wide spectrum of circuit activities including, but may not be limited to:

Technical readiness, memory circuit design, characterization and simulations.

Cache design, critical path simulations and design custom blocks.

Memory path-finding activities and power, performance and area (PPA) optimization.

Memory bit-cell and complex periphery IC design and automation.

Memory array/IP design, memory circuit innovation.

Methodology definition tasks as well as executing to project schedules.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Minimum Qualifications:

  • Bachelor's degree with 8+ years of experience; or master's degree with 6+ years of experience; or PhD with 4+ years of experience in in Electrical Engineering, Computer Engineering, Computer Science or a STEM-related field
  • 3+ years of experience in CMOS circuit design, digital logic optimizations, and circuit trade-offs for power, performance, and area.
  • 3+ years of expertise in SRAM and Cache design.

Preferred Qualifications:

  • Experience in low-power implementation techniques and memory design.
  • Familiarity with circuit and layout trade-offs for optimized design.
  • Knowledge of EBB design tools, flows and methodologies, and signal integrity analysis.
  • Strong analytical and problem-solving skills, with the ability to prioritize tasks and work in dynamic environments.

Help shape the future of technology and join a team that's driving innovation at the forefront of CPU design. Apply now to make a meaningful impact at Intel.

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Texas, AustinAdditional Locations:Business group:Intel makes possible the most amazing experiences of the future. You may know us for our processors. But we do so much more. Intel invents at the boundaries of technology to make amazing experiences possible for business and society, and for every person on Earth. Harnessing the capability of the cloud, the ubiquity of the Internet of Things, the latest advances in memory and programmable solutions, and the promise of always-on 5G connectivity, Intel is disrupting industries and solving global challenges. Leading on policy, diversity, inclusion, education and sustainability, we create value for our stockholders, customers, and society.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $190,610.00-269,100.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

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Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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