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Senior Memory Design Engineer Jobs in Missouri (NOW HIRING)

Perform basic engineering calculations under the supervision of senior staff. * Conduct site visits and field investigations as needed to support design efforts. * Support permitting and approval ...

Perform basic engineering calculations under the supervision of senior staff. * Conduct site visits and field investigations as needed to support design efforts. * Support permitting and approval ...

Senior ASIC Design Engineer

California, MO · On-site

$168 - $310.50/hr

NVIDIA is seeking Senior ASIC Design Engineers to implement the world's leading SoC's, GPU's and ASIC's. This position offers the opportunity to have real impact in a multifaceted ...

Senior Design Engineer

California, MO · On-site

$100 - $150/hr

Works with Sr. Designer on circuit synthesis from the transistor/resistor level up to the system level, simulation, layout supervision. * Assists ATE development with Design-For-Test methods.

Design Engineer, Senior

California, MO · On-site

$120 - $135/hr

Position Summary Lead, evaluate, design, and engineer projects and systems to specification on projects ranging from new design/build to rehabilitation of existing facilities and systems. Provide ...

Posted today

Work under direction of senior control design engineer * Perform additional tasks as required Nature & Scope: * Applies advanced knowledge of job area typically obtained through advanced education ...

Work under direction of senior control design engineer * Perform additional tasks as required Nature & Scope: * Applies advanced knowledge of job area typically obtained through advanced education ...

$69 - $115/hr

Our partner is looking for a Senior Fuel Handling System Design Engineer (Nuclear) based in Netherlands. This is an exciting opportunity to contribute to the design of advanced nuclear energy systems ...

... senior control design engineer • Perform additional tasks as required Nature & Scope: * Applies advanced knowledge of job area typically obtained through advanced education * and work experience

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Senior Memory Design Engineer information

What are the key skills and qualifications needed to thrive as a senior memory design engineer?

To thrive as a Senior Memory Design Engineer, you need a deep understanding of semiconductor physics, circuit design, and memory architectures, usually backed by a degree in electrical engineering or a related field. Familiarity with EDA tools like Cadence or Synopsys, as well as experience with simulation, verification, and layout tools, is typically required. Strong problem-solving abilities, attention to detail, and effective communication are vital soft skills for collaborating with cross-functional teams and troubleshooting complex issues. These skills and qualifications are essential to ensure reliable, high-performance memory solutions that meet strict design specifications and industry standards.

What is a senior memory design engineer?

Senior Memory Design Engineers are experienced professionals who specialize in designing, developing, and optimizing memory components such as SRAM, DRAM, or non-volatile memory for integrated circuits. They work on the architecture, circuit design, verification, and testing of memory systems to meet performance, power, and reliability requirements. These engineers often lead technical teams, contribute to design methodologies, and collaborate with cross-functional teams to ensure successful product development and manufacturing.

What are some common challenges faced by senior memory design engineers in cross-functional project teams?

Senior Memory Design Engineers often collaborate with teams from digital, analog, verification, and process technology groups. A common challenge is ensuring that memory designs meet performance, power, and area requirements while staying compatible with evolving process technologies. Balancing tight project timelines with the need for thorough validation and addressing unexpected silicon issues can also be demanding. Effective communication and proactive problem-solving are essential, as decisions made in memory design can significantly impact overall chip performance and yield.

What is the difference between Senior Memory Design Engineer vs Memory Design Engineer?

AspectSenior Memory Design EngineerMemory Design Engineer
QualificationsBachelor's/Master's in Electrical Engineering or related field, experience preferredBachelor's or higher in Electrical Engineering or related field
Work EnvironmentDesign teams in semiconductor or electronics companiesDesign and development teams in similar industries
ResponsibilitiesLeading memory architecture, complex circuit design, mentoringMemory circuit design, simulation, testing

The main difference is experience level and responsibility. Senior Memory Design Engineers typically lead projects and mentor junior staff, while Memory Design Engineers focus on executing design tasks. Both roles require similar technical skills and work in comparable environments within the semiconductor industry.

What cities in Missouri are hiring for Senior Memory Design Engineer jobs? Cities in Missouri with the most Senior Memory Design Engineer job openings:

Senior Circuit Design Engineer - AI & HPC (7708)

TSMC - Taiwan Semiconductor Manufacturing Company Limited

California, MO • On-site

$120 - $165/hr

Other

Posted 5 days ago


Job description

Join TSMC Technology, Inc. (TTI), an innovation hub of Taiwan Semiconductor Manufacturing Company Limited (TSMC). TSMC has been a pioneer in the semiconductor industry since 1987. With teams located in San Jose, CA, and Austin, TX, TTI is dedicated to advancing semiconductor technology through expertise in physical design, memory design, analog mixed signal, power management, and groundbreaking computational AI machine learning research. Our mission is to drive the future of semiconductor innovation through unparalleled R&D and customer-focused IP. Be part of a team that shapes the next generation of technological advancements.

Step into a pivotal role within our San Jose design R&D team and position yourself at the forefront of the global semiconductor industry. As a Senior Circuit Design Engineer, you will leverage TSMC's leading process technology and design enablement solutions to push the boundaries of semiconductor manufacturing. In this role, you will focus on AI and high-performance computing applications, unleashing innovation and driving next-generation advancements. You will join us in our San Jose office, operating on a hybrid work schedule with 4 days in-office.

Responsibilities
  • Design custom memory circuits and architectures tailored specifically for AI and HPC applications.
  • Lead efforts in Power, Performance, and Area (PPA) optimization for custom SRAM circuits to align with advanced scaling advancements.
  • Perform comprehensive technical analysis, including Time/Power/Area improvements, Read/Write margin, Noise, and Power/Signal IR/EM analysis.
  • Provide supervised layout guidance, manage design characterization, and oversee methodology, verification, and final sign-off.
  • Collaborate closely with RTL and Physical Design (PD) teams to ensure the best IP PPA integration.
  • Handle compiler coding and the interpretation of testing results.
Minimum Qualifications
  • Master’s degree with 3+ years of relevant industry experience, or a Ph.D. demonstrating applicable academic research in VLSI design or custom circuits.
  • In-depth knowledge of VLSI design, digital integrated circuits, Verilog, logic design, and DFT.
  • Hands‑on experience running SPICE simulations for custom circuits.
  • A collaborative mindset with a strong teamwork attitude and excellent communication skills.
Preferred Qualifications
  • Advanced knowledge of leading‑edge process nodes (TSMC N7 and below), ideally with a track record of successfully delivering product tapeouts below 5nm.
  • Deep expertise in high‑speed and low‑power custom SRAM or Register File architecture and implementation.
  • Prior experience acting as a technical lead for customer IP products or energy‑efficient AI inference/training accelerators is a significant asset.
  • Proficiency with memory characterization and industry‑standard EDA tools.
  • Familiarity with scripting and automation (Perl, TCL, Python) is highly advantageous and will allow you to hit the ground running.
Diversity Statement

TSMC Technology, Inc. is committed to employing a diverse workforce and provides Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, or any other characteristic protected by applicable law.

Equal Opportunity Employer

TSMC is an equal opportunity employer prizing diversity and inclusion. We are committed to treating all employees and applicants for employment with respect and dignity. If you require reasonable accommodation due to a disability during the application or the recruiting process, please feel free to notify us at g_accommodations@tsmc.com. TSMC confirms to all applicants its commitment to meet TSMC’s obligations under applicable employment law. Reasonable accommodations will be determined on a case‑by‑case basis.

Pay Transparency / Benefits

At TSMC, your base pay is only part of your overall total compensation package. At the time of this posting, this role typically pays a base salary between $120,000 and $165,000 per year. The range displayed reflects the minimum and maximum target for new hires. Actual pay may be more or less than the posted range. Factors that influence pay include the individual's skills, qualifications, education, experience and the position level and location. TSMC’s total compensation package consists of market competitive pay, allowances, bonuses, and comprehensive benefits. We also offer extensive development opportunities and programs.

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