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Senior Memory Design Engineer Jobs in Colorado (NOW HIRING)

Controls Design Engineer

Denver, CO · Hybrid

$70K - $110K/yr

Perform site visits for evaluation, verification, and design coordination * Assist senior engineers with integration tasks and ongoing project requirements Company Overview: * Founded: 1980s

Design Engineer

Fort Collins, CO · On-site

$60K - $96K/yr

The role offers exposure to advanced design methodologies and close collaboration with senior engineers across multiple disciplines to deliver industry-leading silicon solutions. Key Responsibilities

The role offers exposure to advanced design methodologies and close collaboration with senior engineers across multiple disciplines to deliver industry-leading silicon solutions. Key Responsibilities

FPGA Design Engineer Sr

Boulder, CO · On-site

$101K - $178K/yr

In this role, the FPGA Design Engineer will be responsible for leveraging the Vivado Design Suite ... domains, memory hierarchies, and routing • Demonstrated experience in ASIC / FPGA life cycle ...

Senior Electrical Design Engineer

Denver, CO · On-site

$107K - $144K/yr

Tract Capital is seeking a Senior Electrical Design Engineer owns the electrical design and power system studies discipline design for Fleet's behind-the-meter (BTM) power solutions and related ...

Design engineers work in tandem with senior staff to plan, schedule, and coordinate detailed phases of the engineering work on projects of moderate scope or on a portion of a major project. EXAMPLE ...

Perform roadway design tasks including horizontal and vertical alignments, typical sections ... Develop plans, specifications, and cost estimates (PS&E) under the guidance of senior engineers.

Roadway Design Engineer

Denver, CO · On-site +1

$105K/yr

Perform roadway design tasks including horizontal and vertical alignments, typical sections ... Develop plans, specifications, and cost estimates (PS&E) under the guidance of senior engineers.

Roadway Design Engineer

Denver, CO · On-site +1

$105K/yr

Perform roadway design tasks including horizontal and vertical alignments, typical sections ... Develop plans, specifications, and cost estimates (PS&E) under the guidance of senior engineers.

Roadway Design Engineer

Denver, CO · On-site +1

$105K/yr

Perform roadway design tasks including horizontal and vertical alignments, typical sections ... Develop plans, specifications, and cost estimates (PS&E) under the guidance of senior engineers.

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Senior Memory Design Engineer information

What are the key skills and qualifications needed to thrive as a Senior Memory Design Engineer, and why are they important?

To thrive as a Senior Memory Design Engineer, you need a deep understanding of semiconductor physics, circuit design, and memory architectures, usually backed by a degree in electrical engineering or a related field. Familiarity with EDA tools like Cadence or Synopsys, as well as experience with simulation, verification, and layout tools, is typically required. Strong problem-solving abilities, attention to detail, and effective communication are vital soft skills for collaborating with cross-functional teams and troubleshooting complex issues. These skills and qualifications are essential to ensure reliable, high-performance memory solutions that meet strict design specifications and industry standards.

What are Senior Memory Design Engineers?

Senior Memory Design Engineers are experienced professionals who specialize in designing, developing, and optimizing memory components such as SRAM, DRAM, or non-volatile memory for integrated circuits. They work on the architecture, circuit design, verification, and testing of memory systems to meet performance, power, and reliability requirements. These engineers often lead technical teams, contribute to design methodologies, and collaborate with cross-functional teams to ensure successful product development and manufacturing.

What are some common challenges faced by Senior Memory Design Engineers in cross-functional project teams?

Senior Memory Design Engineers often collaborate with teams from digital, analog, verification, and process technology groups. A common challenge is ensuring that memory designs meet performance, power, and area requirements while staying compatible with evolving process technologies. Balancing tight project timelines with the need for thorough validation and addressing unexpected silicon issues can also be demanding. Effective communication and proactive problem-solving are essential, as decisions made in memory design can significantly impact overall chip performance and yield.

What is the difference between Senior Memory Design Engineer vs Memory Design Engineer?

AspectSenior Memory Design EngineerMemory Design Engineer
QualificationsBachelor's/Master's in Electrical Engineering or related field, experience preferredBachelor's or higher in Electrical Engineering or related field
Work EnvironmentDesign teams in semiconductor or electronics companiesDesign and development teams in similar industries
ResponsibilitiesLeading memory architecture, complex circuit design, mentoringMemory circuit design, simulation, testing

The main difference is experience level and responsibility. Senior Memory Design Engineers typically lead projects and mentor junior staff, while Memory Design Engineers focus on executing design tasks. Both roles require similar technical skills and work in comparable environments within the semiconductor industry.

FPGA Design Engineer Senior with Security Clearance

Global Edge Group, LLC

Boulder, CO

$116K - $201K/yr

Other

Posted 19 days ago


Job description

The Global Edge Consultants, LLC is an Equal Opportunity Employer. The Global Edge Consultants, LLC does not discriminate on the basis of race, religion, color, sex, gender identity, sexual orientation, age, non-disqualifying physical or mental disability, national origin, veteran status or any other basis covered by appropriate law. All employment is decided on the basis of qualifications, merit, and business need. Job Title: FPGA Design Engineer Sr
Location: Boulder, CO / Sunnyvale, CA
Type of Role: Direct Hire (Full-Time, Onsite)
Shift: 9x80 Schedule (Every other Friday off)
Pay: $101,000 – $178,135/year
(Major metro CA/MA/NY range: $116,200 – $201,365/year) POSITION OVERVIEW:
We are seeking an experienced FPGA Design Engineer Sr to support advanced space-based mission processing and remote sensing payload initiatives within a highly classified aerospace and defense environment. This role is responsible for developing, integrating, and testing FPGA hardware solutions supporting onboard mission processing operations for flight hardware systems. The ideal candidate has strong experience with Vivado, VHDL/Verilog development, FPGA subsystem integration, and space-based hardware processing environments supporting advanced aerospace and national security programs. RESPONSIBILITIES AND ESSENTIAL DUTIES:
• Develop FPGA-based mission processing capabilities supporting remote sensing payloads and onboard flight hardware operations
• Utilize Vivado Design Suite along with VHDL and Verilog for FPGA development and deployment activities
• Develop understanding of mission processing code written in C++ and implement hardware processing solutions
• Develop, integrate, and test processor subsystem features and interfaces within FPGA hardware environments
• Generate system requirements, FPGA code, and test bench development supporting mission-critical aerospace systems
• Collaborate closely with research scientists, software engineers, and FPGA engineering teams within the APEX organization
• Support FPGA architecture, simulation, verification, validation, integration, and testing activities
• Support deployment of processing algorithms onto advanced flight hardware systems
• Participate within Agile and highly collaborative engineering environments supporting advanced space technologies
• Support mission-critical aerospace and national security programs involving remote sensing and onboard processing capabilities
• Contribute to development of advanced FPGA and mission processing solutions supporting next-generation space systems MINIMUM REQUIREMENTS:
Basic Qualifications
• Bachelor of Science degree or higher in Electrical Engineering, Computer Engineering, or related technical discipline
• Ability to obtain TS/SCI Security Clearance required
• Understanding of HDL programming languages including VHDL and Verilog
• Experience designing utilizing Vivado Design Suite
• U.S. Citizenship required Additional Qualifications
• Proficiency utilizing MATLAB and C++
• Digital logic design experience
• Experience interfacing FPGAs with processors
• Familiarity with Vitis Model Composer and MATLAB HDL Coder
• Familiarity with Xilinx FPGA platforms and development tools
• Knowledge of FPGA concepts including clock domains, memory hierarchies, and routing
• Experience supporting FPGA/ASIC lifecycle activities including architecture, design, simulation, verification, validation, integration, and testing
• Knowledge of space-grade or space-qualified FPGA and ASIC technologies
• Experience supporting highly classified aerospace, defense, or national security programs preferred The Global Edge Consultants, LLC is an Equal Opportunity Employer. The Global Edge Consultants, LLC does not discriminate on the basis of race, religion, color, sex, gender identity, sexual orientation, age, non-disqualifying physical or mental disability, national origin, veteran status or any other basis covered by appropriate law. All employment is decided on the basis of qualifications, merit, and business need.