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Senior Analog Layout Engineer Jobs (NOW HIRING)

Marvell

Senior Analog Layout Manager

San Diego, CA

Central System Engineering (CSE) in Central Engineering, independent of other CE functions ... Minimum 10+ years in analog layout design and 3+ years in management. * Deep understanding of ...

OMNIVISION

Sr. Analog Design Engineer

Santa Clara, CA

$156K - $160K/yr

Job Title: Sr. Analog Design Engineer Job Duties: * Conduct design and development of image sensor ... Collaborate with layout engineer on whole chip layout integration, verification, and improvement.

OMNIVISION

Sr. Analog Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

Description Job Title: Sr. Analog Design Engineer Job Duties: * Conduct design and development of ... Collaborate with layout engineer on whole chip layout integration, verification, and improvement.

OMNIVISION

Sr. Analog Design Engineer

Santa Clara, CA · On-site

Job Title: Sr. Analog Design Engineer Job Duties: * Conduct design and development of image sensor ... Collaborate with layout engineer on whole chip layout integration, verification, and improvement.

Pacer Group

Memory Layout Engineer

Irvine, CA · On-site

Qualifications: * 7+ years of experience in analog/mixed-signal layout design of deep submicron ... Excellent programming skills in languages: SKILL, Perl; Python is a plus * Strong fundamentals in ...

Apple

Analog Layout Automation Engineer

San Diego, CA · On-site

$214K/yr

As an Analog Layout Automation Engineer, you'll convert design concepts into silicon by collaborating with circuit designers and using advanced, including AI-powered, CAD tools to create high ...

Apple

Analog Layout Automation Engineer

Cupertino, CA · On-site

$249K/yr

As an Analog Layout Automation Engineer, you'll convert design concepts into silicon by collaborating with circuit designers and using advanced, including AI-powered, CAD tools to create high ...

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Senior Analog Layout Engineer information

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$59.5K

$126.6K

$183.5K

How much do senior analog layout engineer jobs pay per year?

As of Jun 8, 2026, the average yearly pay for senior analog layout engineer in the United States is $126,557.00, according to ZipRecruiter salary data. Most workers in this role earn between $104,500.00 and $143,500.00 per year, depending on experience, location, and employer.

What are some common challenges Senior Analog Layout Engineers face when collaborating with circuit designers, and how can they be addressed?

Senior Analog Layout Engineers often encounter challenges such as translating complex circuit schematics into efficient physical layouts while meeting stringent performance requirements. Miscommunications or differing priorities between layout engineers and circuit designers can lead to design iterations or delays. To address these challenges, it’s important to establish clear communication channels, participate in regular design reviews, and use collaborative tools for feedback and issue tracking. Being proactive in discussing layout constraints and providing early feedback can help ensure that both layout and performance goals are achieved efficiently.

What are Senior Analog Layout Engineers?

Senior Analog Layout Engineers are experienced professionals who design and implement the physical layout of analog integrated circuits (ICs) such as amplifiers, data converters, and power management chips. They translate circuit schematics into detailed layouts that ensure optimal electrical performance, reliability, and manufacturability. Their responsibilities include working closely with circuit designers, performing layout-versus-schematic (LVS) checks, and using specialized Electronic Design Automation (EDA) tools. Senior engineers often mentor junior staff and help resolve complex layout challenges. Their expertise is critical in ensuring the final chip meets specifications and industry standards.

What is the difference between Senior Analog Layout Engineer vs Analog IC Design Engineer?

AspectSenior Analog Layout EngineerAnalog IC Design Engineer
Primary FocusPhysical layout and implementation of analog circuitsDesign and simulation of analog circuits
Skills RequiredLayout tools, fabrication process knowledge, circuit understandingCircuit theory, schematic design, simulation skills
Work EnvironmentFoundries, semiconductor companies, R&D labsDesign teams, R&D departments, EDA tool usage
Common UsageInvolved in physical design phaseInvolved in circuit conceptualization and schematic design

While both roles require a strong understanding of analog circuits, the Senior Analog Layout Engineer focuses on translating circuit schematics into physical layouts, ensuring manufacturability and performance. In contrast, the Analog IC Design Engineer primarily designs and simulates the circuits themselves. Both roles often collaborate but differ in their core responsibilities and skill sets.

What are the key skills and qualifications needed to thrive as a Senior Analog Layout Engineer, and why are they important?

To thrive as a Senior Analog Layout Engineer, you need deep knowledge of analog/mixed-signal IC layout, semiconductor device physics, and experience with advanced CMOS processes, typically supported by a relevant engineering degree. Proficiency with EDA tools such as Cadence Virtuoso, Mentor Graphics, and DRC/LVS verification systems is essential. Attention to detail, problem-solving, and strong collaboration skills set standout professionals apart in this role. These abilities ensure high-performance, reliable chip designs that meet stringent industry standards and project timelines.
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Senior Analog Layout Engineer jobs near you
Chip Lead: Analog & Mixed-Signal Layout Engineer

Chip Lead: Analog & Mixed-Signal Layout Engineer

Omni Design Technologies

Fort Collins, CO • On-site

$199K/yr

Full-time

Posted 26 days ago

Job description

The senior analog & mixed-signal layout designer will be responsible for the layout of cutting edge, high performance, high speed CMOS data converters in foundry CMOS process nodes in 2nm, 3nm, 5nm, 6nm, 7nm, 16nm, and 28nm.
Qualifications
  • 10+ years experience in high performance analog layout in advance Finfet/CMOS process nodes
  • Experience with layouts of high performance and high speed analog blocks (such as ADC, DAC, PLL, and SERDES, for example)
  • Should be able to lead the project
  • Experience with analog layout techniques such as common centroid, interdigitation, shielding, dummy devices, EM aware routing on critical block, and must be versed with with VXL compliant methodology
  • Familiarity in various physical verification checks DRC, LVS, DFM, ERC, EM, IR etc.
  • Layout Automation using SKILL/PERL/Python is a plus
  • Self starter with the ability to define and adhere to schedule and methodology
  • Must possess strong social skill and be an excellent team mate

We are looking for trailblazers ...
We strongly believe that the pace of the ongoing hardware revolution will be greatly accelerated by Omni Design's IP cores and the rapidly emerging semiconductor embedded design business ecosystem.
At Omni Design, we have created an exciting environment with amazing talent across multiple disciplines. We like self-motivated individuals, we encourage initiative, we look for leadership qualities, we value teamwork, we like diversity, and we reward excellence. We are looking for trailblazers to bring Omni Design's vision to fruition.
If you are interested in making an impact as part of a young, fast growing, cutting edge technology company, please reach out to us.
Omni Design is an equal opportunity employer. We offer excellent compensation. We seek individuals that share our high standards and commitment to excellence.
We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.

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