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Senior Analog Layout Engineer Jobs (NOW HIRING)

Glow Networks

Analog Layout Engineer

Santa Clara, CA · On-site

$237K/yr

Role: Analog Layout Engineer Location: Santa Clara, CA (Remote Option available) Duration ... Senior layout designer, will be responsible for layout of high-performance analog cores such as ...

Apple

Analog Layout Engineer

Austin, TX · On-site

$200K/yr

As an Analog Layout engineer, you'll play a crucial role in translating design concepts into silicon, collaborating closely with circuit designers, and leveraging advanced tools. Your work will ...

Apple

Analog Layout Engineer

Austin, TX · On-site

$200K/yr

As an Analog Layout engineer, you'll play a crucial role in translating design concepts into silicon, collaborating closely with circuit designers, and leveraging advanced tools. Your work will ...

Apple

Analog Layout Engineer

Cupertino, CA · On-site

$249K/yr

As an Analog Layout engineer, you'll play a crucial role in translating design concepts into silicon, collaborating closely with circuit designers, and leveraging advanced tools. Your work will ...

Apple

Analog Layout Engineer

Austin, TX

$109K - $192K/yr

As an Analog Layout engineer, you'll play a crucial role in translating design concepts into silicon, collaborating closely with circuit designers, and leveraging advanced tools. Your work will ...

Apple

Analog Layout Engineer

Austin, TX

$109K - $192K/yr

As an Analog Layout engineer, you'll play a crucial role in translating design concepts into silicon, collaborating closely with circuit designers, and leveraging advanced tools. Your work will ...

Apple

Analog Layout Engineer

Austin, TX

$154K - $274K/yr

As an Analog Layout engineer, you'll play a crucial role in translating design concepts into silicon, collaborating closely with circuit designers, and leveraging advanced tools. Your work will ...

Apple

Analog Layout Engineer

Austin, TX

$154K - $274K/yr

As an Analog Layout engineer, you'll play a crucial role in translating design concepts into silicon, collaborating closely with circuit designers, and leveraging advanced tools. Your work will ...

Apple

Analog Layout Engineer

Cupertino, CA

$163K - $290K/yr

As an Analog Layout engineer, you'll play a crucial role in translating design concepts into silicon, collaborating closely with circuit designers, and leveraging advanced tools. Your work will ...

Apple

Analog Layout Engineer

Cupertino, CA

$163K - $290K/yr

As an Analog Layout engineer, you'll play a crucial role in translating design concepts into silicon, collaborating closely with circuit designers, and leveraging advanced tools. Your work will ...

Apple

Analog Layout Engineer

Austin, TX

$154K - $274K/yr

As an Analog Layout engineer, you'll play a crucial role in translating design concepts into silicon, collaborating closely with circuit designers, and leveraging advanced tools. Your work will ...

Apple

Analog Layout Engineer

Austin, TX

$109K - $192K/yr

As an Analog Layout engineer, you'll play a crucial role in translating design concepts into silicon, collaborating closely with circuit designers, and leveraging advanced tools. Your work will ...

Apple

Analog Layout Engineer

Austin, TX

$109K - $192K/yr

As an Analog Layout engineer, you'll play a crucial role in translating design concepts into silicon, collaborating closely with circuit designers, and leveraging advanced tools. Your work will ...

Apple

Analog Layout Engineer

Austin, TX

$154K - $274K/yr

As an Analog Layout engineer, you'll play a crucial role in translating design concepts into silicon, collaborating closely with circuit designers, and leveraging advanced tools. Your work will ...

Pacer Group

Analog Layout Engineer

Irvine, CA · On-site

$216K/yr

Analog Layout Engineer Job Location: Irvine/San Jose (CA), Minneapolis (MN), Phoenix/Chandler (AZ) Job Duration: 3 Months, Contract to Hire Job Responsibilities: * Lead layout team in completing ...

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Senior Analog Layout Engineer information

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$59.5K

$126.6K

$183.5K

How much do senior analog layout engineer jobs pay per year?

As of Jun 7, 2026, the average yearly pay for senior analog layout engineer in the United States is $126,557.00, according to ZipRecruiter salary data. Most workers in this role earn between $104,500.00 and $143,500.00 per year, depending on experience, location, and employer.

What are some common challenges Senior Analog Layout Engineers face when collaborating with circuit designers, and how can they be addressed?

Senior Analog Layout Engineers often encounter challenges such as translating complex circuit schematics into efficient physical layouts while meeting stringent performance requirements. Miscommunications or differing priorities between layout engineers and circuit designers can lead to design iterations or delays. To address these challenges, it’s important to establish clear communication channels, participate in regular design reviews, and use collaborative tools for feedback and issue tracking. Being proactive in discussing layout constraints and providing early feedback can help ensure that both layout and performance goals are achieved efficiently.

What are Senior Analog Layout Engineers?

Senior Analog Layout Engineers are experienced professionals who design and implement the physical layout of analog integrated circuits (ICs) such as amplifiers, data converters, and power management chips. They translate circuit schematics into detailed layouts that ensure optimal electrical performance, reliability, and manufacturability. Their responsibilities include working closely with circuit designers, performing layout-versus-schematic (LVS) checks, and using specialized Electronic Design Automation (EDA) tools. Senior engineers often mentor junior staff and help resolve complex layout challenges. Their expertise is critical in ensuring the final chip meets specifications and industry standards.

What is the difference between Senior Analog Layout Engineer vs Analog IC Design Engineer?

AspectSenior Analog Layout EngineerAnalog IC Design Engineer
Primary FocusPhysical layout and implementation of analog circuitsDesign and simulation of analog circuits
Skills RequiredLayout tools, fabrication process knowledge, circuit understandingCircuit theory, schematic design, simulation skills
Work EnvironmentFoundries, semiconductor companies, R&D labsDesign teams, R&D departments, EDA tool usage
Common UsageInvolved in physical design phaseInvolved in circuit conceptualization and schematic design

While both roles require a strong understanding of analog circuits, the Senior Analog Layout Engineer focuses on translating circuit schematics into physical layouts, ensuring manufacturability and performance. In contrast, the Analog IC Design Engineer primarily designs and simulates the circuits themselves. Both roles often collaborate but differ in their core responsibilities and skill sets.

What are the key skills and qualifications needed to thrive as a Senior Analog Layout Engineer, and why are they important?

To thrive as a Senior Analog Layout Engineer, you need deep knowledge of analog/mixed-signal IC layout, semiconductor device physics, and experience with advanced CMOS processes, typically supported by a relevant engineering degree. Proficiency with EDA tools such as Cadence Virtuoso, Mentor Graphics, and DRC/LVS verification systems is essential. Attention to detail, problem-solving, and strong collaboration skills set standout professionals apart in this role. These abilities ensure high-performance, reliable chip designs that meet stringent industry standards and project timelines.
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Senior Analog Layout Engineer jobs near you
Analog Layout Engineer

Analog Layout Engineer

Glow Networks

Santa Clara, CA • On-site

$237K/yr

Full-time

Posted 28 days ago

Job description

Role: Analog Layout Engineer
Location: Santa Clara, CA (Remote Option available)
Duration: Long Term
Responsibilities:
Senior layout designer, will be responsible for layout of high-performance analog cores such as analog-to-digital converters, digital-to-analog converters, PLL, transceivers, etc.
Responsibilities include leading IC layout of cutting-edge high-performance, high-speed CMOS integrated circuits in foundry CMOS process nodes in 5nm, 7nm, 16nm, 28nm, 40nm and 65nm following best practices from the industry.
Qualifications
Thorough knowledge of industry standard EDA tools from Cadence, Mentor and Synopsys.
Must be able to set up LVS, DRC, ERC environments and debug verification issues using Cadence and Mentor tools.
Experience with layout of high-performance analog blocks such as analog to digital converters, references, digital to analog converters, PLL etc. desired.
Experience with floor planning, block level routing and top-level chip assembly.
Knowledge of high-performance analog layout techniques such as common centroid layout, shielding, use of dummy devices, thermal aware layout with consideration for electromigration.
Demonstrated experience with analog layout for silicon chips in mass production.
Experience with FinFET process nodes preferred
Experience working with distributed design teams a plus.
Knowledge of skill code and layout automation is a plus.
Self-starter with the ability to define and adhere to a schedule.
Must possess strong written and verbal communication skills.
10+ years' experience in high performance analog layout in advanced CMOS processes.

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