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Senior Analog Layout Engineer Jobs (NOW HIRING)

AIT Global, Inc.

Analog Layout Engineer

San Francisco, CA · On-site

$238K/yr

Job Title: Analog Layout Engineer Location: San Francisco, CA (Bay Area) * Exp : Minimum 8 years and above * Skill : 2nm, 3nm and 5nm process and high speed layout (MUST) * Blocks : LDO ,ADC and ...

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Apple Inc.

Analog Layout Engineer

Beaverton, OR · On-site

$120 - $160/hr

Description Analog Layout engineers are pivotal in delivering Analog Mixed‑Signal IP in a SOC flow. You will collaborate with teams of highly skilled individuals to develop the next generation of ...

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United Airlines

Analog Layout Engineer

San Francisco, CA

$238K/yr

Bachelor's degree in Electrical Engineering, Electronics, or a related field. * 6+ years of hands-on experience in analog and/or RF layout design (8+ years preferred). * Proven experience with analog ...

United Airlines

Analog Layout Engineer

Santa Clara, CA · On-site

$237K/yr

Bachelor's degree in Electrical Engineering, Electronics, or a related field. * 6+ years of hands-on experience in analog and/or RF layout design (8+ years preferred). * Proven experience with analog ...

Chipright

WI · On-site

$100 - $120/hr

Senior analog designer with SRAM experience Salary: Very Attractive Rate Location: N/A Contract ... and analog layout engineers. Responsibilities: * Perform transistor level SRAM memory cell plus ...

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Microsoft

Senior Quantum Analog Layout Engineer

Redmond, WA · On-site

$123K - $165K/yr

As a Senior Quantum Analog Layout Engineer on the Quantum 1st Party Hardware ASIC team, you will play a critical leadership role in advancing Microsoft's quantum analog infrastructure, driving Analog ...

Lumilens

Analog Layout Lead

San Jose, CA · On-site

$236K/yr

You'll work alongside a team of world-class engineers solving some of the hardest challenges in ... Define and enforce analog layout methodologies, design rules, and best practices across the ...

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Senior Analog Layout Engineer information

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$59.5K

$126.6K

$183.5K

How much do senior analog layout engineer jobs pay per year?

As of Sep 4, 2026, the average yearly pay for senior analog layout engineer in the United States is $126,557.00, according to ZipRecruiter salary data. Most workers in this role earn between $104,500.00 and $143,500.00 per year, depending on experience, location, and employer.

What is a senior analog layout engineer?

Senior Analog Layout Engineers are experienced professionals who design and implement the physical layout of analog integrated circuits (ICs) such as amplifiers, data converters, and power management chips. They translate circuit schematics into detailed layouts that ensure optimal electrical performance, reliability, and manufacturability. Their responsibilities include working closely with circuit designers, performing layout-versus-schematic (LVS) checks, and using specialized Electronic Design Automation (EDA) tools. Senior engineers often mentor junior staff and help resolve complex layout challenges. Their expertise is critical in ensuring the final chip meets specifications and industry standards.

What are the key skills and qualifications needed to thrive as a senior analog layout engineer?

To thrive as a Senior Analog Layout Engineer, you need deep knowledge of analog/mixed-signal IC layout, semiconductor device physics, and experience with advanced CMOS processes, typically supported by a relevant engineering degree. Proficiency with EDA tools such as Cadence Virtuoso, Mentor Graphics, and DRC/LVS verification systems is essential. Attention to detail, problem-solving, and strong collaboration skills set standout professionals apart in this role. These abilities ensure high-performance, reliable chip designs that meet stringent industry standards and project timelines.

What are some common challenges senior analog layout engineers face when collaborating with circuit designers, and how can they be addressed?

Senior Analog Layout Engineers often encounter challenges such as translating complex circuit schematics into efficient physical layouts while meeting stringent performance requirements. Miscommunications or differing priorities between layout engineers and circuit designers can lead to design iterations or delays. To address these challenges, it’s important to establish clear communication channels, participate in regular design reviews, and use collaborative tools for feedback and issue tracking. Being proactive in discussing layout constraints and providing early feedback can help ensure that both layout and performance goals are achieved efficiently.

What is the difference between Senior Analog Layout Engineer vs Analog IC Design Engineer?

AspectSenior Analog Layout EngineerAnalog IC Design Engineer
Primary FocusPhysical layout and implementation of analog circuitsDesign and simulation of analog circuits
Skills RequiredLayout tools, fabrication process knowledge, circuit understandingCircuit theory, schematic design, simulation skills
Work EnvironmentFoundries, semiconductor companies, R&D labsDesign teams, R&D departments, EDA tool usage
Common UsageInvolved in physical design phaseInvolved in circuit conceptualization and schematic design

While both roles require a strong understanding of analog circuits, the Senior Analog Layout Engineer focuses on translating circuit schematics into physical layouts, ensuring manufacturability and performance. In contrast, the Analog IC Design Engineer primarily designs and simulates the circuits themselves. Both roles often collaborate but differ in their core responsibilities and skill sets.

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Senior Analog Layout Engineer jobs near you

Analog Layout Engineer

TetraMem - Accelerate The World

San Jose, CA

$110K - $300K/yr

Full-time

Re-posted 26 days ago

Job description

Job Summary:
We are seeking an experienced Analog Layout Engineer to join our team. The Analog Layout Engineer will be responsible for designing and implementing analog and mixed-signal layout designs for integrated circuits. This role requires a strong understanding of analog design principles and the ability to work closely with the design team to meet project goals.


Responsibilities:

  • Lead a team of layout engineers to produce complex analog and mixed-signal blocks with high-quality layout
  • Collaborate with project managers and design engineers to understand project requirements
  • Drive critical floor-planning decisions and key layout methodology
  • Ensure that all designs meet project requirements and adhere to design guidelines
  • Review and approve final layout designs for production
  • Stay up-to-date with industry trends and advancements in design software and techniques
  • Attend project meetings, presentations, and other events as needed

Requirements:

  • B.S. EE and 8+ years of relevant industry experience or equivalent
  • Experience in analog and mixed-signal layout design of deep submicron CMOS circuits and recent experience on advance nodes
  • Proficiency in industry-standard design software, such as Cadence Virtuoso, Calibre DRC, LVS
  • Strong understanding of layout design principles and best practices
  • Excellent communication, collaboration, and leadership skills
  • Ability to manage multiple projects simultaneously while maintaining attention to detail
  • Demonstrated ability to work independently and as part of a team
  • Strong problem-solving and decision-making skills

Salary Range: $110,000 - $300,000 / year

TetraMem celebrates diversity and is committed to creating an inclusive environment for all employees. We are proud to be an Equal Opportunity Employer and welcome applicants from all backgrounds. Qualified candidates will receive consideration for employment without regard to race, color, religion, creed, sex, gender identity or expression, sexual orientation, national origin, ancestry, age, marital status, medical condition, disability, genetic information, military or veteran status, or any other characteristic protected by applicable federal, state, or local law.
TetraMem is committed to providing reasonable accommodations to qualified applicants with disabilities throughout the recruitment process. Applicants requiring accommodation may contact Human Resources for assistance.
To ensure a fair, consistent, and efficient hiring process, all candidates must apply through TetraMems official ClearCompany Applicant Tracking System (ATS). Applications submitted through the ATS allow our hiring team to evaluate candidates using a standardized process and ensure timely communication throughout the recruitment process. To promote equal consideration for all applicants, applications submitted outside of the ClearCompany ATS, including direct emails, LinkedIn messages, or unsolicited submissions to employees, may not be reviewed or considered.
We encourage all interested candidates to apply through the official TetraMem Careers page.

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