1

Senior Analog Layout Engineer Jobs (NOW HIRING)

Analog Layout Design Engineer

Tempe, AZ · On-site

$193K/yr

Analog Layout Design Engineer (Contract Position) Location: Remote | Headquarters: Tempe, Arizona, USA Company: Alphacore Inc. About Us Alphacore Inc. is a fast-growing innovator in high-performance ...

Analog Layout Design Engineer

Arizona, LA · On-site +1

$193K/yr

Analog Layout Design Engineer (Contract Position) Location: Remote | Headquarters: Tempe, Arizona, USA Company: Alphacore Inc. About Us Alphacore Inc. is a fast-growing innovator in high-performance ...

Bachelor's degree in Electrical Engineering, Electronics, or a related field. * 6+ years of hands-on experience in analog and/or RF layout design (8+ years preferred). * Proven experience with analog ...

Analog Layout Engineer

San Jose, CA · On-site

$101K - $162K/yr

Analog layout designer providing onsite support for advanced nodes, working with global layout and design team. - Candidate should work independently on block level and IP level Analog layout design ...

Senior Quantum Analog Layout Engineer

Redmond, WA · On-site

$123K - $165K/yr

As a Senior Quantum Analog Layout Engineer on the Quantum 1st Party Hardware ASIC team, you will play a critical leadership role in advancing Microsoft's quantum analog infrastructure, driving Analog ...

next page

Showing results 1-20

Senior Analog Layout Engineer information

See salary details

$59.5K

$126.6K

$183.5K

How much do senior analog layout engineer jobs pay per year?

As of Jun 8, 2026, the average yearly pay for senior analog layout engineer in the United States is $126,557.00, according to ZipRecruiter salary data. Most workers in this role earn between $104,500.00 and $143,500.00 per year, depending on experience, location, and employer.

What are some common challenges Senior Analog Layout Engineers face when collaborating with circuit designers, and how can they be addressed?

Senior Analog Layout Engineers often encounter challenges such as translating complex circuit schematics into efficient physical layouts while meeting stringent performance requirements. Miscommunications or differing priorities between layout engineers and circuit designers can lead to design iterations or delays. To address these challenges, it’s important to establish clear communication channels, participate in regular design reviews, and use collaborative tools for feedback and issue tracking. Being proactive in discussing layout constraints and providing early feedback can help ensure that both layout and performance goals are achieved efficiently.

What are Senior Analog Layout Engineers?

Senior Analog Layout Engineers are experienced professionals who design and implement the physical layout of analog integrated circuits (ICs) such as amplifiers, data converters, and power management chips. They translate circuit schematics into detailed layouts that ensure optimal electrical performance, reliability, and manufacturability. Their responsibilities include working closely with circuit designers, performing layout-versus-schematic (LVS) checks, and using specialized Electronic Design Automation (EDA) tools. Senior engineers often mentor junior staff and help resolve complex layout challenges. Their expertise is critical in ensuring the final chip meets specifications and industry standards.

What is the difference between Senior Analog Layout Engineer vs Analog IC Design Engineer?

AspectSenior Analog Layout EngineerAnalog IC Design Engineer
Primary FocusPhysical layout and implementation of analog circuitsDesign and simulation of analog circuits
Skills RequiredLayout tools, fabrication process knowledge, circuit understandingCircuit theory, schematic design, simulation skills
Work EnvironmentFoundries, semiconductor companies, R&D labsDesign teams, R&D departments, EDA tool usage
Common UsageInvolved in physical design phaseInvolved in circuit conceptualization and schematic design

While both roles require a strong understanding of analog circuits, the Senior Analog Layout Engineer focuses on translating circuit schematics into physical layouts, ensuring manufacturability and performance. In contrast, the Analog IC Design Engineer primarily designs and simulates the circuits themselves. Both roles often collaborate but differ in their core responsibilities and skill sets.

What are the key skills and qualifications needed to thrive as a Senior Analog Layout Engineer, and why are they important?

To thrive as a Senior Analog Layout Engineer, you need deep knowledge of analog/mixed-signal IC layout, semiconductor device physics, and experience with advanced CMOS processes, typically supported by a relevant engineering degree. Proficiency with EDA tools such as Cadence Virtuoso, Mentor Graphics, and DRC/LVS verification systems is essential. Attention to detail, problem-solving, and strong collaboration skills set standout professionals apart in this role. These abilities ensure high-performance, reliable chip designs that meet stringent industry standards and project timelines.
More about Senior Analog Layout Engineer jobs
What cities are hiring for Senior Analog Layout Engineer jobs? Cities with the most Senior Analog Layout Engineer job openings:
What are the most commonly searched types of Analog Layout Engineer jobs? The most popular types of Analog Layout Engineer jobs are:
What states have the most Senior Analog Layout Engineer jobs? States with the most job openings for Senior Analog Layout Engineer jobs include:
Senior Analog IC Layout Engineer

Senior Analog IC Layout Engineer

Elevate Semiconductor

San Diego, CA

$96K - $144K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 2 days ago


Job description

Elevate Semiconductor is at the forefront of shaping the future of semiconductor technology, driving innovation to enable the next generation of testing. We deliver comprehensive solutions that streamline semiconductor testing, empowering faster time-to-market and enhanced capabilities. Our diverse product portfolio includes standard, semi-custom, and custom SKUs, all engineered for longevity and compatibility across evolving technological advancements. By focusing on low-power, high-density designs, we aim to lower the cost of testing while exceeding expectations on every project.

Join us in advancing the cutting edge of semiconductor innovation!

The Position

We are seeking a highly skilled Senior Analog Layout Engineer to join our team in developing state-of-the-art integrated circuits (ICs). In this role, you will handle the physical layout and verification of highly complex, high-voltage, and mixed-signal solutions using advanced process technologies, ranging from 65nm CMOS to 100+V BCD. You will collaborate with a cross-functional team to optimize silicon design, leveraging mentorship and support from senior engineers to deliver innovative and cost-effective solutions.

Must be able to work onsite in San Diego, CA.

Responsibilities

  • Performing physical layout of analog and mixed-signal integrated circuits at the block and chip level
  • Conducting floorplanning and placement of circuit components to optimize area, performance, and power
  • Verifying layouts using industry-standard tools for LVS (Layout vs. Schematic) and DRC (Design Rule Checking) to ensure compliance with process design rules
  • Collaborating closely with design engineers to understand circuit specifications and ensure layout accuracy
  • Working with cross-functional teams, including digital design and packaging, to optimize overall chip performance
  • Troubleshooting and resolving issues related to layout verification and manufacturing

Requirements

  • Bachelor's degree in Electrical Engineering or a related field
  • Minimum of 5 years of professional experience in analog and mixed-signal IC layout design
  • Strong knowledge of analog CMOS circuits and device physics fundamentals
  • Solid understanding of the IC design, qualification, and manufacturing lifecycle
  • Hands-on experience with industry-standard EDA tools for analog and mixed-signal design (e.g., Cadence, Mentor Graphics, Tanner)
  • Proficiency in performing LVS and DRC verification using Cadence or Mentor tools

Preferences

  • Layout experience with STI High voltage (100V+) BCD and LDMOS processes
  • Layout experience with mixed voltage (multiple supply rails, 6 or more) domains
  • Layout experience with high speed multi Gbps circuits.
  • Layout experience in ultra-high accuracy and precision circuits.
  • Layout experience with high resolution data converters.
  • Layout experience with BiCMOS process technology.
  • Programming and scripting ability a strong plus, particularly in SKILL and Calibre scripts

Why Join Us?

At Elevate Semiconductor, you'll be part of a dynamic team working on innovative technologies that shape the future of the semiconductor industry. We offer competitive compensation, comprehensive benefits, and opportunities for professional growth in a collaborative environment.

Apply Today!

If you are passionate about digital design and eager to contribute to groundbreaking semiconductor solutions, we want to hear from you!

Benefits

  • 100% Employer Paid Health Insurance (Medical, Dental, Vision)
  • Unlimited Paid Time Off
  • Performance Bonuses
  • Free Lunch Catered in by Local Restaurants
  • Private Equity Options
  • Retirement Plans
  • Sabbatical Program
  • Tuition Reimbursement
  • Volunteer Days
  • Relocation Assistance
  • Conference Attendance Support
  • Biweekly Phone Stipend
  • Employee Assistance Program

The salary range for this role is $96,000-$144,000.00.

Please note: While a salary range is provided, the final compensation will depend on your experience, skill set, and how well you're able to highlight your background throughout the interview process.