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Analog Layout Engineer Remote Jobs (NOW HIRING)

IC Enable

RFIC Layout Design (TSMC 4nm)

Richardson, TX · On-site +1

Remote Opportunity Available (if all qualifications are met) * Opportunity for W2 Employment or ... engineers and RF designers to build detailed transistor-level layout of RF and analog circuit ...

Impinj

Senior Staff Design Engineer, IC Layout

Work closely with the analog and digital design teams on floor planning, pin placement, power ... Support for remote work or a desk with a view. Weekly Q&A sessions with our executive team. Impinj ...

Tenstorrent

Analog Design Engineer

North, SC · On-site +1

$100K - $500K/yr

This role is remote, based out of any in North America . We welcome candidates at various ... A hands-on owner for the full lifecycle: design, verification, layout interaction, tape-out, and ...

Sapsol Technologies Inc

Analog Design Engineer

$206K/yr

... layout and packaging teams • Prepare and review technical documentation (test procedures ... Engineering, Operations, and Quality teams for defect resolution • Drive design and process ...

Renesas Electronics

Staff Analog Design Engineer

Chandler, AZ · On-site +1

$198K/yr

Lead the design, simulation, verification, and layout supervision of CMOS power management circuits ... Our people-first culture and global support system, including the remote work option and Employee ...

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How much do analog layout engineer remote jobs pay per year?

As of Aug 4, 2026, the average yearly pay for analog layout engineer remote in the United States is $186,238.00, according to ZipRecruiter salary data. Most workers in this role earn between $202,000.00 and $202,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an analog layout engineer remote?

To thrive as an Analog Layout Engineer (Remote), you need a solid background in integrated circuit (IC) design, semiconductor physics, and experience with analog and mixed-signal layout, typically supported by an electrical engineering degree. Proficiency with EDA tools such as Cadence Virtuoso, Mentor Graphics, and knowledge of design rule checking (DRC) and layout versus schematic (LVS) verification are essential. Strong communication, attention to detail, and problem-solving skills help remote engineers collaborate effectively and ensure design accuracy. These competencies are critical for creating reliable, high-performance analog IC layouts and meeting project specifications in distributed work environments.

Are analog layout engineers in demand?

Analog layout engineers are in steady demand due to the ongoing need for high-performance analog and mixed-signal integrated circuits in industries like telecommunications, consumer electronics, and automotive. Skills in CAD tools such as Cadence and knowledge of fabrication processes enhance employability in this specialized field.

What is the difference between Analog Layout Engineer Remote vs Analog IC Design Engineer?

AspectAnalog Layout Engineer RemoteAnalog IC Design Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering, experience in layout designBachelor's or Master's in Electrical Engineering, focus on circuit design
Work EnvironmentRemote, design-focused, CAD toolsOn-site or hybrid, design and simulation-focused
Industry UsageFoundries, semiconductor companies, design firmsSemiconductor companies, integrated circuit design firms
Search & Comparison IntentUnderstanding roles, remote opportunities, skills overlapDesign responsibilities, career path, industry roles

The main difference between an Analog Layout Engineer Remote and an Analog IC Design Engineer lies in their focus and work environment. The Layout Engineer primarily concentrates on physical design and layout tasks remotely, while the IC Design Engineer emphasizes circuit design, often working on-site. Both roles require similar educational backgrounds and industry experience, but their daily tasks and work settings differ.

What does an analog layout engineer do, especially in a remote setting?

An Analog Layout Engineer designs and creates the physical layouts for analog integrated circuits, ensuring that the circuit design translates efficiently onto silicon while meeting electrical and manufacturing requirements. In a remote setting, these engineers use specialized electronic design automation (EDA) tools to collaborate with design teams, review schematics, and optimize layouts for performance, area, and reliability. They are responsible for tasks like floorplanning, placement, routing, and verifying design rule compliance, often communicating and sharing files through online platforms. Their role is crucial in industries such as semiconductor manufacturing, consumer electronics, and automotive systems.

What are common challenges faced by analog layout engineers working remotely, and how can they be addressed?

Analog Layout Engineers working remotely often encounter challenges related to effective communication and coordination with design teams, especially when collaborating across different time zones. Maintaining version control and ensuring seamless integration with circuit designers can also be more complex outside a traditional office environment. To address these challenges, remote engineers typically leverage collaborative tools, establish clear documentation protocols, and schedule regular virtual meetings to stay aligned with project goals. Proactive communication and a well-organized workflow are essential for success in this remote role.
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Analog Layout Engineer Remote jobs near you
Infographic showing various Analog Layout Engineer Remote job openings in the United States as of July 2026, with employment types broken down into 80% Full Time, and 20% Contract. Highlights an 100% Remote job distribution, with an average salary of $186,238 per year, or $89.5 per hour.

High-Speed Analog Layout Design Engineer

Celero Communications, Inc.

San Jose, CA • On-site, Remote

$239K/yr

Full-time

Posted 6 days ago

Job description

Senior to Principal High-Speed Analog Layout Design Engineer roles
Locations: Irvine, CA or San Jose, CA or remote
About the Role
Celero Communication Inc. is an exciting and fast-growing start-up in the semiconductor industry, pushing boundaries with innovative technologies that power the world’s most advanced AI and data center infrastructure. As we scale rapidly, we are looking for a driven and resourceful High-Speed Analog Layout Engineer to be the backbone of our daily operations and a key partner in shaping our company culture.
 
We are seeking a Principal/Senior Analog Layout Engineer to drive the layout design of complex analog and mixed-signal IP blocks that are at the heart of our advanced optical communication systems. As a key member of the Analog & Mixed-Signal (AMS) design team, you will lead layout development of critical blocks such as ADCs, DACs, PLLs, and other high-performance analog/mixed-signal circuits. You will interface closely with circuit designers, CAD/PDK teams, and other layout engineers to ensure first-pass silicon success. This is a hands-on technical role ideal for someone who thrives in a fast-paced environment and enjoys mentoring others while contributing directly to cutting-edge chip development.
 
Key Responsibilities
• Lead and own the physical layout design of complex analog/mixed-signal macros (e.g., ADCs, DACs, PLLs), from floor planning through final verification
• Collaborate closely with schematic designers to create optimal layout solutions considering performance, matching, symmetry, and reliability
• Mentor and guide junior layout engineers/contractors across multiple time zones, enforcing best practices in layout design and verification
• Perform and debug full hierarchy LVS, DRC, PERC, ERC, and other signoff checks using industry-standard tools (Pegasus, Calibre, etc.)
• Contribute to chip-level planning including top-level floor planning, block integration, power grid implementation, and signal routing
• Participate in layout design reviews and provide technical leadership for layout quality, verification completeness, and schedule adherence
• Support automation initiatives through scripting and tool customization (SKILL, TCL, Python is a plus)
 
Required Qualifications
• Minimum 10+ years of hands-on analog/mixed-signal layout design experience in advanced CMOS/FinFET technologies
• Proven track record of top level integration IP layout macros and preparing IPs for handoff to Physical Design
• Proven leadership in owning major IP layout macros or full-chip-level layout at FinFET nodes (TSMC preferred)
• At least 1 year of experience with TSMC FinFET process nodes (N3, N5, N7, or N16)
• Deep understanding of device physics, layout-dependent effects (LOD, WPE, OSE, LDE, etc.), and their impact on circuit performance
• Strong expertise in layout best practices for device matching, noise isolation, ESD protection, symmetry, and parasitic minimization
• Proficiency in floor planning, hierarchical block integration, routing strategy, and power/ground grid design
• Expertise with Cadence Virtuoso, Calibre, Pegasus, and other layout and verification tools
• Familiarity with layout verification flows, including LVS, DRC, PERC, Density, DFM, ERC, and Antenna rules
• Experience working in collaborative environments with international and remote teams
• Strong documentation and communication skills with the ability to clearly present layout trade-offs and status to cross-functional teams
• Experience using revision control systems for layout design management
 
Preferred Qualifications
• Exposure to optical or high-speed analog interfaces is a strong plus
• Working knowledge of SKILL, TCL, or Python for layout automation or design flow optimization
• Proven ability to collaborate with international teams (U.S., Canada, Argentina)
• Strong organizational skills with high attention to detail and follow-through
• Ability to multi-task and prioritize in a fast-paced, dynamic environment
• Proactive, eager-to-learn mindset with excellent problem-solving skills
 
What We Offer
• The chance to play a foundational role at a high-growth semiconductor start-up
• Exposure to a wide variety of cross functional teams
• A collaborative, international team culture where ideas and initiative are valued
• The opportunity to grow alongside Celero as we scale and shape the future of our industry
• A foundational role at a fast-growing semiconductor start-up shaping the future of AI and data center connectivity
 
Note: Since we have several roles available, candidate job level will be evaluated during interview process.