You will have the opportunity to collaborate closely with chip designers, electrical engineers, algorithms engineers, and software engineers on a small, agile team. As an Analog IC Layout Engineer ...
You will have the opportunity to collaborate closely with chip designers, electrical engineers, algorithms engineers, and software engineers on a small, agile team. As an Analog IC Layout Engineer ...
Analog IC Layout Engineer
South San Francisco, CA · On-site
$83K - $139K/yr
You will have the opportunity to collaborate closely with chip designers, electrical engineers, algorithms engineers, and software engineers on a small, agile team. As an Analog IC Layout Engineer ...
Analog IC Layout Engineer
South San Francisco, CA · On-site
$83K - $139K/yr
You will have the opportunity to collaborate closely with chip designers, electrical engineers, algorithms engineers, and software engineers on a small, agile team. As an Analog IC Layout Engineer ...
IC Layout Manager (Analog/Mixed Signal)
Richardson, TX · On-site
$150 - $210/hr
Position: IC Layout Manager (Analog/Mixed Signal) Location: Richardson, TX Job Id: 317 # of ... designs. Location: Richardson, TX (Hybrid: 3 days onsite) What You'll Do * Lead chip-level layout ...
IC Layout Manager (Analog/Mixed Signal)
Richardson, TX · On-site
$150 - $210/hr
Position: IC Layout Manager (Analog/Mixed Signal) Location: Richardson, TX Job Id: 317 # of ... designs. Location: Richardson, TX (Hybrid: 3 days onsite) What You'll Do * Lead chip-level layout ...
The Role As a Mixed-Signal and Analog IC Layout Manager, you will take ownership of chip-level ... designs. Location: Richardson, TX (Hybrid: 3 days onsite) What You'll Do * Lead chip-level layout ...
The Role As a Mixed-Signal and Analog IC Layout Manager, you will take ownership of chip-level ... designs. Location: Richardson, TX (Hybrid: 3 days onsite) What You'll Do * Lead chip-level layout ...
Analog IC Design Engineer
$81K - $108K/yr
SRI's Integrated Systems & Solutions (InSyS) Division designs leading-edge R&D technologies that ... Experience in analog IC layout to address DRC, LVS, matching, shielding, electromigration, IR drops ...
Analog IC Design Engineer
$81K - $108K/yr
SRI's Integrated Systems & Solutions (InSyS) Division designs leading-edge R&D technologies that ... Experience in analog IC layout to address DRC, LVS, matching, shielding, electromigration, IR drops ...
Analog IC Design Engineer
Princeton, NJ · On-site
$81K - $108K/yr
Overview SRI's Integrated Systems & Solutions (InSyS) Division designs leading-edge R&D ... Experience in analog IC layout to address DRC, LVS, matching, shielding, electromigration, IR drops ...
Analog IC Design Engineer
Princeton, NJ · On-site
$81K - $108K/yr
Overview SRI's Integrated Systems & Solutions (InSyS) Division designs leading-edge R&D ... Experience in analog IC layout to address DRC, LVS, matching, shielding, electromigration, IR drops ...
Senior High Speed Mixed-Signal I/O & Analog Layout Engineer
San Jose, CA · On-site
$100 - $110/hr
... as an IC layout designer; OR 8+ years of professional experience with integrated circuit layout ... Strong High Speed SERDES/analog layout skills * Experience in advanced nodes in IC layout ...
Senior High Speed Mixed-Signal I/O & Analog Layout Engineer
San Jose, CA · On-site
$100 - $110/hr
... as an IC layout designer; OR 8+ years of professional experience with integrated circuit layout ... Strong High Speed SERDES/analog layout skills * Experience in advanced nodes in IC layout ...
Analog IC Design Engineer
Princeton, NJ · On-site
$81K - $108K/yr
Overview SRI's Integrated Systems & Solutions (InSyS) Division designs leading-edge R&D ... Experience in analog IC layout to address DRC, LVS, matching, shielding, electromigration, IR drops ...
Analog IC Design Engineer
Princeton, NJ · On-site
$81K - $108K/yr
Overview SRI's Integrated Systems & Solutions (InSyS) Division designs leading-edge R&D ... Experience in analog IC layout to address DRC, LVS, matching, shielding, electromigration, IR drops ...
Staff Analog IC Layout Engineer
San Diego, CA · On-site
$120 - $180/hr
Minimum of 8 years of professional experience in analog and mixed‑signal IC layout design * Strong knowledge of analog CMOS circuits and device physics fundamentals * Solid understanding of the IC ...
Staff Analog IC Layout Engineer
San Diego, CA · On-site
$120 - $180/hr
Minimum of 8 years of professional experience in analog and mixed‑signal IC layout design * Strong knowledge of analog CMOS circuits and device physics fundamentals * Solid understanding of the IC ...
Senior High Speed Mixed-Signal I/O & Analog Layout Engineer
San Jose, CA · On-site +1
$100 - $110/hr
... Analog IC Layout Engineer to join our advanced silicon design team In this role, you will collaborate closely with circuit designers based in San Jose, California, to develop and implement high ...
Senior High Speed Mixed-Signal I/O & Analog Layout Engineer
San Jose, CA · On-site +1
$100 - $110/hr
... Analog IC Layout Engineer to join our advanced silicon design team In this role, you will collaborate closely with circuit designers based in San Jose, California, to develop and implement high ...
Analog IC Designer
Texas City, TX · On-site
$172K/yr
Analog IC Designer Location : Plano, TX (Hybrid) Full Time Responsibilities: Responsible for design ... Directs and supervises block level and top-level layout actives to insure optimum circuit ...
Analog IC Designer
Texas City, TX · On-site
$172K/yr
Analog IC Designer Location : Plano, TX (Hybrid) Full Time Responsibilities: Responsible for design ... Directs and supervises block level and top-level layout actives to insure optimum circuit ...
Staff Analog IC Layout Engineer (Block & Chip)
San Diego, CA · On-site
$145K - $175K/yr
Minimum of 8 years of professional experience in analog and mixed-signal IC layout design * Strong ... Experience with mixed-voltage designs involving multiple supply rails and power domains
Quick apply
Staff Analog IC Layout Engineer (Block & Chip)
San Diego, CA · On-site
$145K - $175K/yr
Minimum of 8 years of professional experience in analog and mixed-signal IC layout design * Strong ... Experience with mixed-voltage designs involving multiple supply rails and power domains
Analog/RF IC Layout Design Engineer.
Colorado Springs, CO · On-site
$117.53 - $195.88/hr
Through close collaboration with IC designers and experts in IC technologies and IC design tools ... Analog IC Layout experience * 5+ years of experience with Cadence Virtuoso Layout XL tools ...
Analog/RF IC Layout Design Engineer.
Colorado Springs, CO · On-site
$117.53 - $195.88/hr
Through close collaboration with IC designers and experts in IC technologies and IC design tools ... Analog IC Layout experience * 5+ years of experience with Cadence Virtuoso Layout XL tools ...
Analog/RF IC Layout Design Engineer.
Colorado Springs, CO · On-site
$117K - $195K/yr
Through close collaboration with IC designers and experts in IC technologies and IC design tools ... Analog IC Layout experience * 5+ years of experience with Cadence Virtuoso Layout XL tools ...
Analog/RF IC Layout Design Engineer.
Colorado Springs, CO · On-site
$117K - $195K/yr
Through close collaboration with IC designers and experts in IC technologies and IC design tools ... Analog IC Layout experience * 5+ years of experience with Cadence Virtuoso Layout XL tools ...
Analog/RF IC Layout Design Engineer.
Santa Clara, CA · On-site
$117.53 - $195.88/hr
Through close collaboration with IC designers and experts in IC technologies and IC design tools ... Analog IC Layout experience * 5+ years of experience with Cadence Virtuoso Layout XL tools ...
Analog/RF IC Layout Design Engineer.
Santa Clara, CA · On-site
$117.53 - $195.88/hr
Through close collaboration with IC designers and experts in IC technologies and IC design tools ... Analog IC Layout experience * 5+ years of experience with Cadence Virtuoso Layout XL tools ...
RFIC Layout Designer (RFIC Engineering)
Palo Alto, CA · On-site
$130K - $185K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the technical level, and will work with RFIC/mixed signal designers on full chip layout of custom analog and ...
RFIC Layout Designer (RFIC Engineering)
Palo Alto, CA · On-site
$130K - $185K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the technical level, and will work with RFIC/mixed signal designers on full chip layout of custom analog and ...
Analog/RF IC Layout Design Engineer.
Santa Clara, CA · On-site
$117K - $195K/yr
Through close collaboration with IC designers and experts in IC technologies and IC design tools ... Analog IC Layout experience * 5+ years of experience with Cadence Virtuoso Layout XL tools ...
Analog/RF IC Layout Design Engineer.
Santa Clara, CA · On-site
$117K - $195K/yr
Through close collaboration with IC designers and experts in IC technologies and IC design tools ... Analog IC Layout experience * 5+ years of experience with Cadence Virtuoso Layout XL tools ...
Analog/RF IC Layout Design Engineer.
Colorado Springs, CO · On-site
$117K - $195K/yr
Through close collaboration with IC designers and experts in IC technologies and IC design tools ... Analog IC Layout experience * 5+ years of experience with Cadence Virtuoso Layout XL tools ...
Analog/RF IC Layout Design Engineer.
Colorado Springs, CO · On-site
$117K - $195K/yr
Through close collaboration with IC designers and experts in IC technologies and IC design tools ... Analog IC Layout experience * 5+ years of experience with Cadence Virtuoso Layout XL tools ...
RFIC Layout Designer (RFIC Engineering)
Redmond, WA · On-site
$120K - $175K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the technical level, and will work with RFIC/mixed signal designers on full chip layout of custom analog and ...
RFIC Layout Designer (RFIC Engineering)
Redmond, WA · On-site
$120K - $175K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the technical level, and will work with RFIC/mixed signal designers on full chip layout of custom analog and ...
RFIC Layout Designer (Starshield Silicon)
Hawthorne, CA · On-site
$120K - $150K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the technical level and will work with RFIC/mixed signal designers on full chip layout of custom analog and ...
RFIC Layout Designer (Starshield Silicon)
Hawthorne, CA · On-site
$120K - $150K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the technical level and will work with RFIC/mixed signal designers on full chip layout of custom analog and ...
Analog Ic Layout Designer information
See salary details
$16.79 is the 25th percentile. Wages below this are outliers.
$10.10 - $18.36
31% of jobs
$18.36 - $26.62
16% of jobs
The median wage is $29.10 / hr.
$26.62 - $34.88
11% of jobs
$34.88 - $43.14
15% of jobs
$48.30 is the 75th percentile. Wages above this are outliers.
$43.14 - $51.40
4% of jobs
$51.40 - $59.66
6% of jobs
$59.66 - $67.92
5% of jobs
$67.92 - $76.18
3% of jobs
$76.18 - $84.44
2% of jobs
$84.44 - $92.70
3% of jobs
$92.70 - $100.96
3% of jobs
$10
$41
$100
How much do analog ic layout designer jobs pay per hour?
What is an Analog IC Layout Designer?
What are the key skills and qualifications needed to thrive as an analog IC layout designer?
What are some common challenges faced by analog IC layout designers during the design process?
What is the difference between Analog Ic Layout Designer vs Digital IC Layout Designer?
| Aspect | Analog IC Layout Designer | Digital IC Layout Designer |
|---|---|---|
| Credentials | Degree in Electrical Engineering or related field, certifications in IC design | Degree in Electrical Engineering or related field, certifications in IC design |
| Work Environment | Semiconductor companies, design houses, R&D labs | Semiconductor companies, design houses, R&D labs |
| Industry Usage | Analog, mixed-signal, RF circuits | Digital circuits, microprocessors, memory chips |
| Design Focus | Analog signal integrity, low noise, high precision | Logic functionality, high speed, power optimization |
Both roles require similar educational backgrounds and work environments, but they focus on different circuit types. Analog IC Layout Designers specialize in analog and mixed-signal circuits, emphasizing signal quality and precision, while Digital IC Layout Designers focus on digital logic and high-speed data processing. Understanding these differences helps in choosing the right career path or job search focus.
Is an analog IC layout design a good career?
Is analog IC layout design a good career?
What states have the most Analog Ic Layout Designer jobs?
States with the most job openings for Analog Ic Layout Designer jobs include:
What job categories do people searching Analog Ic Layout Designer jobs look for?
The top searched job categories for Analog Ic Layout Designer jobs are:

Job description
Team Description:
The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-computer interfaces. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future.
Job Description and Responsibilities:
We are looking for experienced and hands-on engineers with a creative and initiative mindset, who are interested in exploring the next-generation chip design with advanced architectures and hardware accelerators with a goal of enhancing the energy efficiency, information entropy, and scalability of our wireless brain-computer interfaces towards the physical limit of silicon technology. The ideal candidates are energetic people who get excited about building things, are highly analytical, and enjoy tackling new problems. You will have the opportunity to collaborate closely with chip designers, electrical engineers, algorithms engineers, and software engineers on a small, agile team. As an Analog IC Layout Engineer, your responsibilities will include:
- Crafting state-of-the-art layouts for mixed-signal and analog circuits
- Amplifiers
- Filters
- Switched capacitor circuits
- Oscillators
- Data converters
- Power management circuits
- Reviewing layout floorplans and analyzing high-fidelity circuits with circuit engineers
- Physical verification of custom IC mask layouts (LVS, DRC, ERC)
Required Qualifications:
- Bachelor of Science in Computer Engineering or related field
- 2+ years of experience in analog and mixed-signal IC layout design
- 1+ year experience with FinFET technologies
- Ability to identify the best approach to solving problems
Preferred Qualifications:
- Programming/scripting knowledge in SKILL, TCL, Shell, C/C++, and/or Python
- Proven expertise in implementing analog and mixed-signal layout designs, achieving tight matching, low noise, and low power consumption
- Understanding on failure-prone circuit and layout structures
- Experience with analog DFM standards
- Experience with layout P-cell design and implementation
- Experience with layout automationÂ
About NEURALINK
Sourced by ZipRecruiter
Industry
Biotechnology research and development
Company size
201 - 500 Employees
Headquarters location
San Francisco, CA, US
Year founded
2016