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Senior Analog Layout Engineer Jobs in Chestnut Ridge, NY

Design analog, digital, and mixed-signal circuits from requirements and specifications. * Produce schematic capture and drive PCB layout (directly or in partnership with layout engineers), including ...

Posted today

Teledyne LeCroy R&D Team is looking for a Senior Electrical Engineer with at least 5-10 years ... Knowledge of PCB layout for RF & Microwave circuits * Advanced RF/Analog/Digital lab skills.

Own PCB design and review, including schematic capture, component selection, layout oversight, and ... Strong expertise in analog and digital circuit design * Proven experience with PCB design tools and ...

Senior Electrical Engineer

Hawthorne, NY · On-site

$130K - $175K/yr

Own PCB design and review, including schematic capture, component selection, layout oversight, and ... Strong expertise in analog and digital circuit design * Proven experience with PCB design tools and ...

Senior Electrical Engineer

Hawthorne, NY · On-site

$130K - $175K/yr

Own PCB design and review, including schematic capture, component selection, layout oversight, and ... Strong expertise in analog and digital circuit design * Proven experience with PCB design tools and ...

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Senior Analog Layout Engineer information

See Chestnut Ridge, NY salary details

$60.5K

$128.7K

$186.6K

How much do senior analog layout engineer jobs pay per year?

As of Aug 7, 2026, the average yearly pay for senior analog layout engineer in Chestnut Ridge, NY is $128,723.00, according to ZipRecruiter salary data. Most workers in this role earn between $106,300.00 and $146,000.00 per year, depending on experience, location, and employer.

What are some common challenges senior analog layout engineers face when collaborating with circuit designers, and how can they be addressed?

Senior Analog Layout Engineers often encounter challenges such as translating complex circuit schematics into efficient physical layouts while meeting stringent performance requirements. Miscommunications or differing priorities between layout engineers and circuit designers can lead to design iterations or delays. To address these challenges, it’s important to establish clear communication channels, participate in regular design reviews, and use collaborative tools for feedback and issue tracking. Being proactive in discussing layout constraints and providing early feedback can help ensure that both layout and performance goals are achieved efficiently.

What is a senior analog layout engineer?

Senior Analog Layout Engineers are experienced professionals who design and implement the physical layout of analog integrated circuits (ICs) such as amplifiers, data converters, and power management chips. They translate circuit schematics into detailed layouts that ensure optimal electrical performance, reliability, and manufacturability. Their responsibilities include working closely with circuit designers, performing layout-versus-schematic (LVS) checks, and using specialized Electronic Design Automation (EDA) tools. Senior engineers often mentor junior staff and help resolve complex layout challenges. Their expertise is critical in ensuring the final chip meets specifications and industry standards.

What is the difference between Senior Analog Layout Engineer vs Analog IC Design Engineer?

AspectSenior Analog Layout EngineerAnalog IC Design Engineer
Primary FocusPhysical layout and implementation of analog circuitsDesign and simulation of analog circuits
Skills RequiredLayout tools, fabrication process knowledge, circuit understandingCircuit theory, schematic design, simulation skills
Work EnvironmentFoundries, semiconductor companies, R&D labsDesign teams, R&D departments, EDA tool usage
Common UsageInvolved in physical design phaseInvolved in circuit conceptualization and schematic design

While both roles require a strong understanding of analog circuits, the Senior Analog Layout Engineer focuses on translating circuit schematics into physical layouts, ensuring manufacturability and performance. In contrast, the Analog IC Design Engineer primarily designs and simulates the circuits themselves. Both roles often collaborate but differ in their core responsibilities and skill sets.

What are the key skills and qualifications needed to thrive as a senior analog layout engineer?

To thrive as a Senior Analog Layout Engineer, you need deep knowledge of analog/mixed-signal IC layout, semiconductor device physics, and experience with advanced CMOS processes, typically supported by a relevant engineering degree. Proficiency with EDA tools such as Cadence Virtuoso, Mentor Graphics, and DRC/LVS verification systems is essential. Attention to detail, problem-solving, and strong collaboration skills set standout professionals apart in this role. These abilities ensure high-performance, reliable chip designs that meet stringent industry standards and project timelines.
What job categories do people searching Senior Analog Layout Engineer jobs in Chestnut Ridge, NY look for? The top searched job categories for Senior Analog Layout Engineer jobs in Chestnut Ridge, NY are:
What cities near Chestnut Ridge, NY are hiring for Senior Analog Layout Engineer jobs? Cities near Chestnut Ridge, NY with the most Senior Analog Layout Engineer job openings:

Senior IC Layout Designer (Remote - USA)

Encore Semi, Inc.

Clifton, NJ • Remote

$65 - $80/hr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 13 days ago


Job description

Senior IC Layout Designer (Remote – USA)
Employment Type: Full-Time (Hourly) | Contractor Opportunities Available
Compensation: Competitive Hourly Rate + Benefits + Bonus Opportunities
Work Authorization: US Citizen or Lawful Permanent Resident
Location: 100% Remote (Anywhere in the USA)
Build Next-Generation Silicon at Advanced Technology Nodes
We are looking for a Senior IC Layout Designer to join a highly skilled semiconductor engineering team developing advanced digital and mixed-signal integrated circuits. This role is ideal for an experienced layout professional who enjoys solving complex physical design challenges and turning innovative circuit designs into high-quality, production-ready silicon.
You will work closely with IC designers, verification engineers, and process teams to deliver layouts optimized for performance, power, area, reliability, and manufacturability across advanced process technologies.
What You’ll Do
  • Develop block-level and full-chip physical layouts for complex digital and mixed-signal IC designs.
  • Translate schematics into high-quality layout implementations while maintaining design intent.
  • Perform floorplanning, placement, routing, optimization, and layout refinement for PPA (Power, Performance, Area).
  • Drive DRC, LVS, and ERC closure, including debugging complex layout and verification issues.
  • Analyze and optimize layouts for parasitics, signal integrity, timing, and manufacturability.
  • Collaborate with circuit designers, physical verification teams, and foundry partners during tapeout and silicon release activities.
  • Support improvements in layout methodologies, automation, and design flows.
  • Mentor junior layout engineers and contribute technical expertise across the team.
What You Bring
  • 7+ years of hands-on IC layout design experience in advanced semiconductor technologies.
  • Strong expertise with industry-standard EDA tools such as Cadence Virtuoso, Synopsys tools, or equivalent platforms.
  • Deep understanding of CMOS process technology, physical design concepts, and layout best practices.
  • Proven experience achieving DRC/LVS closure and resolving complex physical verification challenges.
  • Strong knowledge of parasitic extraction, signal integrity, timing impact, and layout optimization techniques.
  • Experience collaborating within cross-functional semiconductor design teams.
Preferred Experience
  • Hands-on experience with FinFET and sub-7nm technology nodes.
  • Experience with high-speed digital, mixed-signal, or advanced SoC designs.
  • Familiarity with layout automation and scripting using SKILL, Python, TCL, or similar languages.
  • Track record supporting successful production tapeouts.
Why Join Us
Join a team working on challenging semiconductor designs where your layout expertise directly impacts silicon performance and product success. You’ll collaborate with experienced engineers tackling real-world challenges in advanced IC development.
If you are passionate about precision layout design, advanced nodes, and building world-class silicon, we would love to connect.
We offer a competitive hourly rate ranging from $65 to $80 per hour, based on experience, skills, and qualifications. The position includes a comprehensive benefits package and bonus opportunities
Full-Time Benefits:
• 15 days of PTO per calendar year
• 10 paid Holidays per calendar year
• Comprehensive Medical Benefits: Company covers 80% of premiums for Employee and Dependents
• Dental & Vision: Company covers 50% of premiums for Employee and Dependents
• Voluntary Benefits: Life Insurance, FSA (Health and Dependent, Limited Purpose), HAS, and Gap Insurance
• Employee Assistant Program (EAP)
• 401k - Traditional & Roth
• Life/AD&D and Long-Term Disability
• Tuition reimbursement
Equal Opportunity Policy Statement
Encore Semi, Inc. is an Equal Opportunity Employer that does not discriminate on the basis of actual or perceived race, religion, creed, color, age, sex, sexual orientation, gender, gender identity or expression, national origin, genetics, ancestry, marital status, civil union status, medical condition, disability (mental and physical), military and veteran status, pregnancy, childbirth and related medical conditions, or any other characteristic protected by applicable federal, state, or local laws and ordinances.
Encore Semi is also committed to compliance with all fair employment practices regarding citizenship and immigration status.
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