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Risc V Jobs (NOW HIRING)

We are looking for an experienced engineer to join a team working to refine and advance the RISC-V ISA and ecosystem. Breadth and adaptability are essential for applying skills across a wide ...

Qualcomm Technologies, Inc. is seeking a RISC-V CPU Compiler Engineer to join their innovative team. The role involves developing open source compiler toolsets for Qualcomm silicon and enhancing ...

RISC-V CPU Compiler Engineer Are you passionate about maximizing CPU performance and pushing the boundaries of optimization? Join our innovative team and play a key role in developing cutting-edge ...

$100K - $500K/yr

As the RISC-V software release and packaging engineer you will be responsible for building, packaging, and releasing the software that enables our customers to succeed with our RISC-V and system IP ...

Emulation Engineer - RISC -V

Cupertino, CA ยท On-site

$167K - $250K/yr

Familiarity with CPU architectures (RISC-V, x86, ARMv8), coherent communication protocols, and standard IO interfaces Infrastructure & Tooling * Experience building and maintaining production ...

You will own CPU focused test generator development and verification strategy, shaping how our out-of-order RISC-V CPUs are validated against complex ISA and microarchitectural behavior. This role is ...

In this role, you will define and optimize the RISC-V-based compute clusters, vector engines, and shared memory structures that power high-performance AI workloads. You'll collaborate closely with ...

$100K - $500K/yr

You understand RISC-V ISA behavior, memory ordering, trap and interrupt flows, and high-performance out-of-order CPU microarchitecture in depth. * You are comfortable debugging architectural ...

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Risc V information

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How much do risc v jobs pay per hour?

As of Jul 11, 2026, the average hourly pay for risc v in the United States is $31.52, according to ZipRecruiter salary data. Most workers in this role earn between $24.76 and $35.82 per hour, depending on experience, location, and employer.

What is a RISC-V job?

A RISC-V job typically involves working with the open-source RISC-V instruction set architecture (ISA) in roles such as hardware design, software development, embedded systems, and processor verification. Professionals in this field may develop RISC-V processors, design custom extensions, optimize software for RISC-V platforms, or contribute to the growing ecosystem of RISC-V tools and applications. These jobs are common in semiconductor companies, startups, and research institutions focused on open hardware innovation.

What are the key skills and qualifications needed to thrive in the Risc V position, and why are they important?

To excel in a RISC-V Engineering role, you need a solid background in computer architecture, digital design, and embedded systems, often demonstrated through a degree in electrical engineering, computer engineering, or a related field. Expertise with hardware description languages (such as Verilog or VHDL), simulation tools, and a thorough understanding of the RISC-V ISA is typically required, along with familiarity with industry-standard verification and design tools. Strong problem-solving abilities, attention to detail, and effective teamwork skills are important soft skills for this role. These competencies ensure the design, implementation, and optimization of RISC-V based solutions meet performance, reliability, and collaborative project goals.

What kinds of projects or products do RISC-V engineers typically work on?

RISC-V engineers are commonly involved in designing and implementing processor cores, developing microcontrollers, or creating custom chip solutions for a variety of industries such as consumer electronics, automotive, and IoT. You might work on everything from embedded devices and edge computing platforms to advanced data center processors using the open RISC-V instruction set architecture. Daily tasks often include collaborating with hardware and software teams to optimize system performance, troubleshoot complex design issues, and integrate RISC-V cores with other system components. This diverse project exposure provides valuable experience and career growth opportunities in the rapidly expanding open-source hardware ecosystem.

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What cities are hiring for Risc V jobs? Cities with the most Risc V job openings:
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Infographic showing various Risc V job openings in the United States as of July 2026, with employment types broken down into 1% Locum Tenens, 1% Internship, 34% As Needed, 34% Full Time, 29% Temporary, and 1% Contract. Highlights an 93% Physical, 1% Hybrid, and 6% Remote job distribution, with an average salary of $65,552 per year, or $31.5 per hour.

RISC-V AI / HPC & Agentic Software Engineering Lead

Tenstorrent

North, SC โ€ข On-site, Remote

$100K - $500K/yr

Other

Posted 20 days ago


Job description

Tenstorrent is building next-generation RISC-V CPUs optimized for AI, high-performance computing, and emerging autonomous AI systems. As the RISC-V AI / HPC & Agentic Software Engineering Lead, you will operate at the hardware-software boundary, enabling AI, HPC, and agentic AI software stacks on Tenstorrent's RISC-V processors.ย This role is responsible for integrating and optimizing Tenstorrent's LLK (Low-Level Kernel) infrastructure for CPU execution, while leading the bring-up of a RISC-V-native agentic AI software stack - including runtime orchestration, distributed execution frameworks, memory systems, and developer tools required for goal-driven AI systems.ย You will work closely with CPU architects, microarchitecture teams, compiler engineers, and AI kernel developers to ensure tight alignment between software capabilities and RISC-V architectural features.

This role is remote, based out of North America.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

  • A systems-oriented software engineer with deep experience in HPC and AI software stacks.
  • Experienced with distributed AI systems, orchestration frameworks, or agentic AI architectures.
  • Comfortable working close to hardware and instruction-level programming.
  • Skilled at translating performance targets into architectural and software requirements.
  • Experienced in runtime systems, profiling, and low-level optimization.
  • Motivated by hardware-software co-design and scaling next-generation AI infrastructure.

What We Need

  • Strong background in HPC and AI software development.
  • Solid understanding of RISC-V architecture (ISA, extensions, micro-architectural implications).
  • Proficiency in C/C++ and systems programming.
  • Experience optimizing performance-critical code paths.
  • Experience with agentic AI frameworks, distributed execution systems, or orchestration platforms.
  • Familiarity with compiler toolchains (LLVM, GCC).
  • Experience with vectorization, custom ISA extensions, or accelerator integration.

What You Will Learn

  • How AI and agentic workloads map to RISC-V microarchitecture.
  • Custom ISA extension design for AI acceleration.
  • End-to-end HPC/AI/agentic stack integration.
  • Runtime orchestration for distributed AI systems.
  • Hardware-software co-design for scalable AI-native CPU platforms.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.