RISC-V Software Engineer
Vancouver, WA · On-site
Exposure to the RISC-V architecture. * Good understanding of ARM virtualization extensions or ARM Trustzone or ARM CCA or RISC-V hypervisor extensions or RISC-V CoVE. * Proven experience in ...
Vancouver, WA · On-site
Exposure to the RISC-V architecture. * Good understanding of ARM virtualization extensions or ARM Trustzone or ARM CCA or RISC-V hypervisor extensions or RISC-V CoVE. * Proven experience in ...
Vancouver, WA · On-site
Exposure to the RISC-V architecture. * Good understanding of ARM virtualization extensions or ARM Trustzone or ARM CCA or RISC-V hypervisor extensions or RISC-V CoVE. * Proven experience in ...
North, SC · On-site +1
$100K - $500K/yr
As the RISC-V AI / HPC & Agentic Software Engineering Lead, you will operate at the hardware-software boundary, enabling AI, HPC, and agentic AI software stacks on Tenstorrent's RISC-V processors.
North, SC · On-site +1
$100K - $500K/yr
As the RISC-V AI / HPC & Agentic Software Engineering Lead, you will operate at the hardware-software boundary, enabling AI, HPC, and agentic AI software stacks on Tenstorrent's RISC-V processors.
Austin, TX · On-site
$167K - $250K/yr
RISC-V CPU Compiler Engineer Are you passionate about maximizing CPU performance and pushing the boundaries of optimization? Join our innovative team and play a key role in developing cutting-edge ...
Austin, TX · On-site
$167K - $250K/yr
RISC-V CPU Compiler Engineer Are you passionate about maximizing CPU performance and pushing the boundaries of optimization? Join our innovative team and play a key role in developing cutting-edge ...
RISC-V CPU Compiler Engineer Are you passionate about maximizing CPU performance and pushing the boundaries of optimization? Join our innovative team and play a key role in developing cutting-edge ...
RISC-V CPU Compiler Engineer Are you passionate about maximizing CPU performance and pushing the boundaries of optimization? Join our innovative team and play a key role in developing cutting-edge ...
$100K - $500K/yr
As the RISC-V software release and packaging engineer you will be responsible for building, packaging, and releasing the software that enables our customers to succeed with our RISC-V and system IP ...
$100K - $500K/yr
As the RISC-V software release and packaging engineer you will be responsible for building, packaging, and releasing the software that enables our customers to succeed with our RISC-V and system IP ...
$140K - $185K/yr
What You Can Expect RISC-V MCU / SoC Integration Ownership * Lead integration of an embedded RISC-V core (e.g., SiFive E24 Core) into chip validation environments * Define MCU subsystem architecture ...
$140K - $185K/yr
What You Can Expect RISC-V MCU / SoC Integration Ownership * Lead integration of an embedded RISC-V core (e.g., SiFive E24 Core) into chip validation environments * Define MCU subsystem architecture ...
Santa Clara, CA · On-site
$140K - $185K/yr
What You Can Expect RISC-V MCU / SoC Integration Ownership * Lead integration of an embedded RISC-V core (e.g., SiFive E24 Core) into chip validation environments * Define MCU subsystem architecture ...
Santa Clara, CA · On-site
$140K - $185K/yr
What You Can Expect RISC-V MCU / SoC Integration Ownership * Lead integration of an embedded RISC-V core (e.g., SiFive E24 Core) into chip validation environments * Define MCU subsystem architecture ...
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data ...
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data ...
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data ...
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data ...
Cupertino, CA · On-site
$167K - $250K/yr
Familiarity with CPU architectures (RISC-V, x86, ARMv8), coherent communication protocols, and standard IO interfaces Infrastructure & Tooling * Experience building and maintaining production ...
Cupertino, CA · On-site
$167K - $250K/yr
Familiarity with CPU architectures (RISC-V, x86, ARMv8), coherent communication protocols, and standard IO interfaces Infrastructure & Tooling * Experience building and maintaining production ...
You will own CPU focused test generator development and verification strategy, shaping how our out-of-order RISC-V CPUs are validated against complex ISA and microarchitectural behavior. This role is ...
You will own CPU focused test generator development and verification strategy, shaping how our out-of-order RISC-V CPUs are validated against complex ISA and microarchitectural behavior. This role is ...
Los Altos, CA · On-site
In this role, you will define and optimize the RISC-V-based compute clusters, vector engines, and shared memory structures that power high-performance AI workloads. You'll collaborate closely with ...
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Los Altos, CA · On-site
In this role, you will define and optimize the RISC-V-based compute clusters, vector engines, and shared memory structures that power high-performance AI workloads. You'll collaborate closely with ...
Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value ...
Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value ...
$100K - $500K/yr
You understand RISC-V ISA behavior, memory ordering, trap and interrupt flows, and high-performance out-of-order CPU microarchitecture in depth. * You are comfortable debugging architectural ...
$100K - $500K/yr
You understand RISC-V ISA behavior, memory ordering, trap and interrupt flows, and high-performance out-of-order CPU microarchitecture in depth. * You are comfortable debugging architectural ...
$111K - $146K/yr
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data ...
$111K - $146K/yr
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data ...
Santa Clara, CA · On-site
$120K - $158K/yr
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data ...
Santa Clara, CA · On-site
$120K - $158K/yr
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data ...
$101K - $133K/yr
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data ...
$101K - $133K/yr
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data ...
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data ...
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data ...
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data ...
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data ...
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data ...
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data ...
$15.63 - $18.75
2% of jobs
$18.75 - $21.88
9% of jobs
$24.94 is the 25th percentile. Wages below this are outliers.
$21.88 - $25
14% of jobs
$25 - $28.13
19% of jobs
The median wage is $29.14 / hr.
$28.13 - $31.25
18% of jobs
$31.25 - $34.38
13% of jobs
$34.47 is the 75th percentile. Wages above this are outliers.
$34.38 - $37.50
8% of jobs
$37.50 - $40.63
6% of jobs
$40.63 - $43.75
4% of jobs
$43.75 - $46.88
3% of jobs
$46.88 - $50
3% of jobs
$15
$31
$50
A RISC-V job typically involves working with the open-source RISC-V instruction set architecture (ISA) in roles such as hardware design, software development, embedded systems, and processor verification. Professionals in this field may develop RISC-V processors, design custom extensions, optimize software for RISC-V platforms, or contribute to the growing ecosystem of RISC-V tools and applications. These jobs are common in semiconductor companies, startups, and research institutions focused on open hardware innovation.
To excel in a RISC-V Engineering role, you need a solid background in computer architecture, digital design, and embedded systems, often demonstrated through a degree in electrical engineering, computer engineering, or a related field. Expertise with hardware description languages (such as Verilog or VHDL), simulation tools, and a thorough understanding of the RISC-V ISA is typically required, along with familiarity with industry-standard verification and design tools. Strong problem-solving abilities, attention to detail, and effective teamwork skills are important soft skills for this role. These competencies ensure the design, implementation, and optimization of RISC-V based solutions meet performance, reliability, and collaborative project goals.
RISC-V engineers are commonly involved in designing and implementing processor cores, developing microcontrollers, or creating custom chip solutions for a variety of industries such as consumer electronics, automotive, and IoT. You might work on everything from embedded devices and edge computing platforms to advanced data center processors using the open RISC-V instruction set architecture. Daily tasks often include collaborating with hardware and software teams to optimize system performance, troubleshoot complex design issues, and integrate RISC-V cores with other system components. This diverse project exposure provides valuable experience and career growth opportunities in the rapidly expanding open-source hardware ecosystem.

9.6
Based on 5 frontline employees who took The Breakroom Quiz
5th of 191 rated software companies
Sourced by ZipRecruiter
Qualcomm is enabling a world where everyone and everything can be intelligently connected. You interact with products and technologies made possible by Qualcomm every day, including 5G-enabled smartphones that double as pro-level cameras and gaming devices, smarter vehicles and cities, and the technology behind the smart, connected factories that manufactured your latest purchase. Our powerful connectivity solutions keep you connected—even in remote areas. Qualcomm 5G and AI innovations are the power behind the connected intelligent edge. You’ll find our technologies behind and inside the innovations that deliver significant value across multiple industries and to billions of people every day.
Technology, communication and media
10,000+ Employees
San Diego, CA, US
1985