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Remote Digital Verification Engineer Jobs (NOW HIRING)

Role Overview As an ASIC Design Verification Engineer, you will play a critical role in ensuring ... Flexible work environment with remote work options If you are excited about ensuring the highest ...

As a Design Verification Engineer, you will be part of an agile team working with experienced ... what digital connection makes possible today--beyond the constraints of screens, the limits of ...

As a Design Verification Engineer, you will be part of an agile team working with experienced ... what digital connection makes possible today--beyond the constraints of screens, the limits of ...

The Role We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify ... Solid understanding of SystemVerilog, digital logic, RTL design, DFT, and hardware design and ...

Design, build, and maintain scalable backend services that power automated verification workflows ... Remote Travel requirements As a digital first company, the majority of your work can be ...

SOC Verification

New Marlborough, MA · Remote

$139K/yr

Remote 1. General verification expertise - * System Verilog * UVM working experience (In the ... Check that engineer has done reasonable amount of debug in past projects * Has logical and ...

Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization ... what digital connection makes possible today--beyond the constraints of screens, the limits of ...

Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization ... what digital connection makes possible today--beyond the constraints of screens, the limits of ...

ASIC Engineer, Design Verification Responsibilities: * Define and implement IP/SoC verification ... what digital connection makes possible today--beyond the constraints of screens, the limits of ...

ASIC Engineer, Design Verification Responsibilities: * Define and implement IP/SoC verification ... what digital connection makes possible today--beyond the constraints of screens, the limits of ...

Showing results 41-60

Remote Digital Verification Engineer information

See salary details

$80K

$142.6K

$203.5K

How much do remote digital verification engineer jobs pay per year?

As of Aug 8, 2026, the average yearly pay for remote digital verification engineer in the United States is $142,619.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

Are remote digital verification engineers in demand?

Remote digital verification engineers are in high demand due to the growth of semiconductor and electronics industries, as well as the increasing complexity of integrated circuits. Skills in hardware description languages like VHDL or Verilog, along with experience in verification tools, enhance employability in this field.

What is the difference between Remote Digital Verification Engineer vs Remote Hardware Verification Engineer?

AspectRemote Digital Verification EngineerRemote Hardware Verification Engineer
Required CredentialsBachelor's in Electrical Engineering, Computer Engineering, or related; knowledge of verification toolsBachelor's in Electrical Engineering, Computer Engineering, or related; hardware testing certifications
Work EnvironmentDesign teams, software simulation, FPGA/ASIC verificationHardware labs, testing on physical hardware, FPGA/ASIC testing
Employer & Industry UsageSemiconductor, electronics, tech companiesSemiconductor, electronics, hardware manufacturing
Search & Comparison IntentYesYes

The Remote Digital Verification Engineer focuses on verifying digital designs through simulation and software tools, while the Remote Hardware Verification Engineer tests physical hardware components. Both roles require similar educational backgrounds but differ in work environment and specific skill sets. Candidates often compare these roles when exploring opportunities in semiconductor and electronics industries.

What are some common challenges faced by remote digital verification engineers and how can they be addressed?

Remote Digital Verification Engineers often encounter challenges related to communication and collaboration, particularly when working with global teams across different time zones. Ensuring clear documentation and leveraging collaboration tools like version control systems and project management platforms can help mitigate these challenges. Additionally, staying proactive in asking questions and participating in regular virtual meetings can foster smoother workflows. Adapting to remote work also requires strong self-discipline and time management skills to meet tight project deadlines.

What are the key skills and qualifications needed to thrive as a remote digital verification engineer?

To thrive as a Remote Digital Verification Engineer, you need expertise in digital design principles, verification methodologies, and a relevant engineering degree, often supported by experience with ASIC or FPGA projects. Familiarity with technical tools like SystemVerilog, UVM, simulation environments, and version control systems is critical, as is proficiency with scripting languages such as Python or Perl. Strong problem-solving abilities, attention to detail, and effective communication are standout soft skills, especially when collaborating across distributed teams. These skills and qualities are vital for ensuring accurate, efficient verification of complex digital systems while maintaining productivity in a remote work environment.

What does a remote digital verification engineer do?

A Remote Digital Verification Engineer is responsible for ensuring the functionality and reliability of digital hardware designs, such as integrated circuits, by developing and running tests to identify and fix design flaws. Working remotely, they use simulation tools, write testbenches in languages like SystemVerilog or UVM, and collaborate with design teams to validate that the digital circuits meet the required specifications. Their work helps prevent costly errors in the final product and ensures a smooth manufacturing process. Being remote, they rely on digital communication and project management tools to collaborate effectively with team members worldwide.
More about Remote Digital Verification Engineer jobs
What cities are hiring for Remote Digital Verification Engineer jobs? Cities with the most Remote Digital Verification Engineer job openings:
What are the most commonly searched types of Digital Verification Engineer jobs? The most popular types of Digital Verification Engineer jobs are:
What states have the most Remote Digital Verification Engineer jobs? States with the most job openings for Remote Digital Verification Engineer jobs include:
What job categories do people searching Remote Digital Verification Engineer jobs look for? The top searched job categories for Remote Digital Verification Engineer jobs are:
Infographic showing various Remote Digital Verification Engineer job openings in the United States as of August 2026, with employment types broken down into 70% Full Time, and 30% Contract. Highlights an 100% Remote job distribution, with an average salary of $142,619 per year, or $68.6 per hour.

Principal ASIC Verification Engineer

Cornelis Networks, Inc.

Boston, MA • Remote

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 2 days ago

New


Job description

At Cornelis we’re building the future of AI and HPC networking with an AI-first approach to silicon and software development. We’re seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from chip architecture to system performance at scale.


At Cornelis we’re building the future of AI and HPC networking with an AI-first approach to silicon and software development. We’re seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from chip architecture to system performance at scale.


Cornelis Networks delivers the world’s highest performance scale-out networking solutions for AI and HPC datacenters. Our differentiated architecture seamlessly integrates hardware, software and system level technologies to maximize the efficiency of GPU, CPU and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI & HPC workloads, empowering our customers to push the boundaries of innovation. Backed by top-tier venture capital and strategic investors, we are committed to innovation, performance and scalability - solving the world’s most demanding computational challenges with our next-generation networking solutions.  


We are a fast-growing, forward-thinking team of architects, engineers, and business professionals with a proven track record of building successful products and companies. As a global organization, our team spans multiple U.S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles. 


Cornelis Networks is hiring a Principal ASIC Verification Engineer with advanced skills and knowledge in key areas required to verify world-class SoCs to be deployed in high performance computing, high performance data analytics, and artificial intelligence interconnect solutions. As a member of the ASIC leadership team with hands-on technical experience, you will be responsible for the verification closure of entire projects, including design modules, sub-systems, and SoCs. You will drive a wide range of activities including test-planning, UVM based testbench development, regression and coverage closure. You will have the opportunity to partner and collaborate with ASIC design, emulation, system hardware and post-silicon teams and help create a first-pass silicon success. A preferred candidate will have 10 + years of relevant experience in networking hardware verification, proven expertise in verifying one or more of the following: 50G, 100G, 400G Ethernet MAC/PCS protocols, UDP, TCP/IP, RDMA/RoCE, IPSec. and their application in high-speed data processing/networking. Experience utilizing AI tools to generate test plans and improve the productivity of verification process and team is highly desirable.


 Key Technical Responsibilities:

  • Define overall SOC level verification strategy, technical planning, direction
  • Enable and drive the development of UVM environments to verify RTL at block, unit, and SoC levels
  • Develop and execute functional tests according to verification test plans
  • Instrument TB for functional and code coverage and drive to closure based on the coverage metrics
  • Collaborate with cross-functional teams like design, software, emulation and silicon validation teams towards ensuring the highest design quality


Team Responsibilities: 

  • Day-to-day guidance and leadership of team members
  • Driving results via mentoring, coaching, and counseling
  • Education of team in the use of AI tools to enhance productivity and efficiencies
  • Generation and enforcement of coding and verification guidelines

Minimum Qualifications: 

  • 15 + years of experience with the following:
  • Hands-on experience with writing code using UVM/System Verilog
  • Verification for complex SoCs that include multiple clock and reset domains, using VCS or equivalent simulation tools
  • Debugging fails to the line of RTL, closing out bug fixes, using Verdi or equivalent debug tools
  • Experience in ground up testbench development
  • Experience with revision control systems like Git or SVN etc.
  • B.S. Degree in Computer Engineering, Computer Science, or Electrical Engineering


Preferred Qualifications: 

  • M.S. Degree in Computer Engineering, Computer Science, or Electrical Engineering
  • 15 + years of relevant experience in networking hardware verification, proven expertise in verifying 50G, 100G, 400G Ethernet MAC/PCS protocols, TCP/IP, RDMA/RoCE, IPSec. and their application in high-speed data processing/networking
  • One or more scripting languages (TCL, Python, Perl, Shell-scripting)
  • Track record of first-pass success in ASIC and Systems


Location: This is a remote position for employees residing within the United States.


We offer a competitive compensation package that includes equity, cash, and incentives, along with health and retirement benefits. Our dynamic, flexible work environment provides the opportunity to collaborate with some of the most influential names in the semiconductor industry.  


At Cornelis Networks your base salary is only one component of your comprehensive total rewards package. Your base pay will be determined by factors such as your skills, qualifications, experience, and location relative to the hiring range for the position. Depending on your role, you may also be eligible for performance-based incentives, including an annual bonus or sales incentives. 


In addition to your base pay, you’ll have access to a broad range of benefits, including medical, dental, and vision coverage, as well as disability and life insurance, a dependent care flexible spending account, accidental injury insurance, and pet insurance. We also offer generous paid holidays, 401(k) with company match, and Open Time Off (OTO) for regular full-time exempt employees. Other paid time off benefits include sick time, bonding leave, and pregnancy disability leave. 


Cornelis Networks does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. Cornelis Networks is an equal opportunity employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.