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Physical Design Jobs in Oregon (NOW HIRING)

Nvidia

Senior CPU Design Engineer

Hillsboro, OR · Hybrid

You will work closely with fellow design engineers, architects, verification engineers, and physical design engineers to accomplish your tasks. What you will be doing: * Drive the micro-architecture ...

Apple

CPU Design Timing Engineer

Beaverton, OR

... of physical design tools and methodology including but not limited to physically aware synthesis and place & route tools and flows, extraction, and other analysis flows, and physical design ...

Apple

CPU Design Timing Engineer

Beaverton, OR · On-site

... of physical design tools and methodology including but not limited to physically aware synthesis and place & route tools and flows, extraction, and other analysis flows, and physical design ...

K2 Space

Senior ASIC Design Verification Engineer

OR · On-site +1

$170K - $250K/yr

You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a ...

K2 Space

Principal ASIC Design Verification Engineer

OR · On-site +1

$190K - $285K/yr

You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a ...

Apple

ASIC Design Engineer

Beaverton, OR · On-site

... and Physical Design teams - Collaborate with software and systems teams to ensure a high quality Minimum Qualifications BS and a minimum of 10 years relevant industry experience. Verilog RTL Logic ...

Apple

ASIC Design Engineer

Beaverton, OR

... STA, and Physical Design teams - Collaborate with software and systems teams to ensure a high quality Preferred Qualifications Experience writing specifications and converting them to design.

Apple

Timing Design Engineer

Beaverton, OR

You will closely interact with RTL designer to understand design intent and clock structure, with CAD to understand and develop flow, and with Physical design team to close and sign-off timing. You ...

Apple

Timing Design Engineer

Beaverton, OR · On-site

You will closely interact with RTL designer to understand design intent and clock structure, with CAD to understand and develop flow, and with Physical design team to close and sign-off timing. You ...

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Physical Design information

See Oregon salary details

$100.4K

$149.6K

How much do physical design jobs pay per year?

As of Aug 14, 2026, the average yearly pay for physical design in Oregon is $147,395.00, according to ZipRecruiter salary data. Most workers in this role earn between $143,800.00 and $148,000.00 per year, depending on experience, location, and employer.

What is physical design in the context of electronics and semiconductors?

Physical design refers to the process of transforming a circuit's logical representation into a geometrical layout that can be manufactured on a semiconductor chip. This involves placing and routing the various components, such as transistors and interconnections, while meeting performance, power, and area constraints. Physical design engineers use specialized software tools to optimize the layout and ensure it adheres to manufacturing rules. The process is a critical step in the development of integrated circuits (ICs) and directly impacts the chip’s speed, power consumption, and size.

What are the key skills and qualifications needed to thrive as a physical design engineer, and why are they important?

To thrive as a Physical Design Engineer, you need a solid background in electrical engineering, digital circuit design, and VLSI concepts, usually supported by a relevant degree. Proficiency with EDA tools like Cadence, Synopsys, or Mentor Graphics, as well as familiarity with scripting languages (e.g., TCL, Perl), is essential. Strong problem-solving, attention to detail, and effective communication skills help you address complex design challenges and collaborate within cross-functional teams. These competencies are crucial for optimizing chip layouts, ensuring manufacturability, and meeting performance and timing requirements in semiconductor development.

What are some common challenges faced by physical design engineers in meeting timing closure during chip development?

Physical Design engineers often encounter challenges in achieving timing closure due to factors such as increasing circuit complexity, tight power and area constraints, and process variations. Meeting timing goals requires careful floorplanning, placement, and routing, as well as close collaboration with logic design and verification teams to resolve critical path issues. Engineers must also frequently iterate designs and use advanced EDA tools to optimize performance while balancing trade-offs between speed, power, and manufacturability.

How to get into physical design?

To enter physical design, candidates typically need a bachelor's degree in electrical engineering, computer engineering, or a related field. Gaining experience with hardware description languages like VHDL or Verilog, and proficiency in EDA tools such as Synopsys or Cadence, is essential. Internships or entry-level positions in chip design can also provide valuable practical experience.

What is the difference between Physical Design vs Logic Design?

AspectPhysical DesignLogic Design
Primary FocusTranslating logical circuits into physical layoutsCreating logical circuit schematics and functional specifications
Skills RequiredEDA tools, layout constraints, circuit optimizationHardware description languages, digital logic, circuit theory
Work EnvironmentASIC/FPGA design teams, semiconductor companiesDesign teams, electronic design automation (EDA) environments
CertificationsTypically none specific, but EDA tool proficiency is valuedHardware description language certifications (e.g., VHDL, Verilog)

Physical Design and Logic Design are closely related stages in chip development. Logic Design focuses on creating the logical circuit functions, while Physical Design involves implementing those functions into physical layouts on silicon. Both roles require knowledge of digital circuits, but Physical Design emphasizes layout optimization and tool proficiency, whereas Logic Design centers on circuit behavior and description.

What are popular job titles related to Physical Design jobs in Oregon?

For Physical Design jobs in Oregon, the most frequently searched job titles are:

What job categories do people searching Physical Design jobs in Oregon look for?

The top searched job categories for Physical Design jobs in Oregon are:

What cities in Oregon are hiring for Physical Design jobs?

Cities in Oregon with the most Physical Design job openings:

Physical Design jobs near you
Infographic showing various Physical Design job openings in Oregon as of August 2026, with employment types broken down into 78% Full Time, and 22% Part Time. Highlights an 100% In-person job distribution, with an average salary of $147,395 per year, or $70.9 per hour.

SoC Physical Design Engineer, STA/Timing

Apple

Beaverton, OR

$141K - $145K/yr

Full-time

Re-posted 9 days ago

Apple rating

8.0

Company rating: 8.0 out of 10

Based on 677 frontline employees who took The Breakroom Quiz

7th of 30 rated technology retailers

Job description

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it! Join us to help deliver the next groundbreaking Apple product.
In this visible role, you will be directly responsible for the physical implementation of design partition(s) (from netlist to tapeout) for a highly complex SOC using state of the art process technology.
Description
- Work with design teams to understand and debug constraints and facilitate logic changes to improve timing.
- Work with the Physical Design team, highlighting issues and best practices.
- Help create timing ECO’s for project tapeout.
- Create and maintain scripts and methodologies for analysis and runs.
- Create documentation and help with guidelines/specs.
- Deep analysis of timing paths to identify key issues.
- Implement timing infrastructure.
Preferred Qualifications
Experience with large design STA and/or Timing Closure.
Experience with timing of large high-performance SoC designs in sub-micron technologies.
Deep understanding of noise, crosstalk, OCV and other timing modeling effects.
Knowledge of circuit modeling including timing models, worst-case timing corner selection, and SPICE simulation.
Experience in ECO techniques and implementation.
Experience with other scripting languages such as Perl or python.
Good communicator who can accurately describe issues, propose solutions, and drive them through completion.
Minimum Qualifications
Minimum BS and 10+ years of relevant industry experience
Strong programming skills with TCL

What Apple employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom

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About Apple

Sourced by ZipRecruiter

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Cupertino, CA, US

Year founded

1976

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