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Physical Design Jobs in Oregon (NOW HIRING)

In this position, you will get the chance to build complex chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams. What you'll be doing:

Own front-end design quality checks and reviews to present the physical design team with high-quality RTL What we need to see: * A Masters in Computer or Electrical Engineering or equivalent ...

Good understanding of VLSI package design along with interposer and IC physical design. Strong expertise in developing interposer design flows and methodologies. NVIDIA is widely considered to be the ...

Senior CPU Design Engineer

Hillsboro, OR · On-site

$168 - $310.50/hr

Deliver synthesis/timing‑clean designs, collaborate with physical design for routable layouts. * Support hardware engineering activities including floor plan, power/clock distribution, chip ...

You will work closely with fellow design engineers, architects, verification engineers, and physical design engineers to accomplish your tasks. Whatyouwillbedoing: Drive the micro-architecture ...

You will work closely with fellow design engineers, architects, verification engineers, and physical design engineers to accomplish your tasks. Whatyouwillbedoing: Drive the micro-architecture ...

You will work closely with fellow design engineers, architects, verification engineers, and physical design engineers to accomplish your tasks. What you will be doing: * Drive the micro-architecture ...

Showing results 41-60

Physical Design information

See Oregon salary details

$100.4K

$149.6K

How much do physical design jobs pay per year?

As of Sep 5, 2026, the average yearly pay for physical design in Oregon is $147,395.00, according to ZipRecruiter salary data. Most workers in this role earn between $143,800.00 and $148,000.00 per year, depending on experience, location, and employer.

What is physical design in the context of electronics and semiconductors?

Physical design refers to the process of transforming a circuit's logical representation into a geometrical layout that can be manufactured on a semiconductor chip. This involves placing and routing the various components, such as transistors and interconnections, while meeting performance, power, and area constraints. Physical design engineers use specialized software tools to optimize the layout and ensure it adheres to manufacturing rules. The process is a critical step in the development of integrated circuits (ICs) and directly impacts the chip’s speed, power consumption, and size.

What are the key skills and qualifications needed to thrive as a physical design engineer, and why are they important?

To thrive as a Physical Design Engineer, you need a solid background in electrical engineering, digital circuit design, and VLSI concepts, usually supported by a relevant degree. Proficiency with EDA tools like Cadence, Synopsys, or Mentor Graphics, as well as familiarity with scripting languages (e.g., TCL, Perl), is essential. Strong problem-solving, attention to detail, and effective communication skills help you address complex design challenges and collaborate within cross-functional teams. These competencies are crucial for optimizing chip layouts, ensuring manufacturability, and meeting performance and timing requirements in semiconductor development.

What are some common challenges faced by physical design engineers in meeting timing closure during chip development?

Physical Design engineers often encounter challenges in achieving timing closure due to factors such as increasing circuit complexity, tight power and area constraints, and process variations. Meeting timing goals requires careful floorplanning, placement, and routing, as well as close collaboration with logic design and verification teams to resolve critical path issues. Engineers must also frequently iterate designs and use advanced EDA tools to optimize performance while balancing trade-offs between speed, power, and manufacturability.

What is the difference between Physical Design vs Logic Design?

AspectPhysical DesignLogic Design
Primary FocusTranslating logical circuits into physical layoutsCreating logical circuit schematics and functional specifications
Skills RequiredEDA tools, layout constraints, circuit optimizationHardware description languages, digital logic, circuit theory
Work EnvironmentASIC/FPGA design teams, semiconductor companiesDesign teams, electronic design automation (EDA) environments
CertificationsTypically none specific, but EDA tool proficiency is valuedHardware description language certifications (e.g., VHDL, Verilog)

Physical Design and Logic Design are closely related stages in chip development. Logic Design focuses on creating the logical circuit functions, while Physical Design involves implementing those functions into physical layouts on silicon. Both roles require knowledge of digital circuits, but Physical Design emphasizes layout optimization and tool proficiency, whereas Logic Design centers on circuit behavior and description.

How to get into physical design?

To enter physical design, candidates typically need a bachelor's degree in electrical engineering, computer engineering, or a related field. Gaining experience with hardware description languages like VHDL or Verilog, and proficiency in EDA tools such as Synopsys or Cadence, is essential. Internships or entry-level positions in chip design can also provide valuable practical experience.

What is the future of physical design?

The future of physical design in chip design involves increased automation through advanced EDA tools, integration of machine learning for optimization, and a focus on power efficiency and performance. As technology nodes shrink, physical design engineers will need to adapt to more complex constraints and tighter schedules, often requiring expertise in scripting and tool customization.

What cities in Oregon are hiring for Physical Design jobs?

Cities in Oregon with the most Physical Design job openings:

Infographic showing various Physical Design job openings in Oregon as of August 2026, with employment types broken down into 78% Full Time, and 22% Part Time. Highlights an 100% In-person job distribution, with an average salary of $147,395 per year, or $70.9 per hour.

CPU Full-chip Physical Integration Engineer

Apple Inc.

Beaverton, OR • On-site

$120 - $150/hr

Other

Re-posted 23 days ago


Apple rating

8.1

Company rating: 8.1 out of 10

Based on 683 frontline employees who took The Breakroom Quiz

6th of 30 rated technology retailers


Job description

CPU Full-chip Physical Integration Engineer

Apple’s Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level implementation.

Description
  • Participating in the physical design, integration, and verification of high performance, low power processor development.
  • Full chip floorplan, area optimizations, block partitioning and pin placements.
  • Own chip level place and route (PnR), final CPU layout database construction and verification (PDV).
  • Develop and validate Power Grid, including routability analysis.
  • Drive custom layout integration, block and full-chip level EM/IR, electrical verification/analysis as well as formal verification.
  • Work with the implementation/CAD teams during the entire chip design cycle to drive signoff closure for tapeout.
  • Work with the SOC team to meet IP technical and delivery requirements.
  • Participate in establishing CAD and physical design methodologies and flow development for chip integration and analysis.
  • Scripting to automate tasks and improve debug efficiency.
Minimum Qualifications
  • Minimum BS and 10+ years of relevant industry experience
  • Experience with scripting in Perl or TCL
Preferred Qualifications
  • Knowledge of industrial standards and practices in Physical Design, including Floorplanning, Partitioning, Budgeting, Place and Route and Physical Verification
  • Experience in developing and implementing Power Grid and Clock specifications
  • Solid knowledge of Low Power Design, Physical Construction, Integration, EMIR (Drop/Noise), SIGEM Analysis, Formal Verification, Physical PDV, DRC/LVS Verification, and DFM
  • Solid understanding of verification tools such as Conformal LP, LEC, RedHawk, Calibre
  • Solid understanding of CMOS circuit design. Layout design background is a plus
  • Working knowledge of Extraction and STA methodology and tools
  • Working knowledge of Computer Architecture
  • Ability to work well in a team, being an excellent problem solver, and self motivated

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.

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About Apple

Sourced by ZipRecruiter

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Cupertino, CA, US

Year founded

1976