Position Overview IC Enable is seeking a motivated and detail-oriented Junior IC Layout Design Engineer to join our growing team in Richardson, Texas. This role is ideal for an early-career engineer ...
Position Overview IC Enable is seeking a motivated and detail-oriented Junior IC Layout Design Engineer to join our growing team in Richardson, Texas. This role is ideal for an early-career engineer ...
The team has an exciting opportunity for a IC Layout Design Engineer V to join our diverse team ... This position is best suited for a junior-mid level engineer who is hungry, humble and smart and is ...
The team has an exciting opportunity for a IC Layout Design Engineer V to join our diverse team ... This position is best suited for a junior-mid level engineer who is hungry, humble and smart and is ...
Analog/RF IC Layout Design Engineer
Colorado Springs, CO · On-site
$117K - $195K/yr
Assisting the design team with IC floorplanning, creating grid cells and other custom layouts * Coordinating layout activities with other layout engineers and contractors Complete chip level sign-off ...
Analog/RF IC Layout Design Engineer
Colorado Springs, CO · On-site
$117K - $195K/yr
Assisting the design team with IC floorplanning, creating grid cells and other custom layouts * Coordinating layout activities with other layout engineers and contractors Complete chip level sign-off ...
Analog/RF IC Layout Design Engineer
Colorado Springs, CO · On-site
$117K - $195K/yr
Assisting the design team with IC floorplanning, creating grid cells and other custom layouts * Coordinating layout activities with other layout engineers and contractors Complete chip level sign-off ...
Analog/RF IC Layout Design Engineer
Colorado Springs, CO · On-site
$117K - $195K/yr
Assisting the design team with IC floorplanning, creating grid cells and other custom layouts * Coordinating layout activities with other layout engineers and contractors Complete chip level sign-off ...
Analog/RF IC Layout Design Engineer
Santa Clara, CA · On-site
$117K - $195K/yr
Assisting the design team with IC floorplanning, creating grid cells and other custom layouts * Coordinating layout activities with other layout engineers and contractors Complete chip level sign-off ...
Analog/RF IC Layout Design Engineer
Santa Clara, CA · On-site
$117K - $195K/yr
Assisting the design team with IC floorplanning, creating grid cells and other custom layouts * Coordinating layout activities with other layout engineers and contractors Complete chip level sign-off ...
... chip design with advanced architectures and hardware accelerators with a goal of enhancing the ... As an Analog IC Layout Engineer, your responsibilities will include: * Crafting state-of-the-art ...
... chip design with advanced architectures and hardware accelerators with a goal of enhancing the ... As an Analog IC Layout Engineer, your responsibilities will include: * Crafting state-of-the-art ...
Sr. Layout Design Engineer with SRAM Experience Location : Santa Clara, CA Location ... Remote · 10+ years of custom IC layout experience, including 5+ years in SRAM, memory compiler, or ...
Sr. Layout Design Engineer with SRAM Experience Location : Santa Clara, CA Location ... Remote · 10+ years of custom IC layout experience, including 5+ years in SRAM, memory compiler, or ...
Analog IC Layout Engineer
South San Francisco, CA · On-site
$83K - $139K/yr
As an Analog IC Layout Engineer, your responsibilities will include: * Crafting state-of-the-art ... Experience with layout P-cell design and implementation * Experience with layout automation ...
Analog IC Layout Engineer
South San Francisco, CA · On-site
$83K - $139K/yr
As an Analog IC Layout Engineer, your responsibilities will include: * Crafting state-of-the-art ... Experience with layout P-cell design and implementation * Experience with layout automation ...
Sr. Analog Physical Design Engineer
$156K - $160K/yr
Job Title: Sr. Analog Physical Design Engineer Job Duties: * Work on detailed column ADC circuit ... Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ...
Sr. Analog Physical Design Engineer
$156K - $160K/yr
Job Title: Sr. Analog Physical Design Engineer Job Duties: * Work on detailed column ADC circuit ... Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ...
Analog Layout Design Engineer
Cupertino, CA · On-site
$249K/yr
Analog Layout Design Engineer We are currently looking for an Analog Layout Design Engineer for an ... Experience developing and leading complex IC layouts for high-speed applications in advanced CMOS ...
Analog Layout Design Engineer
Cupertino, CA · On-site
$249K/yr
Analog Layout Design Engineer We are currently looking for an Analog Layout Design Engineer for an ... Experience developing and leading complex IC layouts for high-speed applications in advanced CMOS ...
... junior engineers, and help raise layout quality and execution rigor across the team ... What we need to see: · Have a BSEE or equivalent experience · 10+ years of custom IC layout ...
... junior engineers, and help raise layout quality and execution rigor across the team ... What we need to see: · Have a BSEE or equivalent experience · 10+ years of custom IC layout ...
Job Title: Sr. Analog Physical Design Engineer Job Duties: * Work on detailed column ADC circuit ... Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ...
Quick apply
Job Title: Sr. Analog Physical Design Engineer Job Duties: * Work on detailed column ADC circuit ... Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ...
Sr. Analog Physical Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
Job Title: Sr. Analog Physical Design Engineer Job Duties: * Work on detailed column ADC circuit ... Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ...
Sr. Analog Physical Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
Job Title: Sr. Analog Physical Design Engineer Job Duties: * Work on detailed column ADC circuit ... Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ...
Sr. Analog Physical Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
Description Job Title: Sr. Analog Physical Design Engineer Job Duties: * Work on detailed column ... Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ...
Sr. Analog Physical Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
Description Job Title: Sr. Analog Physical Design Engineer Job Duties: * Work on detailed column ... Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ...
Lead Analog IC Layout Engineer
$134K - $201K/yr
Leads complex IC layout projects and mentors junior engineers * Makes critical IC architecture design decisions that shape product development * Performs advanced process evaluations and ...
Lead Analog IC Layout Engineer
$134K - $201K/yr
Leads complex IC layout projects and mentors junior engineers * Makes critical IC architecture design decisions that shape product development * Performs advanced process evaluations and ...
Lead Analog IC Layout Engineer
Wilmington, MA · On-site
$134K - $201K/yr
Leads complex IC layout projects and mentors junior engineers * Makes critical IC architecture design decisions that shape product development * Performs advanced process evaluations and ...
Lead Analog IC Layout Engineer
Wilmington, MA · On-site
$134K - $201K/yr
Leads complex IC layout projects and mentors junior engineers * Makes critical IC architecture design decisions that shape product development * Performs advanced process evaluations and ...
Layout Design Engineer (SRAM)
Santa Clara, UT · On-site
$45K - $121K/yr
... junior engineers, and help raise layout quality and execution rigor across the team ... What we need to see: • Have a BSEE or equivalent experience • 10+ years of custom IC layout ...
New
Layout Design Engineer (SRAM)
Santa Clara, UT · On-site
$45K - $121K/yr
... junior engineers, and help raise layout quality and execution rigor across the team ... What we need to see: • Have a BSEE or equivalent experience • 10+ years of custom IC layout ...
New
$134K - $201K/yr
Leads complex IC layout projects and mentors junior engineers * Makes critical IC architecture design decisions that shape product development * Performs advanced process evaluations and ...
$134K - $201K/yr
Leads complex IC layout projects and mentors junior engineers * Makes critical IC architecture design decisions that shape product development * Performs advanced process evaluations and ...
Sr. Photonic IC Layout Engineer
Temecula, CA · On-site
$125K - $185K/yr
Creating design rules and implementing within layout software. * Leading tape-out process for ... Engineering, or a closely related field * At least five (5) years of work experience in photonic IC ...
Quick apply
Sr. Photonic IC Layout Engineer
Temecula, CA · On-site
$125K - $185K/yr
Creating design rules and implementing within layout software. * Leading tape-out process for ... Engineering, or a closely related field * At least five (5) years of work experience in photonic IC ...
Analog IC Design Engineer
Dallas, TX · On-site
As an Analog Design Engineer, you will apply your circuit design expertise to create ... Direct IC layout to ensure performance, reliability, and manufacturability * Characterize silicon ...
Analog IC Design Engineer
Dallas, TX · On-site
As an Analog Design Engineer, you will apply your circuit design expertise to create ... Direct IC layout to ensure performance, reliability, and manufacturability * Characterize silicon ...
Junior Ic Layout Design Engineer information
See salary details
$33.5K - $40.4K
3% of jobs
$40.4K - $47.3K
20% of jobs
$48.8K is the 25th percentile. Wages below this are outliers.
$47.3K - $54.2K
7% of jobs
$54.2K - $61.1K
6% of jobs
$61.1K - $68K
12% of jobs
The median wage is $68.5K / yr.
$68K - $75K
17% of jobs
$78.6K is the 75th percentile. Wages above this are outliers.
$75K - $81.9K
17% of jobs
$81.9K - $88.8K
7% of jobs
$88.8K - $95.7K
4% of jobs
$95.7K - $102.6K
3% of jobs
$102.6K - $109.5K
2% of jobs
$33.5K
$71.8K
$109.5K
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Full-time
Medical, Dental, Vision, Retirement
Re-posted 8 days ago
Job description
- Richardson, TX (Hybrid; In Office 3 Days A Week)
- Minimum 1 year of experience in IC layout design and physical verification
- ITAR Compliance (U.S. Persons meaning U.S. Citizen or U.S. Green Card Holder)
- Experience using Cadence Virtuoso, VXL, or similar layout design tools
- Familiarity with physical verification tools such as Assura (DRC, LVS, ERC) or equivalent
- Basic understanding of analog, mixed-signal, or RF layout concepts
- Knowledge of matching techniques, shielding, guard rings, and latch-up prevention
- Strong analytical, troubleshooting, and problem-solving skills
- Ability to work effectively in a collaborative team environment
- Strong verbal and written communication skills
- Bachelor's degree in Electrical Engineering or a related field
- Exposure to scripting languages such as SKILL or PERL is a plus
- Experience with advanced process technologies, FinFET, or GAA is a plus but not required
- Support the layout and physical verification of analog, mixed-signal, RF, and custom digital circuits
- Perform layout implementation while adhering to foundry design rules and project requirements
- Assist with DRC, LVS, ERC, and other physical verification activities
- Collaborate with design engineers to optimize layouts for performance, area, reliability, and manufacturability
- Participate in design reviews and contribute to layout quality improvements
- Help identify and resolve layout and verification issues
- Learn and apply best practices for advanced IC layout methodologies
- Contribute to project schedules and deliverables while maintaining high-quality standards
- Support continuous improvement initiatives across design and layout processes
About IC Enable
Sourced by ZipRecruiter
Industry
Semiconductor and electronic component manufacturing
Company size
51 - 200 Employees
Headquarters location
Dallas, TX, US
Year founded
2004